1 /* 2 * Copyright (c) 2013-2014 Qlogic Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * and ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * File: qls_os.c 30 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 37 #include "qls_os.h" 38 #include "qls_hw.h" 39 #include "qls_def.h" 40 #include "qls_inline.h" 41 #include "qls_ver.h" 42 #include "qls_glbl.h" 43 #include "qls_dbg.h" 44 #include <sys/smp.h> 45 46 /* 47 * Some PCI Configuration Space Related Defines 48 */ 49 50 #ifndef PCI_VENDOR_QLOGIC 51 #define PCI_VENDOR_QLOGIC 0x1077 52 #endif 53 54 #ifndef PCI_DEVICE_QLOGIC_8000 55 #define PCI_DEVICE_QLOGIC_8000 0x8000 56 #endif 57 58 #define PCI_QLOGIC_DEV8000 \ 59 ((PCI_DEVICE_QLOGIC_8000 << 16) | PCI_VENDOR_QLOGIC) 60 61 /* 62 * static functions 63 */ 64 static int qls_alloc_parent_dma_tag(qla_host_t *ha); 65 static void qls_free_parent_dma_tag(qla_host_t *ha); 66 67 static void qls_flush_xmt_bufs(qla_host_t *ha); 68 69 static int qls_alloc_rcv_bufs(qla_host_t *ha); 70 static void qls_free_rcv_bufs(qla_host_t *ha); 71 72 static void qls_init_ifnet(device_t dev, qla_host_t *ha); 73 static void qls_release(qla_host_t *ha); 74 static void qls_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 75 int error); 76 static void qls_stop(qla_host_t *ha); 77 static int qls_send(qla_host_t *ha, struct mbuf **m_headp); 78 static void qls_tx_done(void *context, int pending); 79 80 static int qls_config_lro(qla_host_t *ha); 81 static void qls_free_lro(qla_host_t *ha); 82 83 static void qls_error_recovery(void *context, int pending); 84 85 /* 86 * Hooks to the Operating Systems 87 */ 88 static int qls_pci_probe (device_t); 89 static int qls_pci_attach (device_t); 90 static int qls_pci_detach (device_t); 91 92 static void qls_start(struct ifnet *ifp); 93 static void qls_init(void *arg); 94 static int qls_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 95 static int qls_media_change(struct ifnet *ifp); 96 static void qls_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 97 98 static device_method_t qla_pci_methods[] = { 99 /* Device interface */ 100 DEVMETHOD(device_probe, qls_pci_probe), 101 DEVMETHOD(device_attach, qls_pci_attach), 102 DEVMETHOD(device_detach, qls_pci_detach), 103 { 0, 0 } 104 }; 105 106 static driver_t qla_pci_driver = { 107 "ql", qla_pci_methods, sizeof (qla_host_t), 108 }; 109 110 static devclass_t qla8000_devclass; 111 112 DRIVER_MODULE(qla8000, pci, qla_pci_driver, qla8000_devclass, 0, 0); 113 114 MODULE_DEPEND(qla8000, pci, 1, 1, 1); 115 MODULE_DEPEND(qla8000, ether, 1, 1, 1); 116 117 MALLOC_DEFINE(M_QLA8000BUF, "qla8000buf", "Buffers for qla8000 driver"); 118 119 static char dev_str[64]; 120 static char ver_str[64]; 121 122 /* 123 * Name: qls_pci_probe 124 * Function: Validate the PCI device to be a QLA80XX device 125 */ 126 static int 127 qls_pci_probe(device_t dev) 128 { 129 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 130 case PCI_QLOGIC_DEV8000: 131 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 132 "Qlogic ISP 8000 PCI CNA Adapter-Ethernet Function", 133 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 134 QLA_VERSION_BUILD); 135 snprintf(ver_str, sizeof(ver_str), "v%d.%d.%d", 136 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 137 QLA_VERSION_BUILD); 138 device_set_desc(dev, dev_str); 139 break; 140 default: 141 return (ENXIO); 142 } 143 144 if (bootverbose) 145 printf("%s: %s\n ", __func__, dev_str); 146 147 return (BUS_PROBE_DEFAULT); 148 } 149 150 static int 151 qls_sysctl_get_drvr_stats(SYSCTL_HANDLER_ARGS) 152 { 153 int err = 0, ret; 154 qla_host_t *ha; 155 uint32_t i; 156 157 err = sysctl_handle_int(oidp, &ret, 0, req); 158 159 if (err || !req->newptr) 160 return (err); 161 162 if (ret == 1) { 163 164 ha = (qla_host_t *)arg1; 165 166 for (i = 0; i < ha->num_tx_rings; i++) { 167 168 device_printf(ha->pci_dev, 169 "%s: tx_ring[%d].tx_frames= %p\n", 170 __func__, i, 171 (void *)ha->tx_ring[i].tx_frames); 172 173 device_printf(ha->pci_dev, 174 "%s: tx_ring[%d].tx_tso_frames= %p\n", 175 __func__, i, 176 (void *)ha->tx_ring[i].tx_tso_frames); 177 178 device_printf(ha->pci_dev, 179 "%s: tx_ring[%d].tx_vlan_frames= %p\n", 180 __func__, i, 181 (void *)ha->tx_ring[i].tx_vlan_frames); 182 183 device_printf(ha->pci_dev, 184 "%s: tx_ring[%d].txr_free= 0x%08x\n", 185 __func__, i, 186 ha->tx_ring[i].txr_free); 187 188 device_printf(ha->pci_dev, 189 "%s: tx_ring[%d].txr_next= 0x%08x\n", 190 __func__, i, 191 ha->tx_ring[i].txr_next); 192 193 device_printf(ha->pci_dev, 194 "%s: tx_ring[%d].txr_done= 0x%08x\n", 195 __func__, i, 196 ha->tx_ring[i].txr_done); 197 198 device_printf(ha->pci_dev, 199 "%s: tx_ring[%d].txr_cons_idx= 0x%08x\n", 200 __func__, i, 201 *(ha->tx_ring[i].txr_cons_vaddr)); 202 } 203 204 for (i = 0; i < ha->num_rx_rings; i++) { 205 206 device_printf(ha->pci_dev, 207 "%s: rx_ring[%d].rx_int= %p\n", 208 __func__, i, 209 (void *)ha->rx_ring[i].rx_int); 210 211 device_printf(ha->pci_dev, 212 "%s: rx_ring[%d].rss_int= %p\n", 213 __func__, i, 214 (void *)ha->rx_ring[i].rss_int); 215 216 device_printf(ha->pci_dev, 217 "%s: rx_ring[%d].lbq_next= 0x%08x\n", 218 __func__, i, 219 ha->rx_ring[i].lbq_next); 220 221 device_printf(ha->pci_dev, 222 "%s: rx_ring[%d].lbq_free= 0x%08x\n", 223 __func__, i, 224 ha->rx_ring[i].lbq_free); 225 226 device_printf(ha->pci_dev, 227 "%s: rx_ring[%d].lbq_in= 0x%08x\n", 228 __func__, i, 229 ha->rx_ring[i].lbq_in); 230 231 device_printf(ha->pci_dev, 232 "%s: rx_ring[%d].sbq_next= 0x%08x\n", 233 __func__, i, 234 ha->rx_ring[i].sbq_next); 235 236 device_printf(ha->pci_dev, 237 "%s: rx_ring[%d].sbq_free= 0x%08x\n", 238 __func__, i, 239 ha->rx_ring[i].sbq_free); 240 241 device_printf(ha->pci_dev, 242 "%s: rx_ring[%d].sbq_in= 0x%08x\n", 243 __func__, i, 244 ha->rx_ring[i].sbq_in); 245 } 246 247 device_printf(ha->pci_dev, "%s: err_m_getcl = 0x%08x\n", 248 __func__, ha->err_m_getcl); 249 device_printf(ha->pci_dev, "%s: err_m_getjcl = 0x%08x\n", 250 __func__, ha->err_m_getjcl); 251 device_printf(ha->pci_dev, 252 "%s: err_tx_dmamap_create = 0x%08x\n", 253 __func__, ha->err_tx_dmamap_create); 254 device_printf(ha->pci_dev, 255 "%s: err_tx_dmamap_load = 0x%08x\n", 256 __func__, ha->err_tx_dmamap_load); 257 device_printf(ha->pci_dev, 258 "%s: err_tx_defrag = 0x%08x\n", 259 __func__, ha->err_tx_defrag); 260 } 261 return (err); 262 } 263 264 static void 265 qls_add_sysctls(qla_host_t *ha) 266 { 267 device_t dev = ha->pci_dev; 268 269 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 270 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 271 OID_AUTO, "version", CTLFLAG_RD, 272 ver_str, 0, "Driver Version"); 273 274 qls_dbg_level = 0; 275 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 276 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 277 OID_AUTO, "debug", CTLFLAG_RW, 278 &qls_dbg_level, qls_dbg_level, "Debug Level"); 279 280 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 281 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 282 OID_AUTO, "drvr_stats", CTLTYPE_INT | CTLFLAG_RW, 283 (void *)ha, 0, 284 qls_sysctl_get_drvr_stats, "I", "Driver Maintained Statistics"); 285 286 return; 287 } 288 289 static void 290 qls_watchdog(void *arg) 291 { 292 qla_host_t *ha = arg; 293 struct ifnet *ifp; 294 295 ifp = ha->ifp; 296 297 if (ha->flags.qla_watchdog_exit) { 298 ha->qla_watchdog_exited = 1; 299 return; 300 } 301 ha->qla_watchdog_exited = 0; 302 303 if (!ha->flags.qla_watchdog_pause) { 304 305 if (ha->qla_initiate_recovery) { 306 307 ha->qla_watchdog_paused = 1; 308 ha->qla_initiate_recovery = 0; 309 ha->err_inject = 0; 310 taskqueue_enqueue(ha->err_tq, &ha->err_task); 311 312 } else if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 313 314 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 315 } 316 317 ha->qla_watchdog_paused = 0; 318 } else { 319 ha->qla_watchdog_paused = 1; 320 } 321 322 ha->watchdog_ticks = ha->watchdog_ticks++ % 1000; 323 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 324 qls_watchdog, ha); 325 326 return; 327 } 328 329 /* 330 * Name: qls_pci_attach 331 * Function: attaches the device to the operating system 332 */ 333 static int 334 qls_pci_attach(device_t dev) 335 { 336 qla_host_t *ha = NULL; 337 int i; 338 339 QL_DPRINT2((dev, "%s: enter\n", __func__)); 340 341 if ((ha = device_get_softc(dev)) == NULL) { 342 device_printf(dev, "cannot get softc\n"); 343 return (ENOMEM); 344 } 345 346 memset(ha, 0, sizeof (qla_host_t)); 347 348 if (pci_get_device(dev) != PCI_DEVICE_QLOGIC_8000) { 349 device_printf(dev, "device is not QLE8000\n"); 350 return (ENXIO); 351 } 352 353 ha->pci_func = pci_get_function(dev); 354 355 ha->pci_dev = dev; 356 357 pci_enable_busmaster(dev); 358 359 ha->reg_rid = PCIR_BAR(1); 360 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 361 RF_ACTIVE); 362 363 if (ha->pci_reg == NULL) { 364 device_printf(dev, "unable to map any ports\n"); 365 goto qls_pci_attach_err; 366 } 367 368 ha->reg_rid1 = PCIR_BAR(3); 369 ha->pci_reg1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 370 &ha->reg_rid1, RF_ACTIVE); 371 372 if (ha->pci_reg1 == NULL) { 373 device_printf(dev, "unable to map any ports\n"); 374 goto qls_pci_attach_err; 375 } 376 377 mtx_init(&ha->hw_lock, "qla80xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 378 mtx_init(&ha->tx_lock, "qla80xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 379 380 qls_add_sysctls(ha); 381 qls_hw_add_sysctls(ha); 382 383 ha->flags.lock_init = 1; 384 385 ha->msix_count = pci_msix_count(dev); 386 387 if (ha->msix_count < qls_get_msix_count(ha)) { 388 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 389 ha->msix_count); 390 goto qls_pci_attach_err; 391 } 392 393 ha->msix_count = qls_get_msix_count(ha); 394 395 device_printf(dev, "\n%s: ha %p pci_func 0x%x msix_count 0x%x" 396 " pci_reg %p pci_reg1 %p\n", __func__, ha, 397 ha->pci_func, ha->msix_count, ha->pci_reg, ha->pci_reg1); 398 399 if (pci_alloc_msix(dev, &ha->msix_count)) { 400 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 401 ha->msix_count); 402 ha->msix_count = 0; 403 goto qls_pci_attach_err; 404 } 405 406 for (i = 0; i < ha->num_rx_rings; i++) { 407 ha->irq_vec[i].cq_idx = i; 408 ha->irq_vec[i].ha = ha; 409 ha->irq_vec[i].irq_rid = 1 + i; 410 411 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 412 &ha->irq_vec[i].irq_rid, 413 (RF_ACTIVE | RF_SHAREABLE)); 414 415 if (ha->irq_vec[i].irq == NULL) { 416 device_printf(dev, "could not allocate interrupt\n"); 417 goto qls_pci_attach_err; 418 } 419 420 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 421 (INTR_TYPE_NET | INTR_MPSAFE), NULL, qls_isr, 422 &ha->irq_vec[i], &ha->irq_vec[i].handle)) { 423 device_printf(dev, 424 "could not setup interrupt\n"); 425 goto qls_pci_attach_err; 426 } 427 } 428 429 qls_rd_nic_params(ha); 430 431 /* allocate parent dma tag */ 432 if (qls_alloc_parent_dma_tag(ha)) { 433 device_printf(dev, "%s: qls_alloc_parent_dma_tag failed\n", 434 __func__); 435 goto qls_pci_attach_err; 436 } 437 438 /* alloc all dma buffers */ 439 if (qls_alloc_dma(ha)) { 440 device_printf(dev, "%s: qls_alloc_dma failed\n", __func__); 441 goto qls_pci_attach_err; 442 } 443 444 /* create the o.s ethernet interface */ 445 qls_init_ifnet(dev, ha); 446 447 ha->flags.qla_watchdog_active = 1; 448 ha->flags.qla_watchdog_pause = 1; 449 450 TASK_INIT(&ha->tx_task, 0, qls_tx_done, ha); 451 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 452 taskqueue_thread_enqueue, &ha->tx_tq); 453 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 454 device_get_nameunit(ha->pci_dev)); 455 456 callout_init(&ha->tx_callout, TRUE); 457 ha->flags.qla_callout_init = 1; 458 459 /* create ioctl device interface */ 460 if (qls_make_cdev(ha)) { 461 device_printf(dev, "%s: qls_make_cdev failed\n", __func__); 462 goto qls_pci_attach_err; 463 } 464 465 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 466 qls_watchdog, ha); 467 468 TASK_INIT(&ha->err_task, 0, qls_error_recovery, ha); 469 ha->err_tq = taskqueue_create_fast("qla_errq", M_NOWAIT, 470 taskqueue_thread_enqueue, &ha->err_tq); 471 taskqueue_start_threads(&ha->err_tq, 1, PI_NET, "%s errq", 472 device_get_nameunit(ha->pci_dev)); 473 474 QL_DPRINT2((dev, "%s: exit 0\n", __func__)); 475 return (0); 476 477 qls_pci_attach_err: 478 479 qls_release(ha); 480 481 QL_DPRINT2((dev, "%s: exit ENXIO\n", __func__)); 482 return (ENXIO); 483 } 484 485 /* 486 * Name: qls_pci_detach 487 * Function: Unhooks the device from the operating system 488 */ 489 static int 490 qls_pci_detach(device_t dev) 491 { 492 qla_host_t *ha = NULL; 493 struct ifnet *ifp; 494 495 QL_DPRINT2((dev, "%s: enter\n", __func__)); 496 497 if ((ha = device_get_softc(dev)) == NULL) { 498 device_printf(dev, "cannot get softc\n"); 499 return (ENOMEM); 500 } 501 502 ifp = ha->ifp; 503 504 (void)QLA_LOCK(ha, __func__, 0); 505 qls_stop(ha); 506 QLA_UNLOCK(ha, __func__); 507 508 qls_release(ha); 509 510 QL_DPRINT2((dev, "%s: exit\n", __func__)); 511 512 return (0); 513 } 514 515 /* 516 * Name: qls_release 517 * Function: Releases the resources allocated for the device 518 */ 519 static void 520 qls_release(qla_host_t *ha) 521 { 522 device_t dev; 523 int i; 524 525 dev = ha->pci_dev; 526 527 if (ha->err_tq) { 528 taskqueue_drain(ha->err_tq, &ha->err_task); 529 taskqueue_free(ha->err_tq); 530 } 531 532 if (ha->tx_tq) { 533 taskqueue_drain(ha->tx_tq, &ha->tx_task); 534 taskqueue_free(ha->tx_tq); 535 } 536 537 qls_del_cdev(ha); 538 539 if (ha->flags.qla_watchdog_active) { 540 ha->flags.qla_watchdog_exit = 1; 541 542 while (ha->qla_watchdog_exited == 0) 543 qls_mdelay(__func__, 1); 544 } 545 546 if (ha->flags.qla_callout_init) 547 callout_stop(&ha->tx_callout); 548 549 if (ha->ifp != NULL) 550 ether_ifdetach(ha->ifp); 551 552 qls_free_dma(ha); 553 qls_free_parent_dma_tag(ha); 554 555 for (i = 0; i < ha->num_rx_rings; i++) { 556 557 if (ha->irq_vec[i].handle) { 558 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 559 ha->irq_vec[i].handle); 560 } 561 562 if (ha->irq_vec[i].irq) { 563 (void)bus_release_resource(dev, SYS_RES_IRQ, 564 ha->irq_vec[i].irq_rid, 565 ha->irq_vec[i].irq); 566 } 567 } 568 569 if (ha->msix_count) 570 pci_release_msi(dev); 571 572 if (ha->flags.lock_init) { 573 mtx_destroy(&ha->tx_lock); 574 mtx_destroy(&ha->hw_lock); 575 } 576 577 if (ha->pci_reg) 578 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 579 ha->pci_reg); 580 581 if (ha->pci_reg1) 582 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid1, 583 ha->pci_reg1); 584 } 585 586 /* 587 * DMA Related Functions 588 */ 589 590 static void 591 qls_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 592 { 593 *((bus_addr_t *)arg) = 0; 594 595 if (error) { 596 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 597 return; 598 } 599 600 *((bus_addr_t *)arg) = segs[0].ds_addr; 601 602 return; 603 } 604 605 int 606 qls_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 607 { 608 int ret = 0; 609 device_t dev; 610 bus_addr_t b_addr; 611 612 dev = ha->pci_dev; 613 614 QL_DPRINT2((dev, "%s: enter\n", __func__)); 615 616 ret = bus_dma_tag_create( 617 ha->parent_tag,/* parent */ 618 dma_buf->alignment, 619 ((bus_size_t)(1ULL << 32)),/* boundary */ 620 BUS_SPACE_MAXADDR, /* lowaddr */ 621 BUS_SPACE_MAXADDR, /* highaddr */ 622 NULL, NULL, /* filter, filterarg */ 623 dma_buf->size, /* maxsize */ 624 1, /* nsegments */ 625 dma_buf->size, /* maxsegsize */ 626 0, /* flags */ 627 NULL, NULL, /* lockfunc, lockarg */ 628 &dma_buf->dma_tag); 629 630 if (ret) { 631 device_printf(dev, "%s: could not create dma tag\n", __func__); 632 goto qls_alloc_dmabuf_exit; 633 } 634 ret = bus_dmamem_alloc(dma_buf->dma_tag, 635 (void **)&dma_buf->dma_b, 636 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 637 &dma_buf->dma_map); 638 if (ret) { 639 bus_dma_tag_destroy(dma_buf->dma_tag); 640 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 641 goto qls_alloc_dmabuf_exit; 642 } 643 644 ret = bus_dmamap_load(dma_buf->dma_tag, 645 dma_buf->dma_map, 646 dma_buf->dma_b, 647 dma_buf->size, 648 qls_dmamap_callback, 649 &b_addr, BUS_DMA_NOWAIT); 650 651 if (ret || !b_addr) { 652 bus_dma_tag_destroy(dma_buf->dma_tag); 653 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 654 dma_buf->dma_map); 655 ret = -1; 656 goto qls_alloc_dmabuf_exit; 657 } 658 659 dma_buf->dma_addr = b_addr; 660 661 qls_alloc_dmabuf_exit: 662 QL_DPRINT2((dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 663 __func__, ret, (void *)dma_buf->dma_tag, 664 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 665 dma_buf->size)); 666 667 return ret; 668 } 669 670 void 671 qls_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 672 { 673 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 674 bus_dma_tag_destroy(dma_buf->dma_tag); 675 } 676 677 static int 678 qls_alloc_parent_dma_tag(qla_host_t *ha) 679 { 680 int ret; 681 device_t dev; 682 683 dev = ha->pci_dev; 684 685 /* 686 * Allocate parent DMA Tag 687 */ 688 ret = bus_dma_tag_create( 689 bus_get_dma_tag(dev), /* parent */ 690 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 691 BUS_SPACE_MAXADDR, /* lowaddr */ 692 BUS_SPACE_MAXADDR, /* highaddr */ 693 NULL, NULL, /* filter, filterarg */ 694 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 695 0, /* nsegments */ 696 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 697 0, /* flags */ 698 NULL, NULL, /* lockfunc, lockarg */ 699 &ha->parent_tag); 700 701 if (ret) { 702 device_printf(dev, "%s: could not create parent dma tag\n", 703 __func__); 704 return (-1); 705 } 706 707 ha->flags.parent_tag = 1; 708 709 return (0); 710 } 711 712 static void 713 qls_free_parent_dma_tag(qla_host_t *ha) 714 { 715 if (ha->flags.parent_tag) { 716 bus_dma_tag_destroy(ha->parent_tag); 717 ha->flags.parent_tag = 0; 718 } 719 } 720 721 /* 722 * Name: qls_init_ifnet 723 * Function: Creates the Network Device Interface and Registers it with the O.S 724 */ 725 726 static void 727 qls_init_ifnet(device_t dev, qla_host_t *ha) 728 { 729 struct ifnet *ifp; 730 731 QL_DPRINT2((dev, "%s: enter\n", __func__)); 732 733 ifp = ha->ifp = if_alloc(IFT_ETHER); 734 735 if (ifp == NULL) 736 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 737 738 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 739 ifp->if_baudrate = IF_Gbps(10); 740 ifp->if_init = qls_init; 741 ifp->if_softc = ha; 742 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 743 ifp->if_ioctl = qls_ioctl; 744 ifp->if_start = qls_start; 745 746 IFQ_SET_MAXLEN(&ifp->if_snd, qls_get_ifq_snd_maxlen(ha)); 747 ifp->if_snd.ifq_drv_maxlen = qls_get_ifq_snd_maxlen(ha); 748 IFQ_SET_READY(&ifp->if_snd); 749 750 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 751 if (ha->max_frame_size <= MCLBYTES) { 752 ha->msize = MCLBYTES; 753 } else if (ha->max_frame_size <= MJUMPAGESIZE) { 754 ha->msize = MJUMPAGESIZE; 755 } else 756 ha->msize = MJUM9BYTES; 757 758 ether_ifattach(ifp, qls_get_mac_addr(ha)); 759 760 ifp->if_capabilities = IFCAP_JUMBO_MTU; 761 762 ifp->if_capabilities |= IFCAP_HWCSUM; 763 ifp->if_capabilities |= IFCAP_VLAN_MTU; 764 765 ifp->if_capabilities |= IFCAP_TSO4; 766 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; 767 ifp->if_capabilities |= IFCAP_VLAN_HWTSO; 768 ifp->if_capabilities |= IFCAP_LINKSTATE; 769 770 ifp->if_capenable = ifp->if_capabilities; 771 772 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 773 774 ifmedia_init(&ha->media, IFM_IMASK, qls_media_change, qls_media_status); 775 776 ifmedia_add(&ha->media, (IFM_ETHER | qls_get_optics(ha) | IFM_FDX), 0, 777 NULL); 778 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 779 780 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 781 782 QL_DPRINT2((dev, "%s: exit\n", __func__)); 783 784 return; 785 } 786 787 static void 788 qls_init_locked(qla_host_t *ha) 789 { 790 struct ifnet *ifp = ha->ifp; 791 792 qls_stop(ha); 793 794 qls_flush_xmt_bufs(ha); 795 796 if (qls_alloc_rcv_bufs(ha) != 0) 797 return; 798 799 if (qls_config_lro(ha)) 800 return; 801 802 bcopy(IF_LLADDR(ha->ifp), ha->mac_addr, ETHER_ADDR_LEN); 803 804 ifp->if_hwassist = CSUM_IP; 805 ifp->if_hwassist |= CSUM_TCP; 806 ifp->if_hwassist |= CSUM_UDP; 807 ifp->if_hwassist |= CSUM_TSO; 808 809 if (qls_init_hw_if(ha) == 0) { 810 ifp = ha->ifp; 811 ifp->if_drv_flags |= IFF_DRV_RUNNING; 812 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 813 ha->flags.qla_watchdog_pause = 0; 814 } 815 816 return; 817 } 818 819 static void 820 qls_init(void *arg) 821 { 822 qla_host_t *ha; 823 824 ha = (qla_host_t *)arg; 825 826 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 827 828 (void)QLA_LOCK(ha, __func__, 0); 829 qls_init_locked(ha); 830 QLA_UNLOCK(ha, __func__); 831 832 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 833 } 834 835 static void 836 qls_set_multi(qla_host_t *ha, uint32_t add_multi) 837 { 838 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 839 struct ifmultiaddr *ifma; 840 int mcnt = 0; 841 struct ifnet *ifp = ha->ifp; 842 843 if_maddr_rlock(ifp); 844 845 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 846 847 if (ifma->ifma_addr->sa_family != AF_LINK) 848 continue; 849 850 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 851 break; 852 853 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 854 &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 855 856 mcnt++; 857 } 858 859 if_maddr_runlock(ifp); 860 861 if (QLA_LOCK(ha, __func__, 1) == 0) { 862 qls_hw_set_multi(ha, mta, mcnt, add_multi); 863 QLA_UNLOCK(ha, __func__); 864 } 865 866 return; 867 } 868 869 static int 870 qls_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 871 { 872 int ret = 0; 873 struct ifreq *ifr = (struct ifreq *)data; 874 struct ifaddr *ifa = (struct ifaddr *)data; 875 qla_host_t *ha; 876 877 ha = (qla_host_t *)ifp->if_softc; 878 879 switch (cmd) { 880 case SIOCSIFADDR: 881 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 882 __func__, cmd)); 883 884 if (ifa->ifa_addr->sa_family == AF_INET) { 885 ifp->if_flags |= IFF_UP; 886 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 887 (void)QLA_LOCK(ha, __func__, 0); 888 qls_init_locked(ha); 889 QLA_UNLOCK(ha, __func__); 890 } 891 QL_DPRINT4((ha->pci_dev, 892 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 893 __func__, cmd, 894 ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 895 896 arp_ifinit(ifp, ifa); 897 } else { 898 ether_ioctl(ifp, cmd, data); 899 } 900 break; 901 902 case SIOCSIFMTU: 903 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 904 __func__, cmd)); 905 906 if (ifr->ifr_mtu > QLA_MAX_MTU) { 907 ret = EINVAL; 908 } else { 909 (void) QLA_LOCK(ha, __func__, 0); 910 911 ifp->if_mtu = ifr->ifr_mtu; 912 ha->max_frame_size = 913 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 914 915 QLA_UNLOCK(ha, __func__); 916 917 if (ret) 918 ret = EINVAL; 919 } 920 921 break; 922 923 case SIOCSIFFLAGS: 924 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 925 __func__, cmd)); 926 927 (void)QLA_LOCK(ha, __func__, 0); 928 929 if (ifp->if_flags & IFF_UP) { 930 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 931 if ((ifp->if_flags ^ ha->if_flags) & 932 IFF_PROMISC) { 933 ret = qls_set_promisc(ha); 934 } else if ((ifp->if_flags ^ ha->if_flags) & 935 IFF_ALLMULTI) { 936 ret = qls_set_allmulti(ha); 937 } 938 } else { 939 ha->max_frame_size = ifp->if_mtu + 940 ETHER_HDR_LEN + ETHER_CRC_LEN; 941 qls_init_locked(ha); 942 } 943 } else { 944 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 945 qls_stop(ha); 946 ha->if_flags = ifp->if_flags; 947 } 948 949 QLA_UNLOCK(ha, __func__); 950 break; 951 952 case SIOCADDMULTI: 953 QL_DPRINT4((ha->pci_dev, 954 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 955 956 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 957 qls_set_multi(ha, 1); 958 } 959 break; 960 961 case SIOCDELMULTI: 962 QL_DPRINT4((ha->pci_dev, 963 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 964 965 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 966 qls_set_multi(ha, 0); 967 } 968 break; 969 970 case SIOCSIFMEDIA: 971 case SIOCGIFMEDIA: 972 QL_DPRINT4((ha->pci_dev, 973 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 974 __func__, cmd)); 975 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 976 break; 977 978 case SIOCSIFCAP: 979 { 980 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 981 982 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 983 __func__, cmd)); 984 985 if (mask & IFCAP_HWCSUM) 986 ifp->if_capenable ^= IFCAP_HWCSUM; 987 if (mask & IFCAP_TSO4) 988 ifp->if_capenable ^= IFCAP_TSO4; 989 if (mask & IFCAP_VLAN_HWTAGGING) 990 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 991 if (mask & IFCAP_VLAN_HWTSO) 992 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 993 994 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 995 qls_init(ha); 996 997 VLAN_CAPABILITIES(ifp); 998 break; 999 } 1000 1001 default: 1002 QL_DPRINT4((ha->pci_dev, "%s: default (0x%lx)\n", 1003 __func__, cmd)); 1004 ret = ether_ioctl(ifp, cmd, data); 1005 break; 1006 } 1007 1008 return (ret); 1009 } 1010 1011 static int 1012 qls_media_change(struct ifnet *ifp) 1013 { 1014 qla_host_t *ha; 1015 struct ifmedia *ifm; 1016 int ret = 0; 1017 1018 ha = (qla_host_t *)ifp->if_softc; 1019 1020 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1021 1022 ifm = &ha->media; 1023 1024 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1025 ret = EINVAL; 1026 1027 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1028 1029 return (ret); 1030 } 1031 1032 static void 1033 qls_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1034 { 1035 qla_host_t *ha; 1036 1037 ha = (qla_host_t *)ifp->if_softc; 1038 1039 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1040 1041 ifmr->ifm_status = IFM_AVALID; 1042 ifmr->ifm_active = IFM_ETHER; 1043 1044 qls_update_link_state(ha); 1045 if (ha->link_up) { 1046 ifmr->ifm_status |= IFM_ACTIVE; 1047 ifmr->ifm_active |= (IFM_FDX | qls_get_optics(ha)); 1048 } 1049 1050 QL_DPRINT2((ha->pci_dev, "%s: exit (%s)\n", __func__,\ 1051 (ha->link_up ? "link_up" : "link_down"))); 1052 1053 return; 1054 } 1055 1056 static void 1057 qls_start(struct ifnet *ifp) 1058 { 1059 int i, ret = 0; 1060 struct mbuf *m_head; 1061 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 1062 1063 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1064 1065 if (!mtx_trylock(&ha->tx_lock)) { 1066 QL_DPRINT8((ha->pci_dev, 1067 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 1068 return; 1069 } 1070 1071 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) == 1072 IFF_DRV_RUNNING) { 1073 1074 for (i = 0; i < ha->num_tx_rings; i++) { 1075 ret |= qls_hw_tx_done(ha, i); 1076 } 1077 1078 if (ret == 0) 1079 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1080 } 1081 1082 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1083 IFF_DRV_RUNNING) { 1084 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1085 QLA_TX_UNLOCK(ha); 1086 return; 1087 } 1088 1089 if (!ha->link_up) { 1090 qls_update_link_state(ha); 1091 if (!ha->link_up) { 1092 QL_DPRINT8((ha->pci_dev, "%s: link down\n", __func__)); 1093 QLA_TX_UNLOCK(ha); 1094 return; 1095 } 1096 } 1097 1098 while (ifp->if_snd.ifq_head != NULL) { 1099 1100 IF_DEQUEUE(&ifp->if_snd, m_head); 1101 1102 if (m_head == NULL) { 1103 QL_DPRINT8((ha->pci_dev, "%s: m_head == NULL\n", 1104 __func__)); 1105 break; 1106 } 1107 1108 if (qls_send(ha, &m_head)) { 1109 if (m_head == NULL) 1110 break; 1111 QL_DPRINT8((ha->pci_dev, "%s: PREPEND\n", __func__)); 1112 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1113 IF_PREPEND(&ifp->if_snd, m_head); 1114 break; 1115 } 1116 /* Send a copy of the frame to the BPF listener */ 1117 ETHER_BPF_MTAP(ifp, m_head); 1118 } 1119 1120 QLA_TX_UNLOCK(ha); 1121 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1122 return; 1123 } 1124 1125 static int 1126 qls_send(qla_host_t *ha, struct mbuf **m_headp) 1127 { 1128 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1129 bus_dmamap_t map; 1130 int nsegs; 1131 int ret = -1; 1132 uint32_t tx_idx; 1133 struct mbuf *m_head = *m_headp; 1134 uint32_t txr_idx = 0; 1135 1136 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1137 1138 if (m_head->m_flags & M_FLOWID) 1139 txr_idx = m_head->m_pkthdr.flowid & (ha->num_tx_rings - 1); 1140 1141 tx_idx = ha->tx_ring[txr_idx].txr_next; 1142 1143 map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map; 1144 1145 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1146 BUS_DMA_NOWAIT); 1147 1148 if (ret == EFBIG) { 1149 1150 struct mbuf *m; 1151 1152 QL_DPRINT8((ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1153 m_head->m_pkthdr.len)); 1154 1155 m = m_defrag(m_head, M_NOWAIT); 1156 if (m == NULL) { 1157 ha->err_tx_defrag++; 1158 m_freem(m_head); 1159 *m_headp = NULL; 1160 device_printf(ha->pci_dev, 1161 "%s: m_defrag() = NULL [%d]\n", 1162 __func__, ret); 1163 return (ENOBUFS); 1164 } 1165 m_head = m; 1166 *m_headp = m_head; 1167 1168 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1169 segs, &nsegs, BUS_DMA_NOWAIT))) { 1170 1171 ha->err_tx_dmamap_load++; 1172 1173 device_printf(ha->pci_dev, 1174 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1175 __func__, ret, m_head->m_pkthdr.len); 1176 1177 if (ret != ENOMEM) { 1178 m_freem(m_head); 1179 *m_headp = NULL; 1180 } 1181 return (ret); 1182 } 1183 1184 } else if (ret) { 1185 1186 ha->err_tx_dmamap_load++; 1187 1188 device_printf(ha->pci_dev, 1189 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1190 __func__, ret, m_head->m_pkthdr.len); 1191 1192 if (ret != ENOMEM) { 1193 m_freem(m_head); 1194 *m_headp = NULL; 1195 } 1196 return (ret); 1197 } 1198 1199 QL_ASSERT(ha, (nsegs != 0), ("qls_send: empty packet")); 1200 1201 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1202 1203 if (!(ret = qls_hw_send(ha, segs, nsegs, tx_idx, m_head, txr_idx))) { 1204 1205 ha->tx_ring[txr_idx].count++; 1206 ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head = m_head; 1207 ha->tx_ring[txr_idx].tx_buf[tx_idx].map = map; 1208 } else { 1209 if (ret == EINVAL) { 1210 if (m_head) 1211 m_freem(m_head); 1212 *m_headp = NULL; 1213 } 1214 } 1215 1216 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1217 return (ret); 1218 } 1219 1220 static void 1221 qls_stop(qla_host_t *ha) 1222 { 1223 struct ifnet *ifp = ha->ifp; 1224 device_t dev; 1225 1226 dev = ha->pci_dev; 1227 1228 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1229 1230 ha->flags.qla_watchdog_pause = 1; 1231 1232 while (!ha->qla_watchdog_paused) 1233 qls_mdelay(__func__, 1); 1234 1235 qls_del_hw_if(ha); 1236 1237 qls_free_lro(ha); 1238 1239 qls_flush_xmt_bufs(ha); 1240 qls_free_rcv_bufs(ha); 1241 1242 return; 1243 } 1244 1245 /* 1246 * Buffer Management Functions for Transmit and Receive Rings 1247 */ 1248 /* 1249 * Release mbuf after it sent on the wire 1250 */ 1251 static void 1252 qls_flush_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1253 { 1254 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1255 1256 if (txb->m_head) { 1257 1258 bus_dmamap_unload(ha->tx_tag, txb->map); 1259 1260 m_freem(txb->m_head); 1261 txb->m_head = NULL; 1262 } 1263 1264 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1265 } 1266 1267 static void 1268 qls_flush_xmt_bufs(qla_host_t *ha) 1269 { 1270 int i, j; 1271 1272 for (j = 0; j < ha->num_tx_rings; j++) { 1273 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1274 qls_flush_tx_buf(ha, &ha->tx_ring[j].tx_buf[i]); 1275 } 1276 1277 return; 1278 } 1279 1280 1281 static int 1282 qls_alloc_rcv_mbufs(qla_host_t *ha, int r) 1283 { 1284 int i, j, ret = 0; 1285 qla_rx_buf_t *rxb; 1286 qla_rx_ring_t *rx_ring; 1287 volatile q81_bq_addr_e_t *sbq_e; 1288 1289 1290 rx_ring = &ha->rx_ring[r]; 1291 1292 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1293 1294 rxb = &rx_ring->rx_buf[i]; 1295 1296 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1297 1298 if (ret) { 1299 device_printf(ha->pci_dev, 1300 "%s: dmamap[%d, %d] failed\n", __func__, r, i); 1301 1302 for (j = 0; j < i; j++) { 1303 rxb = &rx_ring->rx_buf[j]; 1304 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1305 } 1306 goto qls_alloc_rcv_mbufs_err; 1307 } 1308 } 1309 1310 rx_ring = &ha->rx_ring[r]; 1311 1312 sbq_e = rx_ring->sbq_vaddr; 1313 1314 rxb = &rx_ring->rx_buf[0]; 1315 1316 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1317 1318 if (!(ret = qls_get_mbuf(ha, rxb, NULL))) { 1319 1320 /* 1321 * set the physical address in the 1322 * corresponding descriptor entry in the 1323 * receive ring/queue for the hba 1324 */ 1325 1326 sbq_e->addr_lo = rxb->paddr & 0xFFFFFFFF; 1327 sbq_e->addr_hi = (rxb->paddr >> 32) & 0xFFFFFFFF; 1328 1329 } else { 1330 device_printf(ha->pci_dev, 1331 "%s: qls_get_mbuf [%d, %d] failed\n", 1332 __func__, r, i); 1333 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1334 goto qls_alloc_rcv_mbufs_err; 1335 } 1336 1337 rxb++; 1338 sbq_e++; 1339 } 1340 return 0; 1341 1342 qls_alloc_rcv_mbufs_err: 1343 return (-1); 1344 } 1345 1346 static void 1347 qls_free_rcv_bufs(qla_host_t *ha) 1348 { 1349 int i, r; 1350 qla_rx_buf_t *rxb; 1351 qla_rx_ring_t *rxr; 1352 1353 for (r = 0; r < ha->num_rx_rings; r++) { 1354 1355 rxr = &ha->rx_ring[r]; 1356 1357 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1358 1359 rxb = &rxr->rx_buf[i]; 1360 1361 if (rxb->m_head != NULL) { 1362 bus_dmamap_unload(ha->rx_tag, rxb->map); 1363 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1364 m_freem(rxb->m_head); 1365 } 1366 } 1367 bzero(rxr->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1368 } 1369 return; 1370 } 1371 1372 static int 1373 qls_alloc_rcv_bufs(qla_host_t *ha) 1374 { 1375 int r, ret = 0; 1376 qla_rx_ring_t *rxr; 1377 1378 for (r = 0; r < ha->num_rx_rings; r++) { 1379 rxr = &ha->rx_ring[r]; 1380 bzero(rxr->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1381 } 1382 1383 for (r = 0; r < ha->num_rx_rings; r++) { 1384 1385 ret = qls_alloc_rcv_mbufs(ha, r); 1386 1387 if (ret) 1388 qls_free_rcv_bufs(ha); 1389 } 1390 1391 return (ret); 1392 } 1393 1394 int 1395 qls_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp) 1396 { 1397 register struct mbuf *mp = nmp; 1398 struct ifnet *ifp; 1399 int ret = 0; 1400 uint32_t offset; 1401 bus_dma_segment_t segs[1]; 1402 int nsegs; 1403 1404 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1405 1406 ifp = ha->ifp; 1407 1408 if (mp == NULL) { 1409 1410 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, ha->msize); 1411 1412 if (mp == NULL) { 1413 1414 if (ha->msize == MCLBYTES) 1415 ha->err_m_getcl++; 1416 else 1417 ha->err_m_getjcl++; 1418 1419 ret = ENOBUFS; 1420 device_printf(ha->pci_dev, 1421 "%s: m_getcl failed\n", __func__); 1422 goto exit_qls_get_mbuf; 1423 } 1424 mp->m_len = mp->m_pkthdr.len = ha->msize; 1425 } else { 1426 mp->m_len = mp->m_pkthdr.len = ha->msize; 1427 mp->m_data = mp->m_ext.ext_buf; 1428 mp->m_next = NULL; 1429 } 1430 1431 /* align the receive buffers to 8 byte boundary */ 1432 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1433 if (offset) { 1434 offset = 8 - offset; 1435 m_adj(mp, offset); 1436 } 1437 1438 /* 1439 * Using memory from the mbuf cluster pool, invoke the bus_dma 1440 * machinery to arrange the memory mapping. 1441 */ 1442 ret = bus_dmamap_load_mbuf_sg(ha->rx_tag, rxb->map, 1443 mp, segs, &nsegs, BUS_DMA_NOWAIT); 1444 rxb->paddr = segs[0].ds_addr; 1445 1446 if (ret || !rxb->paddr || (nsegs != 1)) { 1447 m_freem(mp); 1448 rxb->m_head = NULL; 1449 device_printf(ha->pci_dev, 1450 "%s: bus_dmamap_load failed[%d, 0x%016llx, %d]\n", 1451 __func__, ret, (long long unsigned int)rxb->paddr, 1452 nsegs); 1453 ret = -1; 1454 goto exit_qls_get_mbuf; 1455 } 1456 rxb->m_head = mp; 1457 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1458 1459 exit_qls_get_mbuf: 1460 QL_DPRINT2((ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1461 return (ret); 1462 } 1463 1464 static void 1465 qls_tx_done(void *context, int pending) 1466 { 1467 qla_host_t *ha = context; 1468 struct ifnet *ifp; 1469 1470 ifp = ha->ifp; 1471 1472 if (!ifp) 1473 return; 1474 1475 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1476 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1477 return; 1478 } 1479 1480 qls_start(ha->ifp); 1481 return; 1482 } 1483 1484 static int 1485 qls_config_lro(qla_host_t *ha) 1486 { 1487 int i; 1488 struct lro_ctrl *lro; 1489 1490 for (i = 0; i < ha->num_rx_rings; i++) { 1491 lro = &ha->rx_ring[i].lro; 1492 if (tcp_lro_init(lro)) { 1493 device_printf(ha->pci_dev, "%s: tcp_lro_init failed\n", 1494 __func__); 1495 return (-1); 1496 } 1497 lro->ifp = ha->ifp; 1498 } 1499 ha->flags.lro_init = 1; 1500 1501 QL_DPRINT2((ha->pci_dev, "%s: LRO initialized\n", __func__)); 1502 return (0); 1503 } 1504 1505 static void 1506 qls_free_lro(qla_host_t *ha) 1507 { 1508 int i; 1509 struct lro_ctrl *lro; 1510 1511 if (!ha->flags.lro_init) 1512 return; 1513 1514 for (i = 0; i < ha->num_rx_rings; i++) { 1515 lro = &ha->rx_ring[i].lro; 1516 tcp_lro_free(lro); 1517 } 1518 ha->flags.lro_init = 0; 1519 } 1520 1521 static void 1522 qls_error_recovery(void *context, int pending) 1523 { 1524 qla_host_t *ha = context; 1525 1526 qls_init(ha); 1527 1528 return; 1529 } 1530 1531