1 /* 2 * Copyright (c) 2013-2016 Qlogic Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * and ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * File: ql_os.c 30 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 37 #include "ql_os.h" 38 #include "ql_hw.h" 39 #include "ql_def.h" 40 #include "ql_inline.h" 41 #include "ql_ver.h" 42 #include "ql_glbl.h" 43 #include "ql_dbg.h" 44 #include <sys/smp.h> 45 46 /* 47 * Some PCI Configuration Space Related Defines 48 */ 49 50 #ifndef PCI_VENDOR_QLOGIC 51 #define PCI_VENDOR_QLOGIC 0x1077 52 #endif 53 54 #ifndef PCI_PRODUCT_QLOGIC_ISP8030 55 #define PCI_PRODUCT_QLOGIC_ISP8030 0x8030 56 #endif 57 58 #define PCI_QLOGIC_ISP8030 \ 59 ((PCI_PRODUCT_QLOGIC_ISP8030 << 16) | PCI_VENDOR_QLOGIC) 60 61 /* 62 * static functions 63 */ 64 static int qla_alloc_parent_dma_tag(qla_host_t *ha); 65 static void qla_free_parent_dma_tag(qla_host_t *ha); 66 static int qla_alloc_xmt_bufs(qla_host_t *ha); 67 static void qla_free_xmt_bufs(qla_host_t *ha); 68 static int qla_alloc_rcv_bufs(qla_host_t *ha); 69 static void qla_free_rcv_bufs(qla_host_t *ha); 70 static void qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb); 71 72 static void qla_init_ifnet(device_t dev, qla_host_t *ha); 73 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 74 static int qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS); 75 static void qla_release(qla_host_t *ha); 76 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 77 int error); 78 static void qla_stop(qla_host_t *ha); 79 static void qla_get_peer(qla_host_t *ha); 80 static void qla_error_recovery(void *context, int pending); 81 static void qla_async_event(void *context, int pending); 82 static int qla_send(qla_host_t *ha, struct mbuf **m_headp, uint32_t txr_idx, 83 uint32_t iscsi_pdu); 84 85 /* 86 * Hooks to the Operating Systems 87 */ 88 static int qla_pci_probe (device_t); 89 static int qla_pci_attach (device_t); 90 static int qla_pci_detach (device_t); 91 92 static void qla_init(void *arg); 93 static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 94 static int qla_media_change(struct ifnet *ifp); 95 static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 96 97 static int qla_transmit(struct ifnet *ifp, struct mbuf *mp); 98 static void qla_qflush(struct ifnet *ifp); 99 static int qla_alloc_tx_br(qla_host_t *ha, qla_tx_fp_t *tx_fp); 100 static void qla_free_tx_br(qla_host_t *ha, qla_tx_fp_t *tx_fp); 101 static int qla_create_fp_taskqueues(qla_host_t *ha); 102 static void qla_destroy_fp_taskqueues(qla_host_t *ha); 103 static void qla_drain_fp_taskqueues(qla_host_t *ha); 104 105 static device_method_t qla_pci_methods[] = { 106 /* Device interface */ 107 DEVMETHOD(device_probe, qla_pci_probe), 108 DEVMETHOD(device_attach, qla_pci_attach), 109 DEVMETHOD(device_detach, qla_pci_detach), 110 { 0, 0 } 111 }; 112 113 static driver_t qla_pci_driver = { 114 "ql", qla_pci_methods, sizeof (qla_host_t), 115 }; 116 117 static devclass_t qla83xx_devclass; 118 119 DRIVER_MODULE(qla83xx, pci, qla_pci_driver, qla83xx_devclass, 0, 0); 120 121 MODULE_DEPEND(qla83xx, pci, 1, 1, 1); 122 MODULE_DEPEND(qla83xx, ether, 1, 1, 1); 123 124 MALLOC_DEFINE(M_QLA83XXBUF, "qla83xxbuf", "Buffers for qla83xx driver"); 125 126 #define QL_STD_REPLENISH_THRES 0 127 #define QL_JUMBO_REPLENISH_THRES 32 128 129 130 static char dev_str[64]; 131 static char ver_str[64]; 132 133 /* 134 * Name: qla_pci_probe 135 * Function: Validate the PCI device to be a QLA80XX device 136 */ 137 static int 138 qla_pci_probe(device_t dev) 139 { 140 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 141 case PCI_QLOGIC_ISP8030: 142 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 143 "Qlogic ISP 83xx PCI CNA Adapter-Ethernet Function", 144 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 145 QLA_VERSION_BUILD); 146 snprintf(ver_str, sizeof(ver_str), "v%d.%d.%d", 147 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 148 QLA_VERSION_BUILD); 149 device_set_desc(dev, dev_str); 150 break; 151 default: 152 return (ENXIO); 153 } 154 155 if (bootverbose) 156 printf("%s: %s\n ", __func__, dev_str); 157 158 return (BUS_PROBE_DEFAULT); 159 } 160 161 static void 162 qla_add_sysctls(qla_host_t *ha) 163 { 164 device_t dev = ha->pci_dev; 165 166 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 167 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 168 OID_AUTO, "version", CTLFLAG_RD, 169 ver_str, 0, "Driver Version"); 170 171 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 172 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 173 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RW, 174 (void *)ha, 0, 175 qla_sysctl_get_stats, "I", "Statistics"); 176 177 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 178 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 179 OID_AUTO, "fw_version", CTLFLAG_RD, 180 ha->fw_ver_str, 0, "firmware version"); 181 182 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 183 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 184 OID_AUTO, "link_status", CTLTYPE_INT | CTLFLAG_RW, 185 (void *)ha, 0, 186 qla_sysctl_get_link_status, "I", "Link Status"); 187 188 ha->dbg_level = 0; 189 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 190 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 191 OID_AUTO, "debug", CTLFLAG_RW, 192 &ha->dbg_level, ha->dbg_level, "Debug Level"); 193 194 ha->std_replenish = QL_STD_REPLENISH_THRES; 195 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 196 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 197 OID_AUTO, "std_replenish", CTLFLAG_RW, 198 &ha->std_replenish, ha->std_replenish, 199 "Threshold for Replenishing Standard Frames"); 200 201 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 202 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 203 OID_AUTO, "ipv4_lro", 204 CTLFLAG_RD, &ha->ipv4_lro, 205 "number of ipv4 lro completions"); 206 207 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 208 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 209 OID_AUTO, "ipv6_lro", 210 CTLFLAG_RD, &ha->ipv6_lro, 211 "number of ipv6 lro completions"); 212 213 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 214 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 215 OID_AUTO, "tx_tso_frames", 216 CTLFLAG_RD, &ha->tx_tso_frames, 217 "number of Tx TSO Frames"); 218 219 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 220 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 221 OID_AUTO, "hw_vlan_tx_frames", 222 CTLFLAG_RD, &ha->hw_vlan_tx_frames, 223 "number of Tx VLAN Frames"); 224 225 return; 226 } 227 228 static void 229 qla_watchdog(void *arg) 230 { 231 qla_host_t *ha = arg; 232 qla_hw_t *hw; 233 struct ifnet *ifp; 234 uint32_t i; 235 236 hw = &ha->hw; 237 ifp = ha->ifp; 238 239 if (ha->flags.qla_watchdog_exit) { 240 ha->qla_watchdog_exited = 1; 241 return; 242 } 243 ha->qla_watchdog_exited = 0; 244 245 if (!ha->flags.qla_watchdog_pause) { 246 if (ql_hw_check_health(ha) || ha->qla_initiate_recovery || 247 (ha->msg_from_peer == QL_PEER_MSG_RESET)) { 248 ha->qla_watchdog_paused = 1; 249 ha->flags.qla_watchdog_pause = 1; 250 ha->qla_initiate_recovery = 0; 251 ha->err_inject = 0; 252 device_printf(ha->pci_dev, 253 "%s: taskqueue_enqueue(err_task) \n", __func__); 254 taskqueue_enqueue(ha->err_tq, &ha->err_task); 255 } else if (ha->flags.qla_interface_up) { 256 257 if (ha->async_event) { 258 ha->async_event = 0; 259 taskqueue_enqueue(ha->async_event_tq, 260 &ha->async_event_task); 261 } 262 263 for (i = 0; i < ha->hw.num_sds_rings; i++) { 264 qla_tx_fp_t *fp = &ha->tx_fp[i]; 265 266 if (fp->fp_taskqueue != NULL) 267 taskqueue_enqueue(fp->fp_taskqueue, 268 &fp->fp_task); 269 } 270 271 ha->qla_watchdog_paused = 0; 272 } else { 273 ha->qla_watchdog_paused = 0; 274 } 275 } else { 276 ha->qla_watchdog_paused = 1; 277 } 278 279 ha->watchdog_ticks = ha->watchdog_ticks++ % 1000; 280 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 281 qla_watchdog, ha); 282 } 283 284 /* 285 * Name: qla_pci_attach 286 * Function: attaches the device to the operating system 287 */ 288 static int 289 qla_pci_attach(device_t dev) 290 { 291 qla_host_t *ha = NULL; 292 uint32_t rsrc_len; 293 int i; 294 uint32_t num_rcvq = 0; 295 296 if ((ha = device_get_softc(dev)) == NULL) { 297 device_printf(dev, "cannot get softc\n"); 298 return (ENOMEM); 299 } 300 301 memset(ha, 0, sizeof (qla_host_t)); 302 303 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8030) { 304 device_printf(dev, "device is not ISP8030\n"); 305 return (ENXIO); 306 } 307 308 ha->pci_func = pci_get_function(dev) & 0x1; 309 310 ha->pci_dev = dev; 311 312 pci_enable_busmaster(dev); 313 314 ha->reg_rid = PCIR_BAR(0); 315 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 316 RF_ACTIVE); 317 318 if (ha->pci_reg == NULL) { 319 device_printf(dev, "unable to map any ports\n"); 320 goto qla_pci_attach_err; 321 } 322 323 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 324 ha->reg_rid); 325 326 mtx_init(&ha->hw_lock, "qla83xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 327 328 qla_add_sysctls(ha); 329 ql_hw_add_sysctls(ha); 330 331 ha->flags.lock_init = 1; 332 333 ha->reg_rid1 = PCIR_BAR(2); 334 ha->pci_reg1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 335 &ha->reg_rid1, RF_ACTIVE); 336 337 ha->msix_count = pci_msix_count(dev); 338 339 if (ha->msix_count < (ha->hw.num_sds_rings + 1)) { 340 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 341 ha->msix_count); 342 goto qla_pci_attach_err; 343 } 344 345 QL_DPRINT2(ha, (dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x" 346 " msix_count 0x%x pci_reg %p pci_reg1 %p\n", __func__, ha, 347 ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg, 348 ha->pci_reg1)); 349 350 /* initialize hardware */ 351 if (ql_init_hw(ha)) { 352 device_printf(dev, "%s: ql_init_hw failed\n", __func__); 353 goto qla_pci_attach_err; 354 } 355 356 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 357 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 358 ha->fw_ver_build); 359 snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d", 360 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 361 ha->fw_ver_build); 362 363 if (qla_get_nic_partition(ha, NULL, &num_rcvq)) { 364 device_printf(dev, "%s: qla_get_nic_partition failed\n", 365 __func__); 366 goto qla_pci_attach_err; 367 } 368 device_printf(dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x" 369 " msix_count 0x%x pci_reg %p pci_reg1 %p num_rcvq = %d\n", 370 __func__, ha, ha->pci_func, rsrc_len, ha->msix_count, 371 ha->pci_reg, ha->pci_reg1, num_rcvq); 372 373 374 #ifdef QL_ENABLE_ISCSI_TLV 375 if ((ha->msix_count < 64) || (num_rcvq != 32)) { 376 ha->hw.num_sds_rings = 15; 377 ha->hw.num_tx_rings = ha->hw.num_sds_rings * 2; 378 } 379 #endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 380 ha->hw.num_rds_rings = ha->hw.num_sds_rings; 381 382 ha->msix_count = ha->hw.num_sds_rings + 1; 383 384 if (pci_alloc_msix(dev, &ha->msix_count)) { 385 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 386 ha->msix_count); 387 ha->msix_count = 0; 388 goto qla_pci_attach_err; 389 } 390 391 ha->mbx_irq_rid = 1; 392 ha->mbx_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 393 &ha->mbx_irq_rid, 394 (RF_ACTIVE | RF_SHAREABLE)); 395 if (ha->mbx_irq == NULL) { 396 device_printf(dev, "could not allocate mbx interrupt\n"); 397 goto qla_pci_attach_err; 398 } 399 if (bus_setup_intr(dev, ha->mbx_irq, (INTR_TYPE_NET | INTR_MPSAFE), 400 NULL, ql_mbx_isr, ha, &ha->mbx_handle)) { 401 device_printf(dev, "could not setup mbx interrupt\n"); 402 goto qla_pci_attach_err; 403 } 404 405 for (i = 0; i < ha->hw.num_sds_rings; i++) { 406 ha->irq_vec[i].sds_idx = i; 407 ha->irq_vec[i].ha = ha; 408 ha->irq_vec[i].irq_rid = 2 + i; 409 410 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 411 &ha->irq_vec[i].irq_rid, 412 (RF_ACTIVE | RF_SHAREABLE)); 413 414 if (ha->irq_vec[i].irq == NULL) { 415 device_printf(dev, "could not allocate interrupt\n"); 416 goto qla_pci_attach_err; 417 } 418 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 419 (INTR_TYPE_NET | INTR_MPSAFE), 420 NULL, ql_isr, &ha->irq_vec[i], 421 &ha->irq_vec[i].handle)) { 422 device_printf(dev, "could not setup interrupt\n"); 423 goto qla_pci_attach_err; 424 } 425 426 ha->tx_fp[i].ha = ha; 427 ha->tx_fp[i].txr_idx = i; 428 429 if (qla_alloc_tx_br(ha, &ha->tx_fp[i])) { 430 device_printf(dev, "%s: could not allocate tx_br[%d]\n", 431 __func__, i); 432 goto qla_pci_attach_err; 433 } 434 } 435 436 if (qla_create_fp_taskqueues(ha) != 0) 437 goto qla_pci_attach_err; 438 439 printf("%s: mp__ncpus %d sds %d rds %d msi-x %d\n", __func__, mp_ncpus, 440 ha->hw.num_sds_rings, ha->hw.num_rds_rings, ha->msix_count); 441 442 ql_read_mac_addr(ha); 443 444 /* allocate parent dma tag */ 445 if (qla_alloc_parent_dma_tag(ha)) { 446 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 447 __func__); 448 goto qla_pci_attach_err; 449 } 450 451 /* alloc all dma buffers */ 452 if (ql_alloc_dma(ha)) { 453 device_printf(dev, "%s: ql_alloc_dma failed\n", __func__); 454 goto qla_pci_attach_err; 455 } 456 qla_get_peer(ha); 457 458 if (ql_minidump_init(ha) != 0) { 459 device_printf(dev, "%s: ql_minidump_init failed\n", __func__); 460 goto qla_pci_attach_err; 461 } 462 /* create the o.s ethernet interface */ 463 qla_init_ifnet(dev, ha); 464 465 ha->flags.qla_watchdog_active = 1; 466 ha->flags.qla_watchdog_pause = 0; 467 468 callout_init(&ha->tx_callout, TRUE); 469 ha->flags.qla_callout_init = 1; 470 471 /* create ioctl device interface */ 472 if (ql_make_cdev(ha)) { 473 device_printf(dev, "%s: ql_make_cdev failed\n", __func__); 474 goto qla_pci_attach_err; 475 } 476 477 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 478 qla_watchdog, ha); 479 480 TASK_INIT(&ha->err_task, 0, qla_error_recovery, ha); 481 ha->err_tq = taskqueue_create("qla_errq", M_NOWAIT, 482 taskqueue_thread_enqueue, &ha->err_tq); 483 taskqueue_start_threads(&ha->err_tq, 1, PI_NET, "%s errq", 484 device_get_nameunit(ha->pci_dev)); 485 486 TASK_INIT(&ha->async_event_task, 0, qla_async_event, ha); 487 ha->async_event_tq = taskqueue_create("qla_asyncq", M_NOWAIT, 488 taskqueue_thread_enqueue, &ha->async_event_tq); 489 taskqueue_start_threads(&ha->async_event_tq, 1, PI_NET, "%s asyncq", 490 device_get_nameunit(ha->pci_dev)); 491 492 QL_DPRINT2(ha, (dev, "%s: exit 0\n", __func__)); 493 return (0); 494 495 qla_pci_attach_err: 496 497 qla_release(ha); 498 499 QL_DPRINT2(ha, (dev, "%s: exit ENXIO\n", __func__)); 500 return (ENXIO); 501 } 502 503 /* 504 * Name: qla_pci_detach 505 * Function: Unhooks the device from the operating system 506 */ 507 static int 508 qla_pci_detach(device_t dev) 509 { 510 qla_host_t *ha = NULL; 511 struct ifnet *ifp; 512 513 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 514 515 if ((ha = device_get_softc(dev)) == NULL) { 516 device_printf(dev, "cannot get softc\n"); 517 return (ENOMEM); 518 } 519 520 ifp = ha->ifp; 521 522 (void)QLA_LOCK(ha, __func__, 0); 523 qla_stop(ha); 524 QLA_UNLOCK(ha, __func__); 525 526 qla_release(ha); 527 528 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__)); 529 530 return (0); 531 } 532 533 /* 534 * SYSCTL Related Callbacks 535 */ 536 static int 537 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 538 { 539 int err, ret = 0; 540 qla_host_t *ha; 541 542 err = sysctl_handle_int(oidp, &ret, 0, req); 543 544 if (err || !req->newptr) 545 return (err); 546 547 if (ret == 1) { 548 ha = (qla_host_t *)arg1; 549 ql_get_stats(ha); 550 } 551 return (err); 552 } 553 static int 554 qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS) 555 { 556 int err, ret = 0; 557 qla_host_t *ha; 558 559 err = sysctl_handle_int(oidp, &ret, 0, req); 560 561 if (err || !req->newptr) 562 return (err); 563 564 if (ret == 1) { 565 ha = (qla_host_t *)arg1; 566 ql_hw_link_status(ha); 567 } 568 return (err); 569 } 570 571 /* 572 * Name: qla_release 573 * Function: Releases the resources allocated for the device 574 */ 575 static void 576 qla_release(qla_host_t *ha) 577 { 578 device_t dev; 579 int i; 580 581 dev = ha->pci_dev; 582 583 if (ha->async_event_tq) { 584 taskqueue_drain(ha->async_event_tq, &ha->async_event_task); 585 taskqueue_free(ha->async_event_tq); 586 } 587 588 if (ha->err_tq) { 589 taskqueue_drain(ha->err_tq, &ha->err_task); 590 taskqueue_free(ha->err_tq); 591 } 592 593 ql_del_cdev(ha); 594 595 if (ha->flags.qla_watchdog_active) { 596 ha->flags.qla_watchdog_exit = 1; 597 598 while (ha->qla_watchdog_exited == 0) 599 qla_mdelay(__func__, 1); 600 } 601 602 if (ha->flags.qla_callout_init) 603 callout_stop(&ha->tx_callout); 604 605 if (ha->ifp != NULL) 606 ether_ifdetach(ha->ifp); 607 608 ql_free_dma(ha); 609 qla_free_parent_dma_tag(ha); 610 611 if (ha->mbx_handle) 612 (void)bus_teardown_intr(dev, ha->mbx_irq, ha->mbx_handle); 613 614 if (ha->mbx_irq) 615 (void) bus_release_resource(dev, SYS_RES_IRQ, ha->mbx_irq_rid, 616 ha->mbx_irq); 617 618 for (i = 0; i < ha->hw.num_sds_rings; i++) { 619 620 if (ha->irq_vec[i].handle) { 621 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 622 ha->irq_vec[i].handle); 623 } 624 625 if (ha->irq_vec[i].irq) { 626 (void)bus_release_resource(dev, SYS_RES_IRQ, 627 ha->irq_vec[i].irq_rid, 628 ha->irq_vec[i].irq); 629 } 630 631 qla_free_tx_br(ha, &ha->tx_fp[i]); 632 } 633 qla_destroy_fp_taskqueues(ha); 634 635 if (ha->msix_count) 636 pci_release_msi(dev); 637 638 if (ha->flags.lock_init) { 639 mtx_destroy(&ha->hw_lock); 640 } 641 642 if (ha->pci_reg) 643 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 644 ha->pci_reg); 645 646 if (ha->pci_reg1) 647 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid1, 648 ha->pci_reg1); 649 } 650 651 /* 652 * DMA Related Functions 653 */ 654 655 static void 656 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 657 { 658 *((bus_addr_t *)arg) = 0; 659 660 if (error) { 661 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 662 return; 663 } 664 665 *((bus_addr_t *)arg) = segs[0].ds_addr; 666 667 return; 668 } 669 670 int 671 ql_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 672 { 673 int ret = 0; 674 device_t dev; 675 bus_addr_t b_addr; 676 677 dev = ha->pci_dev; 678 679 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 680 681 ret = bus_dma_tag_create( 682 ha->parent_tag,/* parent */ 683 dma_buf->alignment, 684 ((bus_size_t)(1ULL << 32)),/* boundary */ 685 BUS_SPACE_MAXADDR, /* lowaddr */ 686 BUS_SPACE_MAXADDR, /* highaddr */ 687 NULL, NULL, /* filter, filterarg */ 688 dma_buf->size, /* maxsize */ 689 1, /* nsegments */ 690 dma_buf->size, /* maxsegsize */ 691 0, /* flags */ 692 NULL, NULL, /* lockfunc, lockarg */ 693 &dma_buf->dma_tag); 694 695 if (ret) { 696 device_printf(dev, "%s: could not create dma tag\n", __func__); 697 goto ql_alloc_dmabuf_exit; 698 } 699 ret = bus_dmamem_alloc(dma_buf->dma_tag, 700 (void **)&dma_buf->dma_b, 701 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 702 &dma_buf->dma_map); 703 if (ret) { 704 bus_dma_tag_destroy(dma_buf->dma_tag); 705 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 706 goto ql_alloc_dmabuf_exit; 707 } 708 709 ret = bus_dmamap_load(dma_buf->dma_tag, 710 dma_buf->dma_map, 711 dma_buf->dma_b, 712 dma_buf->size, 713 qla_dmamap_callback, 714 &b_addr, BUS_DMA_NOWAIT); 715 716 if (ret || !b_addr) { 717 bus_dma_tag_destroy(dma_buf->dma_tag); 718 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 719 dma_buf->dma_map); 720 ret = -1; 721 goto ql_alloc_dmabuf_exit; 722 } 723 724 dma_buf->dma_addr = b_addr; 725 726 ql_alloc_dmabuf_exit: 727 QL_DPRINT2(ha, (dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 728 __func__, ret, (void *)dma_buf->dma_tag, 729 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 730 dma_buf->size)); 731 732 return ret; 733 } 734 735 void 736 ql_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 737 { 738 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 739 bus_dma_tag_destroy(dma_buf->dma_tag); 740 } 741 742 static int 743 qla_alloc_parent_dma_tag(qla_host_t *ha) 744 { 745 int ret; 746 device_t dev; 747 748 dev = ha->pci_dev; 749 750 /* 751 * Allocate parent DMA Tag 752 */ 753 ret = bus_dma_tag_create( 754 bus_get_dma_tag(dev), /* parent */ 755 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 756 BUS_SPACE_MAXADDR, /* lowaddr */ 757 BUS_SPACE_MAXADDR, /* highaddr */ 758 NULL, NULL, /* filter, filterarg */ 759 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 760 0, /* nsegments */ 761 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 762 0, /* flags */ 763 NULL, NULL, /* lockfunc, lockarg */ 764 &ha->parent_tag); 765 766 if (ret) { 767 device_printf(dev, "%s: could not create parent dma tag\n", 768 __func__); 769 return (-1); 770 } 771 772 ha->flags.parent_tag = 1; 773 774 return (0); 775 } 776 777 static void 778 qla_free_parent_dma_tag(qla_host_t *ha) 779 { 780 if (ha->flags.parent_tag) { 781 bus_dma_tag_destroy(ha->parent_tag); 782 ha->flags.parent_tag = 0; 783 } 784 } 785 786 /* 787 * Name: qla_init_ifnet 788 * Function: Creates the Network Device Interface and Registers it with the O.S 789 */ 790 791 static void 792 qla_init_ifnet(device_t dev, qla_host_t *ha) 793 { 794 struct ifnet *ifp; 795 796 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 797 798 ifp = ha->ifp = if_alloc(IFT_ETHER); 799 800 if (ifp == NULL) 801 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 802 803 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 804 805 ifp->if_baudrate = IF_Gbps(10); 806 ifp->if_capabilities = IFCAP_LINKSTATE; 807 ifp->if_mtu = ETHERMTU; 808 809 ifp->if_init = qla_init; 810 ifp->if_softc = ha; 811 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 812 ifp->if_ioctl = qla_ioctl; 813 814 ifp->if_transmit = qla_transmit; 815 ifp->if_qflush = qla_qflush; 816 817 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha)); 818 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha); 819 IFQ_SET_READY(&ifp->if_snd); 820 821 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 822 823 ether_ifattach(ifp, qla_get_mac_addr(ha)); 824 825 ifp->if_capabilities |= IFCAP_HWCSUM | 826 IFCAP_TSO4 | 827 IFCAP_JUMBO_MTU | 828 IFCAP_VLAN_HWTAGGING | 829 IFCAP_VLAN_MTU | 830 IFCAP_VLAN_HWTSO | 831 IFCAP_LRO; 832 833 ifp->if_capenable = ifp->if_capabilities; 834 835 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 836 837 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 838 839 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 840 NULL); 841 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 842 843 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 844 845 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__)); 846 847 return; 848 } 849 850 static void 851 qla_init_locked(qla_host_t *ha) 852 { 853 struct ifnet *ifp = ha->ifp; 854 855 qla_stop(ha); 856 857 if (qla_alloc_xmt_bufs(ha) != 0) 858 return; 859 860 qla_confirm_9kb_enable(ha); 861 862 if (qla_alloc_rcv_bufs(ha) != 0) 863 return; 864 865 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 866 867 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO; 868 869 ha->flags.stop_rcv = 0; 870 if (ql_init_hw_if(ha) == 0) { 871 ifp = ha->ifp; 872 ifp->if_drv_flags |= IFF_DRV_RUNNING; 873 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 874 ha->flags.qla_watchdog_pause = 0; 875 ha->hw_vlan_tx_frames = 0; 876 ha->tx_tso_frames = 0; 877 ha->flags.qla_interface_up = 1; 878 } 879 880 return; 881 } 882 883 static void 884 qla_init(void *arg) 885 { 886 qla_host_t *ha; 887 888 ha = (qla_host_t *)arg; 889 890 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 891 892 (void)QLA_LOCK(ha, __func__, 0); 893 qla_init_locked(ha); 894 QLA_UNLOCK(ha, __func__); 895 896 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 897 } 898 899 static int 900 qla_set_multi(qla_host_t *ha, uint32_t add_multi) 901 { 902 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 903 struct ifmultiaddr *ifma; 904 int mcnt = 0; 905 struct ifnet *ifp = ha->ifp; 906 int ret = 0; 907 908 if_maddr_rlock(ifp); 909 910 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 911 912 if (ifma->ifma_addr->sa_family != AF_LINK) 913 continue; 914 915 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 916 break; 917 918 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 919 &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 920 921 mcnt++; 922 } 923 924 if_maddr_runlock(ifp); 925 926 //if (QLA_LOCK(ha, __func__, 1) == 0) { 927 // ret = ql_hw_set_multi(ha, mta, mcnt, add_multi); 928 // QLA_UNLOCK(ha, __func__); 929 //} 930 QLA_LOCK(ha, __func__, 1); 931 ret = ql_hw_set_multi(ha, mta, mcnt, add_multi); 932 QLA_UNLOCK(ha, __func__); 933 934 return (ret); 935 } 936 937 static int 938 qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 939 { 940 int ret = 0; 941 struct ifreq *ifr = (struct ifreq *)data; 942 struct ifaddr *ifa = (struct ifaddr *)data; 943 qla_host_t *ha; 944 945 ha = (qla_host_t *)ifp->if_softc; 946 947 switch (cmd) { 948 case SIOCSIFADDR: 949 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 950 __func__, cmd)); 951 952 if (ifa->ifa_addr->sa_family == AF_INET) { 953 ifp->if_flags |= IFF_UP; 954 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 955 (void)QLA_LOCK(ha, __func__, 0); 956 qla_init_locked(ha); 957 QLA_UNLOCK(ha, __func__); 958 } 959 QL_DPRINT4(ha, (ha->pci_dev, 960 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 961 __func__, cmd, 962 ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 963 964 arp_ifinit(ifp, ifa); 965 } else { 966 ether_ioctl(ifp, cmd, data); 967 } 968 break; 969 970 case SIOCSIFMTU: 971 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 972 __func__, cmd)); 973 974 if (ifr->ifr_mtu > QLA_MAX_MTU) { 975 ret = EINVAL; 976 } else { 977 (void) QLA_LOCK(ha, __func__, 0); 978 ifp->if_mtu = ifr->ifr_mtu; 979 ha->max_frame_size = 980 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 981 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 982 ret = ql_set_max_mtu(ha, ha->max_frame_size, 983 ha->hw.rcv_cntxt_id); 984 } 985 986 if (ifp->if_mtu > ETHERMTU) 987 ha->std_replenish = QL_JUMBO_REPLENISH_THRES; 988 else 989 ha->std_replenish = QL_STD_REPLENISH_THRES; 990 991 992 QLA_UNLOCK(ha, __func__); 993 994 if (ret) 995 ret = EINVAL; 996 } 997 998 break; 999 1000 case SIOCSIFFLAGS: 1001 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 1002 __func__, cmd)); 1003 1004 (void)QLA_LOCK(ha, __func__, 0); 1005 1006 if (ifp->if_flags & IFF_UP) { 1007 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1008 if ((ifp->if_flags ^ ha->if_flags) & 1009 IFF_PROMISC) { 1010 ret = ql_set_promisc(ha); 1011 } else if ((ifp->if_flags ^ ha->if_flags) & 1012 IFF_ALLMULTI) { 1013 ret = ql_set_allmulti(ha); 1014 } 1015 } else { 1016 qla_init_locked(ha); 1017 ha->max_frame_size = ifp->if_mtu + 1018 ETHER_HDR_LEN + ETHER_CRC_LEN; 1019 ret = ql_set_max_mtu(ha, ha->max_frame_size, 1020 ha->hw.rcv_cntxt_id); 1021 } 1022 } else { 1023 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1024 qla_stop(ha); 1025 ha->if_flags = ifp->if_flags; 1026 } 1027 1028 QLA_UNLOCK(ha, __func__); 1029 break; 1030 1031 case SIOCADDMULTI: 1032 QL_DPRINT4(ha, (ha->pci_dev, 1033 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 1034 1035 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1036 if (qla_set_multi(ha, 1)) 1037 ret = EINVAL; 1038 } 1039 break; 1040 1041 case SIOCDELMULTI: 1042 QL_DPRINT4(ha, (ha->pci_dev, 1043 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 1044 1045 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1046 if (qla_set_multi(ha, 0)) 1047 ret = EINVAL; 1048 } 1049 break; 1050 1051 case SIOCSIFMEDIA: 1052 case SIOCGIFMEDIA: 1053 QL_DPRINT4(ha, (ha->pci_dev, 1054 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 1055 __func__, cmd)); 1056 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 1057 break; 1058 1059 case SIOCSIFCAP: 1060 { 1061 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1062 1063 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 1064 __func__, cmd)); 1065 1066 if (mask & IFCAP_HWCSUM) 1067 ifp->if_capenable ^= IFCAP_HWCSUM; 1068 if (mask & IFCAP_TSO4) 1069 ifp->if_capenable ^= IFCAP_TSO4; 1070 if (mask & IFCAP_VLAN_HWTAGGING) 1071 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 1072 if (mask & IFCAP_VLAN_HWTSO) 1073 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 1074 1075 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1076 qla_init(ha); 1077 1078 VLAN_CAPABILITIES(ifp); 1079 break; 1080 } 1081 1082 default: 1083 QL_DPRINT4(ha, (ha->pci_dev, "%s: default (0x%lx)\n", 1084 __func__, cmd)); 1085 ret = ether_ioctl(ifp, cmd, data); 1086 break; 1087 } 1088 1089 return (ret); 1090 } 1091 1092 static int 1093 qla_media_change(struct ifnet *ifp) 1094 { 1095 qla_host_t *ha; 1096 struct ifmedia *ifm; 1097 int ret = 0; 1098 1099 ha = (qla_host_t *)ifp->if_softc; 1100 1101 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1102 1103 ifm = &ha->media; 1104 1105 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1106 ret = EINVAL; 1107 1108 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1109 1110 return (ret); 1111 } 1112 1113 static void 1114 qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1115 { 1116 qla_host_t *ha; 1117 1118 ha = (qla_host_t *)ifp->if_softc; 1119 1120 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1121 1122 ifmr->ifm_status = IFM_AVALID; 1123 ifmr->ifm_active = IFM_ETHER; 1124 1125 ql_update_link_state(ha); 1126 if (ha->hw.link_up) { 1127 ifmr->ifm_status |= IFM_ACTIVE; 1128 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 1129 } 1130 1131 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit (%s)\n", __func__,\ 1132 (ha->hw.link_up ? "link_up" : "link_down"))); 1133 1134 return; 1135 } 1136 1137 1138 static int 1139 qla_send(qla_host_t *ha, struct mbuf **m_headp, uint32_t txr_idx, 1140 uint32_t iscsi_pdu) 1141 { 1142 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1143 bus_dmamap_t map; 1144 int nsegs; 1145 int ret = -1; 1146 uint32_t tx_idx; 1147 struct mbuf *m_head = *m_headp; 1148 1149 QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1150 1151 tx_idx = ha->hw.tx_cntxt[txr_idx].txr_next; 1152 map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map; 1153 1154 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1155 BUS_DMA_NOWAIT); 1156 1157 if (ret == EFBIG) { 1158 1159 struct mbuf *m; 1160 1161 QL_DPRINT8(ha, (ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1162 m_head->m_pkthdr.len)); 1163 1164 m = m_defrag(m_head, M_NOWAIT); 1165 if (m == NULL) { 1166 ha->err_tx_defrag++; 1167 m_freem(m_head); 1168 *m_headp = NULL; 1169 device_printf(ha->pci_dev, 1170 "%s: m_defrag() = NULL [%d]\n", 1171 __func__, ret); 1172 return (ENOBUFS); 1173 } 1174 m_head = m; 1175 *m_headp = m_head; 1176 1177 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1178 segs, &nsegs, BUS_DMA_NOWAIT))) { 1179 1180 ha->err_tx_dmamap_load++; 1181 1182 device_printf(ha->pci_dev, 1183 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1184 __func__, ret, m_head->m_pkthdr.len); 1185 1186 if (ret != ENOMEM) { 1187 m_freem(m_head); 1188 *m_headp = NULL; 1189 } 1190 return (ret); 1191 } 1192 1193 } else if (ret) { 1194 1195 ha->err_tx_dmamap_load++; 1196 1197 device_printf(ha->pci_dev, 1198 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1199 __func__, ret, m_head->m_pkthdr.len); 1200 1201 if (ret != ENOMEM) { 1202 m_freem(m_head); 1203 *m_headp = NULL; 1204 } 1205 return (ret); 1206 } 1207 1208 QL_ASSERT(ha, (nsegs != 0), ("qla_send: empty packet")); 1209 1210 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1211 1212 if (!(ret = ql_hw_send(ha, segs, nsegs, tx_idx, m_head, txr_idx, 1213 iscsi_pdu))) { 1214 ha->tx_ring[txr_idx].count++; 1215 ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head = m_head; 1216 } else { 1217 if (ret == EINVAL) { 1218 if (m_head) 1219 m_freem(m_head); 1220 *m_headp = NULL; 1221 } 1222 } 1223 1224 QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1225 return (ret); 1226 } 1227 1228 static int 1229 qla_alloc_tx_br(qla_host_t *ha, qla_tx_fp_t *fp) 1230 { 1231 snprintf(fp->tx_mtx_name, sizeof(fp->tx_mtx_name), 1232 "qla%d_fp%d_tx_mq_lock", ha->pci_func, fp->txr_idx); 1233 1234 mtx_init(&fp->tx_mtx, fp->tx_mtx_name, NULL, MTX_DEF); 1235 1236 fp->tx_br = buf_ring_alloc(NUM_TX_DESCRIPTORS, M_DEVBUF, 1237 M_NOWAIT, &fp->tx_mtx); 1238 if (fp->tx_br == NULL) { 1239 QL_DPRINT1(ha, (ha->pci_dev, "buf_ring_alloc failed for " 1240 " fp[%d, %d]\n", ha->pci_func, fp->txr_idx)); 1241 return (-ENOMEM); 1242 } 1243 return 0; 1244 } 1245 1246 static void 1247 qla_free_tx_br(qla_host_t *ha, qla_tx_fp_t *fp) 1248 { 1249 struct mbuf *mp; 1250 struct ifnet *ifp = ha->ifp; 1251 1252 if (mtx_initialized(&fp->tx_mtx)) { 1253 1254 if (fp->tx_br != NULL) { 1255 1256 mtx_lock(&fp->tx_mtx); 1257 1258 while ((mp = drbr_dequeue(ifp, fp->tx_br)) != NULL) { 1259 m_freem(mp); 1260 } 1261 1262 mtx_unlock(&fp->tx_mtx); 1263 1264 buf_ring_free(fp->tx_br, M_DEVBUF); 1265 fp->tx_br = NULL; 1266 } 1267 mtx_destroy(&fp->tx_mtx); 1268 } 1269 return; 1270 } 1271 1272 static void 1273 qla_fp_taskqueue(void *context, int pending) 1274 { 1275 qla_tx_fp_t *fp; 1276 qla_host_t *ha; 1277 struct ifnet *ifp; 1278 struct mbuf *mp; 1279 int ret; 1280 uint32_t txr_idx; 1281 uint32_t iscsi_pdu = 0; 1282 uint32_t rx_pkts_left; 1283 1284 fp = context; 1285 1286 if (fp == NULL) 1287 return; 1288 1289 ha = (qla_host_t *)fp->ha; 1290 1291 ifp = ha->ifp; 1292 1293 txr_idx = fp->txr_idx; 1294 1295 mtx_lock(&fp->tx_mtx); 1296 1297 if (((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1298 IFF_DRV_RUNNING) || (!ha->hw.link_up)) { 1299 mtx_unlock(&fp->tx_mtx); 1300 goto qla_fp_taskqueue_exit; 1301 } 1302 1303 rx_pkts_left = ql_rcv_isr(ha, fp->txr_idx, 64); 1304 1305 #ifdef QL_ENABLE_ISCSI_TLV 1306 ql_hw_tx_done_locked(ha, fp->txr_idx); 1307 ql_hw_tx_done_locked(ha, (fp->txr_idx + (ha->hw.num_tx_rings >> 1))); 1308 txr_idx = txr_idx + (ha->hw.num_tx_rings >> 1); 1309 #else 1310 ql_hw_tx_done_locked(ha, fp->txr_idx); 1311 #endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 1312 1313 mp = drbr_peek(ifp, fp->tx_br); 1314 1315 while (mp != NULL) { 1316 1317 if (M_HASHTYPE_GET(mp) != M_HASHTYPE_NONE) { 1318 #ifdef QL_ENABLE_ISCSI_TLV 1319 if (ql_iscsi_pdu(ha, mp) == 0) { 1320 iscsi_pdu = 1; 1321 } 1322 #endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 1323 } 1324 1325 ret = qla_send(ha, &mp, txr_idx, iscsi_pdu); 1326 1327 if (ret) { 1328 if (mp != NULL) 1329 drbr_putback(ifp, fp->tx_br, mp); 1330 else { 1331 drbr_advance(ifp, fp->tx_br); 1332 } 1333 1334 mtx_unlock(&fp->tx_mtx); 1335 1336 goto qla_fp_taskqueue_exit0; 1337 } else { 1338 drbr_advance(ifp, fp->tx_br); 1339 } 1340 1341 mp = drbr_peek(ifp, fp->tx_br); 1342 } 1343 1344 mtx_unlock(&fp->tx_mtx); 1345 1346 qla_fp_taskqueue_exit0: 1347 1348 if (rx_pkts_left || ((mp != NULL) && ret)) { 1349 taskqueue_enqueue(fp->fp_taskqueue, &fp->fp_task); 1350 } else { 1351 if (!ha->flags.stop_rcv) { 1352 QL_ENABLE_INTERRUPTS(ha, fp->txr_idx); 1353 } 1354 } 1355 1356 qla_fp_taskqueue_exit: 1357 1358 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = %d\n", __func__, ret)); 1359 return; 1360 } 1361 1362 static int 1363 qla_create_fp_taskqueues(qla_host_t *ha) 1364 { 1365 int i; 1366 uint8_t tq_name[32]; 1367 1368 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1369 1370 qla_tx_fp_t *fp = &ha->tx_fp[i]; 1371 1372 bzero(tq_name, sizeof (tq_name)); 1373 snprintf(tq_name, sizeof (tq_name), "ql_fp_tq_%d", i); 1374 1375 TASK_INIT(&fp->fp_task, 0, qla_fp_taskqueue, fp); 1376 1377 fp->fp_taskqueue = taskqueue_create_fast(tq_name, M_NOWAIT, 1378 taskqueue_thread_enqueue, 1379 &fp->fp_taskqueue); 1380 1381 if (fp->fp_taskqueue == NULL) 1382 return (-1); 1383 1384 taskqueue_start_threads(&fp->fp_taskqueue, 1, PI_NET, "%s", 1385 tq_name); 1386 1387 QL_DPRINT1(ha, (ha->pci_dev, "%s: %p\n", __func__, 1388 fp->fp_taskqueue)); 1389 } 1390 1391 return (0); 1392 } 1393 1394 static void 1395 qla_destroy_fp_taskqueues(qla_host_t *ha) 1396 { 1397 int i; 1398 1399 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1400 1401 qla_tx_fp_t *fp = &ha->tx_fp[i]; 1402 1403 if (fp->fp_taskqueue != NULL) { 1404 taskqueue_drain(fp->fp_taskqueue, &fp->fp_task); 1405 taskqueue_free(fp->fp_taskqueue); 1406 fp->fp_taskqueue = NULL; 1407 } 1408 } 1409 return; 1410 } 1411 1412 static void 1413 qla_drain_fp_taskqueues(qla_host_t *ha) 1414 { 1415 int i; 1416 1417 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1418 qla_tx_fp_t *fp = &ha->tx_fp[i]; 1419 1420 if (fp->fp_taskqueue != NULL) { 1421 taskqueue_drain(fp->fp_taskqueue, &fp->fp_task); 1422 } 1423 } 1424 return; 1425 } 1426 1427 static int 1428 qla_transmit(struct ifnet *ifp, struct mbuf *mp) 1429 { 1430 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 1431 qla_tx_fp_t *fp; 1432 int rss_id = 0; 1433 int ret = 0; 1434 1435 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1436 1437 #if __FreeBSD_version >= 1100000 1438 if (M_HASHTYPE_GET(mp) != M_HASHTYPE_NONE) 1439 #else 1440 if (mp->m_flags & M_FLOWID) 1441 #endif 1442 rss_id = (mp->m_pkthdr.flowid & Q8_RSS_IND_TBL_MAX_IDX) % 1443 ha->hw.num_sds_rings; 1444 fp = &ha->tx_fp[rss_id]; 1445 1446 if (fp->tx_br == NULL) { 1447 ret = EINVAL; 1448 goto qla_transmit_exit; 1449 } 1450 1451 if (mp != NULL) { 1452 ret = drbr_enqueue(ifp, fp->tx_br, mp); 1453 } 1454 1455 if (fp->fp_taskqueue != NULL) 1456 taskqueue_enqueue(fp->fp_taskqueue, &fp->fp_task); 1457 1458 ret = 0; 1459 1460 qla_transmit_exit: 1461 1462 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = %d\n", __func__, ret)); 1463 return ret; 1464 } 1465 1466 static void 1467 qla_qflush(struct ifnet *ifp) 1468 { 1469 int i; 1470 qla_tx_fp_t *fp; 1471 struct mbuf *mp; 1472 qla_host_t *ha; 1473 1474 ha = (qla_host_t *)ifp->if_softc; 1475 1476 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1477 1478 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1479 1480 fp = &ha->tx_fp[i]; 1481 1482 if (fp == NULL) 1483 continue; 1484 1485 if (fp->tx_br) { 1486 mtx_lock(&fp->tx_mtx); 1487 1488 while ((mp = drbr_dequeue(ifp, fp->tx_br)) != NULL) { 1489 m_freem(mp); 1490 } 1491 mtx_unlock(&fp->tx_mtx); 1492 } 1493 } 1494 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1495 1496 return; 1497 } 1498 1499 1500 static void 1501 qla_stop(qla_host_t *ha) 1502 { 1503 struct ifnet *ifp = ha->ifp; 1504 device_t dev; 1505 int i = 0; 1506 1507 dev = ha->pci_dev; 1508 1509 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1510 1511 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1512 qla_tx_fp_t *fp; 1513 1514 fp = &ha->tx_fp[i]; 1515 1516 if (fp == NULL) 1517 continue; 1518 1519 if (fp->tx_br != NULL) { 1520 mtx_lock(&fp->tx_mtx); 1521 mtx_unlock(&fp->tx_mtx); 1522 } 1523 } 1524 1525 ha->flags.qla_watchdog_pause = 1; 1526 1527 while (!ha->qla_watchdog_paused) 1528 qla_mdelay(__func__, 1); 1529 1530 ha->flags.qla_interface_up = 0; 1531 1532 qla_drain_fp_taskqueues(ha); 1533 1534 ql_hw_stop_rcv(ha); 1535 1536 ql_del_hw_if(ha); 1537 1538 qla_free_xmt_bufs(ha); 1539 qla_free_rcv_bufs(ha); 1540 1541 return; 1542 } 1543 1544 /* 1545 * Buffer Management Functions for Transmit and Receive Rings 1546 */ 1547 static int 1548 qla_alloc_xmt_bufs(qla_host_t *ha) 1549 { 1550 int ret = 0; 1551 uint32_t i, j; 1552 qla_tx_buf_t *txb; 1553 1554 if (bus_dma_tag_create(NULL, /* parent */ 1555 1, 0, /* alignment, bounds */ 1556 BUS_SPACE_MAXADDR, /* lowaddr */ 1557 BUS_SPACE_MAXADDR, /* highaddr */ 1558 NULL, NULL, /* filter, filterarg */ 1559 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1560 QLA_MAX_SEGMENTS, /* nsegments */ 1561 PAGE_SIZE, /* maxsegsize */ 1562 BUS_DMA_ALLOCNOW, /* flags */ 1563 NULL, /* lockfunc */ 1564 NULL, /* lockfuncarg */ 1565 &ha->tx_tag)) { 1566 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1567 __func__); 1568 return (ENOMEM); 1569 } 1570 1571 for (i = 0; i < ha->hw.num_tx_rings; i++) { 1572 bzero((void *)ha->tx_ring[i].tx_buf, 1573 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1574 } 1575 1576 for (j = 0; j < ha->hw.num_tx_rings; j++) { 1577 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) { 1578 1579 txb = &ha->tx_ring[j].tx_buf[i]; 1580 1581 if ((ret = bus_dmamap_create(ha->tx_tag, 1582 BUS_DMA_NOWAIT, &txb->map))) { 1583 1584 ha->err_tx_dmamap_create++; 1585 device_printf(ha->pci_dev, 1586 "%s: bus_dmamap_create failed[%d]\n", 1587 __func__, ret); 1588 1589 qla_free_xmt_bufs(ha); 1590 1591 return (ret); 1592 } 1593 } 1594 } 1595 1596 return 0; 1597 } 1598 1599 /* 1600 * Release mbuf after it sent on the wire 1601 */ 1602 static void 1603 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1604 { 1605 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1606 1607 if (txb->m_head && txb->map) { 1608 1609 bus_dmamap_unload(ha->tx_tag, txb->map); 1610 1611 m_freem(txb->m_head); 1612 txb->m_head = NULL; 1613 } 1614 1615 if (txb->map) 1616 bus_dmamap_destroy(ha->tx_tag, txb->map); 1617 1618 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1619 } 1620 1621 static void 1622 qla_free_xmt_bufs(qla_host_t *ha) 1623 { 1624 int i, j; 1625 1626 for (j = 0; j < ha->hw.num_tx_rings; j++) { 1627 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1628 qla_clear_tx_buf(ha, &ha->tx_ring[j].tx_buf[i]); 1629 } 1630 1631 if (ha->tx_tag != NULL) { 1632 bus_dma_tag_destroy(ha->tx_tag); 1633 ha->tx_tag = NULL; 1634 } 1635 1636 for (i = 0; i < ha->hw.num_tx_rings; i++) { 1637 bzero((void *)ha->tx_ring[i].tx_buf, 1638 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1639 } 1640 return; 1641 } 1642 1643 1644 static int 1645 qla_alloc_rcv_std(qla_host_t *ha) 1646 { 1647 int i, j, k, r, ret = 0; 1648 qla_rx_buf_t *rxb; 1649 qla_rx_ring_t *rx_ring; 1650 1651 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1652 1653 rx_ring = &ha->rx_ring[r]; 1654 1655 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1656 1657 rxb = &rx_ring->rx_buf[i]; 1658 1659 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, 1660 &rxb->map); 1661 1662 if (ret) { 1663 device_printf(ha->pci_dev, 1664 "%s: dmamap[%d, %d] failed\n", 1665 __func__, r, i); 1666 1667 for (k = 0; k < r; k++) { 1668 for (j = 0; j < NUM_RX_DESCRIPTORS; 1669 j++) { 1670 rxb = &ha->rx_ring[k].rx_buf[j]; 1671 bus_dmamap_destroy(ha->rx_tag, 1672 rxb->map); 1673 } 1674 } 1675 1676 for (j = 0; j < i; j++) { 1677 bus_dmamap_destroy(ha->rx_tag, 1678 rx_ring->rx_buf[j].map); 1679 } 1680 goto qla_alloc_rcv_std_err; 1681 } 1682 } 1683 } 1684 1685 qla_init_hw_rcv_descriptors(ha); 1686 1687 1688 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1689 1690 rx_ring = &ha->rx_ring[r]; 1691 1692 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1693 rxb = &rx_ring->rx_buf[i]; 1694 rxb->handle = i; 1695 if (!(ret = ql_get_mbuf(ha, rxb, NULL))) { 1696 /* 1697 * set the physical address in the 1698 * corresponding descriptor entry in the 1699 * receive ring/queue for the hba 1700 */ 1701 qla_set_hw_rcv_desc(ha, r, i, rxb->handle, 1702 rxb->paddr, 1703 (rxb->m_head)->m_pkthdr.len); 1704 } else { 1705 device_printf(ha->pci_dev, 1706 "%s: ql_get_mbuf [%d, %d] failed\n", 1707 __func__, r, i); 1708 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1709 goto qla_alloc_rcv_std_err; 1710 } 1711 } 1712 } 1713 return 0; 1714 1715 qla_alloc_rcv_std_err: 1716 return (-1); 1717 } 1718 1719 static void 1720 qla_free_rcv_std(qla_host_t *ha) 1721 { 1722 int i, r; 1723 qla_rx_buf_t *rxb; 1724 1725 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1726 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1727 rxb = &ha->rx_ring[r].rx_buf[i]; 1728 if (rxb->m_head != NULL) { 1729 bus_dmamap_unload(ha->rx_tag, rxb->map); 1730 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1731 m_freem(rxb->m_head); 1732 rxb->m_head = NULL; 1733 } 1734 } 1735 } 1736 return; 1737 } 1738 1739 static int 1740 qla_alloc_rcv_bufs(qla_host_t *ha) 1741 { 1742 int i, ret = 0; 1743 1744 if (bus_dma_tag_create(NULL, /* parent */ 1745 1, 0, /* alignment, bounds */ 1746 BUS_SPACE_MAXADDR, /* lowaddr */ 1747 BUS_SPACE_MAXADDR, /* highaddr */ 1748 NULL, NULL, /* filter, filterarg */ 1749 MJUM9BYTES, /* maxsize */ 1750 1, /* nsegments */ 1751 MJUM9BYTES, /* maxsegsize */ 1752 BUS_DMA_ALLOCNOW, /* flags */ 1753 NULL, /* lockfunc */ 1754 NULL, /* lockfuncarg */ 1755 &ha->rx_tag)) { 1756 1757 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1758 __func__); 1759 1760 return (ENOMEM); 1761 } 1762 1763 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS)); 1764 1765 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1766 ha->hw.sds[i].sdsr_next = 0; 1767 ha->hw.sds[i].rxb_free = NULL; 1768 ha->hw.sds[i].rx_free = 0; 1769 } 1770 1771 ret = qla_alloc_rcv_std(ha); 1772 1773 return (ret); 1774 } 1775 1776 static void 1777 qla_free_rcv_bufs(qla_host_t *ha) 1778 { 1779 int i; 1780 1781 qla_free_rcv_std(ha); 1782 1783 if (ha->rx_tag != NULL) { 1784 bus_dma_tag_destroy(ha->rx_tag); 1785 ha->rx_tag = NULL; 1786 } 1787 1788 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS)); 1789 1790 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1791 ha->hw.sds[i].sdsr_next = 0; 1792 ha->hw.sds[i].rxb_free = NULL; 1793 ha->hw.sds[i].rx_free = 0; 1794 } 1795 1796 return; 1797 } 1798 1799 int 1800 ql_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp) 1801 { 1802 register struct mbuf *mp = nmp; 1803 struct ifnet *ifp; 1804 int ret = 0; 1805 uint32_t offset; 1806 bus_dma_segment_t segs[1]; 1807 int nsegs, mbuf_size; 1808 1809 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1810 1811 ifp = ha->ifp; 1812 1813 if (ha->hw.enable_9kb) 1814 mbuf_size = MJUM9BYTES; 1815 else 1816 mbuf_size = MCLBYTES; 1817 1818 if (mp == NULL) { 1819 1820 if (QL_ERR_INJECT(ha, INJCT_M_GETCL_M_GETJCL_FAILURE)) 1821 return(-1); 1822 1823 if (ha->hw.enable_9kb) 1824 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, mbuf_size); 1825 else 1826 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1827 1828 if (mp == NULL) { 1829 ha->err_m_getcl++; 1830 ret = ENOBUFS; 1831 device_printf(ha->pci_dev, 1832 "%s: m_getcl failed\n", __func__); 1833 goto exit_ql_get_mbuf; 1834 } 1835 mp->m_len = mp->m_pkthdr.len = mbuf_size; 1836 } else { 1837 mp->m_len = mp->m_pkthdr.len = mbuf_size; 1838 mp->m_data = mp->m_ext.ext_buf; 1839 mp->m_next = NULL; 1840 } 1841 1842 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1843 if (offset) { 1844 offset = 8 - offset; 1845 m_adj(mp, offset); 1846 } 1847 1848 /* 1849 * Using memory from the mbuf cluster pool, invoke the bus_dma 1850 * machinery to arrange the memory mapping. 1851 */ 1852 ret = bus_dmamap_load_mbuf_sg(ha->rx_tag, rxb->map, 1853 mp, segs, &nsegs, BUS_DMA_NOWAIT); 1854 rxb->paddr = segs[0].ds_addr; 1855 1856 if (ret || !rxb->paddr || (nsegs != 1)) { 1857 m_free(mp); 1858 rxb->m_head = NULL; 1859 device_printf(ha->pci_dev, 1860 "%s: bus_dmamap_load failed[%d, 0x%016llx, %d]\n", 1861 __func__, ret, (long long unsigned int)rxb->paddr, 1862 nsegs); 1863 ret = -1; 1864 goto exit_ql_get_mbuf; 1865 } 1866 rxb->m_head = mp; 1867 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1868 1869 exit_ql_get_mbuf: 1870 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1871 return (ret); 1872 } 1873 1874 1875 static void 1876 qla_get_peer(qla_host_t *ha) 1877 { 1878 device_t *peers; 1879 int count, i, slot; 1880 int my_slot = pci_get_slot(ha->pci_dev); 1881 1882 if (device_get_children(device_get_parent(ha->pci_dev), &peers, &count)) 1883 return; 1884 1885 for (i = 0; i < count; i++) { 1886 slot = pci_get_slot(peers[i]); 1887 1888 if ((slot >= 0) && (slot == my_slot) && 1889 (pci_get_device(peers[i]) == 1890 pci_get_device(ha->pci_dev))) { 1891 if (ha->pci_dev != peers[i]) 1892 ha->peer_dev = peers[i]; 1893 } 1894 } 1895 } 1896 1897 static void 1898 qla_send_msg_to_peer(qla_host_t *ha, uint32_t msg_to_peer) 1899 { 1900 qla_host_t *ha_peer; 1901 1902 if (ha->peer_dev) { 1903 if ((ha_peer = device_get_softc(ha->peer_dev)) != NULL) { 1904 1905 ha_peer->msg_from_peer = msg_to_peer; 1906 } 1907 } 1908 } 1909 1910 static void 1911 qla_error_recovery(void *context, int pending) 1912 { 1913 qla_host_t *ha = context; 1914 uint32_t msecs_100 = 100; 1915 struct ifnet *ifp = ha->ifp; 1916 int i = 0; 1917 1918 (void)QLA_LOCK(ha, __func__, 0); 1919 1920 if (ha->flags.qla_interface_up) { 1921 1922 ha->hw.imd_compl = 1; 1923 qla_mdelay(__func__, 300); 1924 1925 ql_hw_stop_rcv(ha); 1926 1927 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1928 1929 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1930 qla_tx_fp_t *fp; 1931 1932 fp = &ha->tx_fp[i]; 1933 1934 if (fp == NULL) 1935 continue; 1936 1937 if (fp->tx_br != NULL) { 1938 mtx_lock(&fp->tx_mtx); 1939 mtx_unlock(&fp->tx_mtx); 1940 } 1941 } 1942 } 1943 1944 QLA_UNLOCK(ha, __func__); 1945 1946 if ((ha->pci_func & 0x1) == 0) { 1947 1948 if (!ha->msg_from_peer) { 1949 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET); 1950 1951 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && 1952 msecs_100--) 1953 qla_mdelay(__func__, 100); 1954 } 1955 1956 ha->msg_from_peer = 0; 1957 1958 (void)QLA_LOCK(ha, __func__, 0); 1959 ql_minidump(ha); 1960 QLA_UNLOCK(ha, __func__); 1961 1962 (void) ql_init_hw(ha); 1963 1964 (void)QLA_LOCK(ha, __func__, 0); 1965 if (ha->flags.qla_interface_up) { 1966 qla_free_xmt_bufs(ha); 1967 qla_free_rcv_bufs(ha); 1968 } 1969 QLA_UNLOCK(ha, __func__); 1970 1971 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK); 1972 1973 } else { 1974 if (ha->msg_from_peer == QL_PEER_MSG_RESET) { 1975 1976 ha->msg_from_peer = 0; 1977 1978 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK); 1979 } else { 1980 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET); 1981 } 1982 1983 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && msecs_100--) 1984 qla_mdelay(__func__, 100); 1985 ha->msg_from_peer = 0; 1986 1987 (void) ql_init_hw(ha); 1988 1989 (void)QLA_LOCK(ha, __func__, 0); 1990 if (ha->flags.qla_interface_up) { 1991 qla_free_xmt_bufs(ha); 1992 qla_free_rcv_bufs(ha); 1993 } 1994 QLA_UNLOCK(ha, __func__); 1995 } 1996 1997 (void)QLA_LOCK(ha, __func__, 0); 1998 1999 if (ha->flags.qla_interface_up) { 2000 if (qla_alloc_xmt_bufs(ha) != 0) { 2001 QLA_UNLOCK(ha, __func__); 2002 return; 2003 } 2004 qla_confirm_9kb_enable(ha); 2005 2006 if (qla_alloc_rcv_bufs(ha) != 0) { 2007 QLA_UNLOCK(ha, __func__); 2008 return; 2009 } 2010 2011 ha->flags.stop_rcv = 0; 2012 if (ql_init_hw_if(ha) == 0) { 2013 ifp = ha->ifp; 2014 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2015 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2016 ha->flags.qla_watchdog_pause = 0; 2017 } 2018 } else 2019 ha->flags.qla_watchdog_pause = 0; 2020 2021 QLA_UNLOCK(ha, __func__); 2022 } 2023 2024 static void 2025 qla_async_event(void *context, int pending) 2026 { 2027 qla_host_t *ha = context; 2028 2029 (void)QLA_LOCK(ha, __func__, 0); 2030 qla_hw_async_event(ha); 2031 QLA_UNLOCK(ha, __func__); 2032 } 2033 2034