1 /* 2 * Copyright (c) 2013-2016 Qlogic Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * and ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * File: ql_os.c 30 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 37 #include "ql_os.h" 38 #include "ql_hw.h" 39 #include "ql_def.h" 40 #include "ql_inline.h" 41 #include "ql_ver.h" 42 #include "ql_glbl.h" 43 #include "ql_dbg.h" 44 #include <sys/smp.h> 45 46 /* 47 * Some PCI Configuration Space Related Defines 48 */ 49 50 #ifndef PCI_VENDOR_QLOGIC 51 #define PCI_VENDOR_QLOGIC 0x1077 52 #endif 53 54 #ifndef PCI_PRODUCT_QLOGIC_ISP8030 55 #define PCI_PRODUCT_QLOGIC_ISP8030 0x8030 56 #endif 57 58 #define PCI_QLOGIC_ISP8030 \ 59 ((PCI_PRODUCT_QLOGIC_ISP8030 << 16) | PCI_VENDOR_QLOGIC) 60 61 /* 62 * static functions 63 */ 64 static int qla_alloc_parent_dma_tag(qla_host_t *ha); 65 static void qla_free_parent_dma_tag(qla_host_t *ha); 66 static int qla_alloc_xmt_bufs(qla_host_t *ha); 67 static void qla_free_xmt_bufs(qla_host_t *ha); 68 static int qla_alloc_rcv_bufs(qla_host_t *ha); 69 static void qla_free_rcv_bufs(qla_host_t *ha); 70 static void qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb); 71 72 static void qla_init_ifnet(device_t dev, qla_host_t *ha); 73 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 74 static int qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS); 75 static void qla_release(qla_host_t *ha); 76 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 77 int error); 78 static void qla_stop(qla_host_t *ha); 79 static int qla_send(qla_host_t *ha, struct mbuf **m_headp); 80 static void qla_tx_done(void *context, int pending); 81 static void qla_get_peer(qla_host_t *ha); 82 static void qla_error_recovery(void *context, int pending); 83 static void qla_async_event(void *context, int pending); 84 85 /* 86 * Hooks to the Operating Systems 87 */ 88 static int qla_pci_probe (device_t); 89 static int qla_pci_attach (device_t); 90 static int qla_pci_detach (device_t); 91 92 static void qla_init(void *arg); 93 static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 94 static int qla_media_change(struct ifnet *ifp); 95 static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 96 static void qla_start(struct ifnet *ifp); 97 98 static device_method_t qla_pci_methods[] = { 99 /* Device interface */ 100 DEVMETHOD(device_probe, qla_pci_probe), 101 DEVMETHOD(device_attach, qla_pci_attach), 102 DEVMETHOD(device_detach, qla_pci_detach), 103 { 0, 0 } 104 }; 105 106 static driver_t qla_pci_driver = { 107 "ql", qla_pci_methods, sizeof (qla_host_t), 108 }; 109 110 static devclass_t qla83xx_devclass; 111 112 DRIVER_MODULE(qla83xx, pci, qla_pci_driver, qla83xx_devclass, 0, 0); 113 114 MODULE_DEPEND(qla83xx, pci, 1, 1, 1); 115 MODULE_DEPEND(qla83xx, ether, 1, 1, 1); 116 117 MALLOC_DEFINE(M_QLA83XXBUF, "qla83xxbuf", "Buffers for qla83xx driver"); 118 119 #define QL_STD_REPLENISH_THRES 0 120 #define QL_JUMBO_REPLENISH_THRES 32 121 122 123 static char dev_str[64]; 124 static char ver_str[64]; 125 126 /* 127 * Name: qla_pci_probe 128 * Function: Validate the PCI device to be a QLA80XX device 129 */ 130 static int 131 qla_pci_probe(device_t dev) 132 { 133 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 134 case PCI_QLOGIC_ISP8030: 135 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 136 "Qlogic ISP 83xx PCI CNA Adapter-Ethernet Function", 137 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 138 QLA_VERSION_BUILD); 139 snprintf(ver_str, sizeof(ver_str), "v%d.%d.%d", 140 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 141 QLA_VERSION_BUILD); 142 device_set_desc(dev, dev_str); 143 break; 144 default: 145 return (ENXIO); 146 } 147 148 if (bootverbose) 149 printf("%s: %s\n ", __func__, dev_str); 150 151 return (BUS_PROBE_DEFAULT); 152 } 153 154 static void 155 qla_add_sysctls(qla_host_t *ha) 156 { 157 device_t dev = ha->pci_dev; 158 159 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 160 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 161 OID_AUTO, "version", CTLFLAG_RD, 162 ver_str, 0, "Driver Version"); 163 164 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 165 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 166 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RW, 167 (void *)ha, 0, 168 qla_sysctl_get_stats, "I", "Statistics"); 169 170 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 171 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 172 OID_AUTO, "fw_version", CTLFLAG_RD, 173 ha->fw_ver_str, 0, "firmware version"); 174 175 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 176 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 177 OID_AUTO, "link_status", CTLTYPE_INT | CTLFLAG_RW, 178 (void *)ha, 0, 179 qla_sysctl_get_link_status, "I", "Link Status"); 180 181 ha->dbg_level = 0; 182 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 183 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 184 OID_AUTO, "debug", CTLFLAG_RW, 185 &ha->dbg_level, ha->dbg_level, "Debug Level"); 186 187 ha->std_replenish = QL_STD_REPLENISH_THRES; 188 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 189 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 190 OID_AUTO, "std_replenish", CTLFLAG_RW, 191 &ha->std_replenish, ha->std_replenish, 192 "Threshold for Replenishing Standard Frames"); 193 194 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 195 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 196 OID_AUTO, "ipv4_lro", 197 CTLFLAG_RD, &ha->ipv4_lro, 198 "number of ipv4 lro completions"); 199 200 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 201 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 202 OID_AUTO, "ipv6_lro", 203 CTLFLAG_RD, &ha->ipv6_lro, 204 "number of ipv6 lro completions"); 205 206 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 207 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 208 OID_AUTO, "tx_tso_frames", 209 CTLFLAG_RD, &ha->tx_tso_frames, 210 "number of Tx TSO Frames"); 211 212 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 213 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 214 OID_AUTO, "hw_vlan_tx_frames", 215 CTLFLAG_RD, &ha->hw_vlan_tx_frames, 216 "number of Tx VLAN Frames"); 217 218 return; 219 } 220 221 static void 222 qla_watchdog(void *arg) 223 { 224 qla_host_t *ha = arg; 225 qla_hw_t *hw; 226 struct ifnet *ifp; 227 uint32_t i; 228 qla_hw_tx_cntxt_t *hw_tx_cntxt; 229 230 hw = &ha->hw; 231 ifp = ha->ifp; 232 233 if (ha->flags.qla_watchdog_exit) { 234 ha->qla_watchdog_exited = 1; 235 return; 236 } 237 ha->qla_watchdog_exited = 0; 238 239 if (!ha->flags.qla_watchdog_pause) { 240 if (ql_hw_check_health(ha) || ha->qla_initiate_recovery || 241 (ha->msg_from_peer == QL_PEER_MSG_RESET)) { 242 ha->qla_watchdog_paused = 1; 243 ha->flags.qla_watchdog_pause = 1; 244 ha->qla_initiate_recovery = 0; 245 ha->err_inject = 0; 246 device_printf(ha->pci_dev, 247 "%s: taskqueue_enqueue(err_task) \n", __func__); 248 taskqueue_enqueue(ha->err_tq, &ha->err_task); 249 } else if (ha->flags.qla_interface_up) { 250 251 if (ha->async_event) { 252 ha->async_event = 0; 253 taskqueue_enqueue(ha->async_event_tq, 254 &ha->async_event_task); 255 } 256 257 for (i = 0; i < ha->hw.num_tx_rings; i++) { 258 hw_tx_cntxt = &hw->tx_cntxt[i]; 259 if (qla_le32_to_host(*(hw_tx_cntxt->tx_cons)) != 260 hw_tx_cntxt->txr_comp) { 261 taskqueue_enqueue(ha->tx_tq, 262 &ha->tx_task); 263 break; 264 } 265 } 266 267 if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 268 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 269 } 270 ha->qla_watchdog_paused = 0; 271 } else { 272 ha->qla_watchdog_paused = 0; 273 } 274 } else { 275 ha->qla_watchdog_paused = 1; 276 } 277 278 ha->watchdog_ticks = ha->watchdog_ticks++ % 1000; 279 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 280 qla_watchdog, ha); 281 } 282 283 /* 284 * Name: qla_pci_attach 285 * Function: attaches the device to the operating system 286 */ 287 static int 288 qla_pci_attach(device_t dev) 289 { 290 qla_host_t *ha = NULL; 291 uint32_t rsrc_len; 292 int i; 293 uint32_t num_rcvq = 0; 294 295 if ((ha = device_get_softc(dev)) == NULL) { 296 device_printf(dev, "cannot get softc\n"); 297 return (ENOMEM); 298 } 299 300 memset(ha, 0, sizeof (qla_host_t)); 301 302 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8030) { 303 device_printf(dev, "device is not ISP8030\n"); 304 return (ENXIO); 305 } 306 307 ha->pci_func = pci_get_function(dev) & 0x1; 308 309 ha->pci_dev = dev; 310 311 pci_enable_busmaster(dev); 312 313 ha->reg_rid = PCIR_BAR(0); 314 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 315 RF_ACTIVE); 316 317 if (ha->pci_reg == NULL) { 318 device_printf(dev, "unable to map any ports\n"); 319 goto qla_pci_attach_err; 320 } 321 322 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 323 ha->reg_rid); 324 325 mtx_init(&ha->hw_lock, "qla83xx_hw_lock", MTX_NETWORK_LOCK, MTX_SPIN); 326 327 mtx_init(&ha->tx_lock, "qla83xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 328 329 qla_add_sysctls(ha); 330 ql_hw_add_sysctls(ha); 331 332 ha->flags.lock_init = 1; 333 334 ha->reg_rid1 = PCIR_BAR(2); 335 ha->pci_reg1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 336 &ha->reg_rid1, RF_ACTIVE); 337 338 ha->msix_count = pci_msix_count(dev); 339 340 if (ha->msix_count < (ha->hw.num_sds_rings + 1)) { 341 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 342 ha->msix_count); 343 goto qla_pci_attach_err; 344 } 345 346 QL_DPRINT2(ha, (dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x" 347 " msix_count 0x%x pci_reg %p\n", __func__, ha, 348 ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg)); 349 350 /* initialize hardware */ 351 if (ql_init_hw(ha)) { 352 device_printf(dev, "%s: ql_init_hw failed\n", __func__); 353 goto qla_pci_attach_err; 354 } 355 356 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 357 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 358 ha->fw_ver_build); 359 snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d", 360 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 361 ha->fw_ver_build); 362 363 if (qla_get_nic_partition(ha, NULL, &num_rcvq)) { 364 device_printf(dev, "%s: qla_get_nic_partition failed\n", 365 __func__); 366 goto qla_pci_attach_err; 367 } 368 device_printf(dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x" 369 " msix_count 0x%x pci_reg %p num_rcvq = %d\n", __func__, ha, 370 ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg, num_rcvq); 371 372 373 #ifdef QL_ENABLE_ISCSI_TLV 374 if ((ha->msix_count < 64) || (num_rcvq != 32)) { 375 ha->hw.num_sds_rings = 15; 376 ha->hw.num_tx_rings = 32; 377 } 378 #endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 379 ha->hw.num_rds_rings = ha->hw.num_sds_rings; 380 381 ha->msix_count = ha->hw.num_sds_rings + 1; 382 383 if (pci_alloc_msix(dev, &ha->msix_count)) { 384 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 385 ha->msix_count); 386 ha->msix_count = 0; 387 goto qla_pci_attach_err; 388 } 389 390 ha->mbx_irq_rid = 1; 391 ha->mbx_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 392 &ha->mbx_irq_rid, 393 (RF_ACTIVE | RF_SHAREABLE)); 394 if (ha->mbx_irq == NULL) { 395 device_printf(dev, "could not allocate mbx interrupt\n"); 396 goto qla_pci_attach_err; 397 } 398 if (bus_setup_intr(dev, ha->mbx_irq, (INTR_TYPE_NET | INTR_MPSAFE), 399 NULL, ql_mbx_isr, ha, &ha->mbx_handle)) { 400 device_printf(dev, "could not setup mbx interrupt\n"); 401 goto qla_pci_attach_err; 402 } 403 404 for (i = 0; i < ha->hw.num_sds_rings; i++) { 405 ha->irq_vec[i].sds_idx = i; 406 ha->irq_vec[i].ha = ha; 407 ha->irq_vec[i].irq_rid = 2 + i; 408 409 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 410 &ha->irq_vec[i].irq_rid, 411 (RF_ACTIVE | RF_SHAREABLE)); 412 413 if (ha->irq_vec[i].irq == NULL) { 414 device_printf(dev, "could not allocate interrupt\n"); 415 goto qla_pci_attach_err; 416 } 417 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 418 (INTR_TYPE_NET | INTR_MPSAFE), 419 NULL, ql_isr, &ha->irq_vec[i], 420 &ha->irq_vec[i].handle)) { 421 device_printf(dev, "could not setup interrupt\n"); 422 goto qla_pci_attach_err; 423 } 424 } 425 426 printf("%s: mp__ncpus %d sds %d rds %d msi-x %d\n", __func__, mp_ncpus, 427 ha->hw.num_sds_rings, ha->hw.num_rds_rings, ha->msix_count); 428 429 ql_read_mac_addr(ha); 430 431 /* allocate parent dma tag */ 432 if (qla_alloc_parent_dma_tag(ha)) { 433 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 434 __func__); 435 goto qla_pci_attach_err; 436 } 437 438 /* alloc all dma buffers */ 439 if (ql_alloc_dma(ha)) { 440 device_printf(dev, "%s: ql_alloc_dma failed\n", __func__); 441 goto qla_pci_attach_err; 442 } 443 qla_get_peer(ha); 444 445 if (ql_minidump_init(ha) != 0) { 446 device_printf(dev, "%s: ql_minidump_init failed\n", __func__); 447 goto qla_pci_attach_err; 448 } 449 /* create the o.s ethernet interface */ 450 qla_init_ifnet(dev, ha); 451 452 ha->flags.qla_watchdog_active = 1; 453 ha->flags.qla_watchdog_pause = 0; 454 455 456 TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha); 457 ha->tx_tq = taskqueue_create("qla_txq", M_NOWAIT, 458 taskqueue_thread_enqueue, &ha->tx_tq); 459 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 460 device_get_nameunit(ha->pci_dev)); 461 462 callout_init(&ha->tx_callout, TRUE); 463 ha->flags.qla_callout_init = 1; 464 465 /* create ioctl device interface */ 466 if (ql_make_cdev(ha)) { 467 device_printf(dev, "%s: ql_make_cdev failed\n", __func__); 468 goto qla_pci_attach_err; 469 } 470 471 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 472 qla_watchdog, ha); 473 474 TASK_INIT(&ha->err_task, 0, qla_error_recovery, ha); 475 ha->err_tq = taskqueue_create("qla_errq", M_NOWAIT, 476 taskqueue_thread_enqueue, &ha->err_tq); 477 taskqueue_start_threads(&ha->err_tq, 1, PI_NET, "%s errq", 478 device_get_nameunit(ha->pci_dev)); 479 480 TASK_INIT(&ha->async_event_task, 0, qla_async_event, ha); 481 ha->async_event_tq = taskqueue_create("qla_asyncq", M_NOWAIT, 482 taskqueue_thread_enqueue, &ha->async_event_tq); 483 taskqueue_start_threads(&ha->async_event_tq, 1, PI_NET, "%s asyncq", 484 device_get_nameunit(ha->pci_dev)); 485 486 QL_DPRINT2(ha, (dev, "%s: exit 0\n", __func__)); 487 return (0); 488 489 qla_pci_attach_err: 490 491 qla_release(ha); 492 493 QL_DPRINT2(ha, (dev, "%s: exit ENXIO\n", __func__)); 494 return (ENXIO); 495 } 496 497 /* 498 * Name: qla_pci_detach 499 * Function: Unhooks the device from the operating system 500 */ 501 static int 502 qla_pci_detach(device_t dev) 503 { 504 qla_host_t *ha = NULL; 505 struct ifnet *ifp; 506 507 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 508 509 if ((ha = device_get_softc(dev)) == NULL) { 510 device_printf(dev, "cannot get softc\n"); 511 return (ENOMEM); 512 } 513 514 ifp = ha->ifp; 515 516 (void)QLA_LOCK(ha, __func__, 0); 517 qla_stop(ha); 518 QLA_UNLOCK(ha, __func__); 519 520 qla_release(ha); 521 522 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__)); 523 524 return (0); 525 } 526 527 /* 528 * SYSCTL Related Callbacks 529 */ 530 static int 531 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 532 { 533 int err, ret = 0; 534 qla_host_t *ha; 535 536 err = sysctl_handle_int(oidp, &ret, 0, req); 537 538 if (err || !req->newptr) 539 return (err); 540 541 if (ret == 1) { 542 ha = (qla_host_t *)arg1; 543 ql_get_stats(ha); 544 } 545 return (err); 546 } 547 static int 548 qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS) 549 { 550 int err, ret = 0; 551 qla_host_t *ha; 552 553 err = sysctl_handle_int(oidp, &ret, 0, req); 554 555 if (err || !req->newptr) 556 return (err); 557 558 if (ret == 1) { 559 ha = (qla_host_t *)arg1; 560 ql_hw_link_status(ha); 561 } 562 return (err); 563 } 564 565 /* 566 * Name: qla_release 567 * Function: Releases the resources allocated for the device 568 */ 569 static void 570 qla_release(qla_host_t *ha) 571 { 572 device_t dev; 573 int i; 574 575 dev = ha->pci_dev; 576 577 if (ha->async_event_tq) { 578 taskqueue_drain(ha->async_event_tq, &ha->async_event_task); 579 taskqueue_free(ha->async_event_tq); 580 } 581 582 if (ha->err_tq) { 583 taskqueue_drain(ha->err_tq, &ha->err_task); 584 taskqueue_free(ha->err_tq); 585 } 586 587 if (ha->tx_tq) { 588 taskqueue_drain(ha->tx_tq, &ha->tx_task); 589 taskqueue_free(ha->tx_tq); 590 } 591 592 ql_del_cdev(ha); 593 594 if (ha->flags.qla_watchdog_active) { 595 ha->flags.qla_watchdog_exit = 1; 596 597 while (ha->qla_watchdog_exited == 0) 598 qla_mdelay(__func__, 1); 599 } 600 601 if (ha->flags.qla_callout_init) 602 callout_stop(&ha->tx_callout); 603 604 if (ha->ifp != NULL) 605 ether_ifdetach(ha->ifp); 606 607 ql_free_dma(ha); 608 qla_free_parent_dma_tag(ha); 609 610 if (ha->mbx_handle) 611 (void)bus_teardown_intr(dev, ha->mbx_irq, ha->mbx_handle); 612 613 if (ha->mbx_irq) 614 (void) bus_release_resource(dev, SYS_RES_IRQ, ha->mbx_irq_rid, 615 ha->mbx_irq); 616 617 for (i = 0; i < ha->hw.num_sds_rings; i++) { 618 619 if (ha->irq_vec[i].handle) { 620 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 621 ha->irq_vec[i].handle); 622 } 623 624 if (ha->irq_vec[i].irq) { 625 (void)bus_release_resource(dev, SYS_RES_IRQ, 626 ha->irq_vec[i].irq_rid, 627 ha->irq_vec[i].irq); 628 } 629 } 630 631 if (ha->msix_count) 632 pci_release_msi(dev); 633 634 if (ha->flags.lock_init) { 635 mtx_destroy(&ha->tx_lock); 636 mtx_destroy(&ha->hw_lock); 637 } 638 639 if (ha->pci_reg) 640 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 641 ha->pci_reg); 642 643 if (ha->pci_reg1) 644 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid1, 645 ha->pci_reg1); 646 } 647 648 /* 649 * DMA Related Functions 650 */ 651 652 static void 653 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 654 { 655 *((bus_addr_t *)arg) = 0; 656 657 if (error) { 658 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 659 return; 660 } 661 662 *((bus_addr_t *)arg) = segs[0].ds_addr; 663 664 return; 665 } 666 667 int 668 ql_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 669 { 670 int ret = 0; 671 device_t dev; 672 bus_addr_t b_addr; 673 674 dev = ha->pci_dev; 675 676 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 677 678 ret = bus_dma_tag_create( 679 ha->parent_tag,/* parent */ 680 dma_buf->alignment, 681 ((bus_size_t)(1ULL << 32)),/* boundary */ 682 BUS_SPACE_MAXADDR, /* lowaddr */ 683 BUS_SPACE_MAXADDR, /* highaddr */ 684 NULL, NULL, /* filter, filterarg */ 685 dma_buf->size, /* maxsize */ 686 1, /* nsegments */ 687 dma_buf->size, /* maxsegsize */ 688 0, /* flags */ 689 NULL, NULL, /* lockfunc, lockarg */ 690 &dma_buf->dma_tag); 691 692 if (ret) { 693 device_printf(dev, "%s: could not create dma tag\n", __func__); 694 goto ql_alloc_dmabuf_exit; 695 } 696 ret = bus_dmamem_alloc(dma_buf->dma_tag, 697 (void **)&dma_buf->dma_b, 698 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 699 &dma_buf->dma_map); 700 if (ret) { 701 bus_dma_tag_destroy(dma_buf->dma_tag); 702 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 703 goto ql_alloc_dmabuf_exit; 704 } 705 706 ret = bus_dmamap_load(dma_buf->dma_tag, 707 dma_buf->dma_map, 708 dma_buf->dma_b, 709 dma_buf->size, 710 qla_dmamap_callback, 711 &b_addr, BUS_DMA_NOWAIT); 712 713 if (ret || !b_addr) { 714 bus_dma_tag_destroy(dma_buf->dma_tag); 715 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 716 dma_buf->dma_map); 717 ret = -1; 718 goto ql_alloc_dmabuf_exit; 719 } 720 721 dma_buf->dma_addr = b_addr; 722 723 ql_alloc_dmabuf_exit: 724 QL_DPRINT2(ha, (dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 725 __func__, ret, (void *)dma_buf->dma_tag, 726 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 727 dma_buf->size)); 728 729 return ret; 730 } 731 732 void 733 ql_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 734 { 735 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 736 bus_dma_tag_destroy(dma_buf->dma_tag); 737 } 738 739 static int 740 qla_alloc_parent_dma_tag(qla_host_t *ha) 741 { 742 int ret; 743 device_t dev; 744 745 dev = ha->pci_dev; 746 747 /* 748 * Allocate parent DMA Tag 749 */ 750 ret = bus_dma_tag_create( 751 bus_get_dma_tag(dev), /* parent */ 752 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 753 BUS_SPACE_MAXADDR, /* lowaddr */ 754 BUS_SPACE_MAXADDR, /* highaddr */ 755 NULL, NULL, /* filter, filterarg */ 756 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 757 0, /* nsegments */ 758 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 759 0, /* flags */ 760 NULL, NULL, /* lockfunc, lockarg */ 761 &ha->parent_tag); 762 763 if (ret) { 764 device_printf(dev, "%s: could not create parent dma tag\n", 765 __func__); 766 return (-1); 767 } 768 769 ha->flags.parent_tag = 1; 770 771 return (0); 772 } 773 774 static void 775 qla_free_parent_dma_tag(qla_host_t *ha) 776 { 777 if (ha->flags.parent_tag) { 778 bus_dma_tag_destroy(ha->parent_tag); 779 ha->flags.parent_tag = 0; 780 } 781 } 782 783 /* 784 * Name: qla_init_ifnet 785 * Function: Creates the Network Device Interface and Registers it with the O.S 786 */ 787 788 static void 789 qla_init_ifnet(device_t dev, qla_host_t *ha) 790 { 791 struct ifnet *ifp; 792 793 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 794 795 ifp = ha->ifp = if_alloc(IFT_ETHER); 796 797 if (ifp == NULL) 798 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 799 800 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 801 802 ifp->if_baudrate = IF_Gbps(10); 803 ifp->if_capabilities = IFCAP_LINKSTATE; 804 ifp->if_mtu = ETHERMTU; 805 806 ifp->if_init = qla_init; 807 ifp->if_softc = ha; 808 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 809 ifp->if_ioctl = qla_ioctl; 810 ifp->if_start = qla_start; 811 812 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha)); 813 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha); 814 IFQ_SET_READY(&ifp->if_snd); 815 816 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 817 818 ether_ifattach(ifp, qla_get_mac_addr(ha)); 819 820 ifp->if_capabilities = IFCAP_HWCSUM | 821 IFCAP_TSO4 | 822 IFCAP_JUMBO_MTU; 823 824 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 825 ifp->if_capabilities |= IFCAP_VLAN_HWTSO; 826 827 ifp->if_capenable = ifp->if_capabilities; 828 829 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 830 831 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 832 833 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 834 NULL); 835 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 836 837 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 838 839 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__)); 840 841 return; 842 } 843 844 static void 845 qla_init_locked(qla_host_t *ha) 846 { 847 struct ifnet *ifp = ha->ifp; 848 849 qla_stop(ha); 850 851 if (qla_alloc_xmt_bufs(ha) != 0) 852 return; 853 854 qla_confirm_9kb_enable(ha); 855 856 if (qla_alloc_rcv_bufs(ha) != 0) 857 return; 858 859 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 860 861 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO; 862 863 ha->flags.stop_rcv = 0; 864 if (ql_init_hw_if(ha) == 0) { 865 ifp = ha->ifp; 866 ifp->if_drv_flags |= IFF_DRV_RUNNING; 867 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 868 ha->flags.qla_watchdog_pause = 0; 869 ha->hw_vlan_tx_frames = 0; 870 ha->tx_tso_frames = 0; 871 ha->flags.qla_interface_up = 1; 872 } 873 874 return; 875 } 876 877 static void 878 qla_init(void *arg) 879 { 880 qla_host_t *ha; 881 882 ha = (qla_host_t *)arg; 883 884 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 885 886 (void)QLA_LOCK(ha, __func__, 0); 887 qla_init_locked(ha); 888 QLA_UNLOCK(ha, __func__); 889 890 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 891 } 892 893 static int 894 qla_set_multi(qla_host_t *ha, uint32_t add_multi) 895 { 896 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 897 struct ifmultiaddr *ifma; 898 int mcnt = 0; 899 struct ifnet *ifp = ha->ifp; 900 int ret = 0; 901 902 if_maddr_rlock(ifp); 903 904 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 905 906 if (ifma->ifma_addr->sa_family != AF_LINK) 907 continue; 908 909 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 910 break; 911 912 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 913 &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 914 915 mcnt++; 916 } 917 918 if_maddr_runlock(ifp); 919 920 if (QLA_LOCK(ha, __func__, 1) == 0) { 921 ret = ql_hw_set_multi(ha, mta, mcnt, add_multi); 922 QLA_UNLOCK(ha, __func__); 923 } 924 925 return (ret); 926 } 927 928 static int 929 qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 930 { 931 int ret = 0; 932 struct ifreq *ifr = (struct ifreq *)data; 933 struct ifaddr *ifa = (struct ifaddr *)data; 934 qla_host_t *ha; 935 936 ha = (qla_host_t *)ifp->if_softc; 937 938 switch (cmd) { 939 case SIOCSIFADDR: 940 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 941 __func__, cmd)); 942 943 if (ifa->ifa_addr->sa_family == AF_INET) { 944 ifp->if_flags |= IFF_UP; 945 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 946 (void)QLA_LOCK(ha, __func__, 0); 947 qla_init_locked(ha); 948 QLA_UNLOCK(ha, __func__); 949 } 950 QL_DPRINT4(ha, (ha->pci_dev, 951 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 952 __func__, cmd, 953 ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 954 955 arp_ifinit(ifp, ifa); 956 } else { 957 ether_ioctl(ifp, cmd, data); 958 } 959 break; 960 961 case SIOCSIFMTU: 962 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 963 __func__, cmd)); 964 965 if (ifr->ifr_mtu > QLA_MAX_MTU) { 966 ret = EINVAL; 967 } else { 968 (void) QLA_LOCK(ha, __func__, 0); 969 ifp->if_mtu = ifr->ifr_mtu; 970 ha->max_frame_size = 971 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 972 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 973 ret = ql_set_max_mtu(ha, ha->max_frame_size, 974 ha->hw.rcv_cntxt_id); 975 } 976 977 if (ifp->if_mtu > ETHERMTU) 978 ha->std_replenish = QL_JUMBO_REPLENISH_THRES; 979 else 980 ha->std_replenish = QL_STD_REPLENISH_THRES; 981 982 983 QLA_UNLOCK(ha, __func__); 984 985 if (ret) 986 ret = EINVAL; 987 } 988 989 break; 990 991 case SIOCSIFFLAGS: 992 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 993 __func__, cmd)); 994 995 (void)QLA_LOCK(ha, __func__, 0); 996 997 if (ifp->if_flags & IFF_UP) { 998 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 999 if ((ifp->if_flags ^ ha->if_flags) & 1000 IFF_PROMISC) { 1001 ret = ql_set_promisc(ha); 1002 } else if ((ifp->if_flags ^ ha->if_flags) & 1003 IFF_ALLMULTI) { 1004 ret = ql_set_allmulti(ha); 1005 } 1006 } else { 1007 qla_init_locked(ha); 1008 ha->max_frame_size = ifp->if_mtu + 1009 ETHER_HDR_LEN + ETHER_CRC_LEN; 1010 ret = ql_set_max_mtu(ha, ha->max_frame_size, 1011 ha->hw.rcv_cntxt_id); 1012 } 1013 } else { 1014 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1015 qla_stop(ha); 1016 ha->if_flags = ifp->if_flags; 1017 } 1018 1019 QLA_UNLOCK(ha, __func__); 1020 break; 1021 1022 case SIOCADDMULTI: 1023 QL_DPRINT4(ha, (ha->pci_dev, 1024 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 1025 1026 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1027 if (qla_set_multi(ha, 1)) 1028 ret = EINVAL; 1029 } 1030 break; 1031 1032 case SIOCDELMULTI: 1033 QL_DPRINT4(ha, (ha->pci_dev, 1034 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 1035 1036 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1037 if (qla_set_multi(ha, 0)) 1038 ret = EINVAL; 1039 } 1040 break; 1041 1042 case SIOCSIFMEDIA: 1043 case SIOCGIFMEDIA: 1044 QL_DPRINT4(ha, (ha->pci_dev, 1045 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 1046 __func__, cmd)); 1047 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 1048 break; 1049 1050 case SIOCSIFCAP: 1051 { 1052 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1053 1054 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 1055 __func__, cmd)); 1056 1057 if (mask & IFCAP_HWCSUM) 1058 ifp->if_capenable ^= IFCAP_HWCSUM; 1059 if (mask & IFCAP_TSO4) 1060 ifp->if_capenable ^= IFCAP_TSO4; 1061 if (mask & IFCAP_VLAN_HWTAGGING) 1062 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 1063 if (mask & IFCAP_VLAN_HWTSO) 1064 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 1065 1066 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1067 qla_init(ha); 1068 1069 VLAN_CAPABILITIES(ifp); 1070 break; 1071 } 1072 1073 default: 1074 QL_DPRINT4(ha, (ha->pci_dev, "%s: default (0x%lx)\n", 1075 __func__, cmd)); 1076 ret = ether_ioctl(ifp, cmd, data); 1077 break; 1078 } 1079 1080 return (ret); 1081 } 1082 1083 static int 1084 qla_media_change(struct ifnet *ifp) 1085 { 1086 qla_host_t *ha; 1087 struct ifmedia *ifm; 1088 int ret = 0; 1089 1090 ha = (qla_host_t *)ifp->if_softc; 1091 1092 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1093 1094 ifm = &ha->media; 1095 1096 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1097 ret = EINVAL; 1098 1099 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1100 1101 return (ret); 1102 } 1103 1104 static void 1105 qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1106 { 1107 qla_host_t *ha; 1108 1109 ha = (qla_host_t *)ifp->if_softc; 1110 1111 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1112 1113 ifmr->ifm_status = IFM_AVALID; 1114 ifmr->ifm_active = IFM_ETHER; 1115 1116 ql_update_link_state(ha); 1117 if (ha->hw.link_up) { 1118 ifmr->ifm_status |= IFM_ACTIVE; 1119 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 1120 } 1121 1122 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit (%s)\n", __func__,\ 1123 (ha->hw.link_up ? "link_up" : "link_down"))); 1124 1125 return; 1126 } 1127 1128 static void 1129 qla_start(struct ifnet *ifp) 1130 { 1131 struct mbuf *m_head; 1132 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 1133 1134 QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1135 1136 if (!mtx_trylock(&ha->tx_lock)) { 1137 QL_DPRINT8(ha, (ha->pci_dev, 1138 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 1139 return; 1140 } 1141 1142 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1143 IFF_DRV_RUNNING) { 1144 QL_DPRINT8(ha, 1145 (ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1146 QLA_TX_UNLOCK(ha); 1147 return; 1148 } 1149 1150 if (!ha->hw.link_up || !ha->watchdog_ticks) 1151 ql_update_link_state(ha); 1152 1153 if (!ha->hw.link_up) { 1154 QL_DPRINT8(ha, (ha->pci_dev, "%s: link down\n", __func__)); 1155 QLA_TX_UNLOCK(ha); 1156 return; 1157 } 1158 1159 while (ifp->if_snd.ifq_head != NULL) { 1160 IF_DEQUEUE(&ifp->if_snd, m_head); 1161 1162 if (m_head == NULL) { 1163 QL_DPRINT8(ha, (ha->pci_dev, "%s: m_head == NULL\n", 1164 __func__)); 1165 break; 1166 } 1167 1168 if (qla_send(ha, &m_head)) { 1169 if (m_head == NULL) 1170 break; 1171 QL_DPRINT8(ha, (ha->pci_dev, "%s: PREPEND\n", __func__)); 1172 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1173 IF_PREPEND(&ifp->if_snd, m_head); 1174 break; 1175 } 1176 /* Send a copy of the frame to the BPF listener */ 1177 ETHER_BPF_MTAP(ifp, m_head); 1178 } 1179 QLA_TX_UNLOCK(ha); 1180 QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1181 return; 1182 } 1183 1184 static int 1185 qla_send(qla_host_t *ha, struct mbuf **m_headp) 1186 { 1187 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1188 bus_dmamap_t map; 1189 int nsegs; 1190 int ret = -1; 1191 uint32_t tx_idx; 1192 struct mbuf *m_head = *m_headp; 1193 uint32_t txr_idx = ha->txr_idx; 1194 uint32_t iscsi_pdu = 0; 1195 1196 QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1197 1198 /* check if flowid is set */ 1199 1200 if (M_HASHTYPE_GET(m_head) != M_HASHTYPE_NONE) { 1201 #ifdef QL_ENABLE_ISCSI_TLV 1202 if (qla_iscsi_pdu(ha, m_head) == 0) { 1203 iscsi_pdu = 1; 1204 txr_idx = m_head->m_pkthdr.flowid & 1205 ((ha->hw.num_tx_rings >> 1) - 1); 1206 } else { 1207 txr_idx = m_head->m_pkthdr.flowid & 1208 (ha->hw.num_tx_rings - 1); 1209 } 1210 #else 1211 txr_idx = m_head->m_pkthdr.flowid & (ha->hw.num_tx_rings - 1); 1212 #endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 1213 } 1214 1215 1216 tx_idx = ha->hw.tx_cntxt[txr_idx].txr_next; 1217 map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map; 1218 1219 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1220 BUS_DMA_NOWAIT); 1221 1222 if (ret == EFBIG) { 1223 1224 struct mbuf *m; 1225 1226 QL_DPRINT8(ha, (ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1227 m_head->m_pkthdr.len)); 1228 1229 m = m_defrag(m_head, M_NOWAIT); 1230 if (m == NULL) { 1231 ha->err_tx_defrag++; 1232 m_freem(m_head); 1233 *m_headp = NULL; 1234 device_printf(ha->pci_dev, 1235 "%s: m_defrag() = NULL [%d]\n", 1236 __func__, ret); 1237 return (ENOBUFS); 1238 } 1239 m_head = m; 1240 *m_headp = m_head; 1241 1242 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1243 segs, &nsegs, BUS_DMA_NOWAIT))) { 1244 1245 ha->err_tx_dmamap_load++; 1246 1247 device_printf(ha->pci_dev, 1248 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1249 __func__, ret, m_head->m_pkthdr.len); 1250 1251 if (ret != ENOMEM) { 1252 m_freem(m_head); 1253 *m_headp = NULL; 1254 } 1255 return (ret); 1256 } 1257 1258 } else if (ret) { 1259 1260 ha->err_tx_dmamap_load++; 1261 1262 device_printf(ha->pci_dev, 1263 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1264 __func__, ret, m_head->m_pkthdr.len); 1265 1266 if (ret != ENOMEM) { 1267 m_freem(m_head); 1268 *m_headp = NULL; 1269 } 1270 return (ret); 1271 } 1272 1273 QL_ASSERT(ha, (nsegs != 0), ("qla_send: empty packet")); 1274 1275 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1276 1277 if (!(ret = ql_hw_send(ha, segs, nsegs, tx_idx, m_head, txr_idx, 1278 iscsi_pdu))) { 1279 ha->tx_ring[txr_idx].count++; 1280 ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head = m_head; 1281 } else { 1282 if (ret == EINVAL) { 1283 if (m_head) 1284 m_freem(m_head); 1285 *m_headp = NULL; 1286 } 1287 } 1288 1289 QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1290 return (ret); 1291 } 1292 1293 static void 1294 qla_stop(qla_host_t *ha) 1295 { 1296 struct ifnet *ifp = ha->ifp; 1297 device_t dev; 1298 1299 dev = ha->pci_dev; 1300 1301 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1302 QLA_TX_LOCK(ha); QLA_TX_UNLOCK(ha); 1303 1304 ha->flags.qla_watchdog_pause = 1; 1305 1306 while (!ha->qla_watchdog_paused) 1307 qla_mdelay(__func__, 1); 1308 1309 ha->flags.qla_interface_up = 0; 1310 1311 ql_hw_stop_rcv(ha); 1312 1313 ql_del_hw_if(ha); 1314 1315 qla_free_xmt_bufs(ha); 1316 qla_free_rcv_bufs(ha); 1317 1318 return; 1319 } 1320 1321 /* 1322 * Buffer Management Functions for Transmit and Receive Rings 1323 */ 1324 static int 1325 qla_alloc_xmt_bufs(qla_host_t *ha) 1326 { 1327 int ret = 0; 1328 uint32_t i, j; 1329 qla_tx_buf_t *txb; 1330 1331 if (bus_dma_tag_create(NULL, /* parent */ 1332 1, 0, /* alignment, bounds */ 1333 BUS_SPACE_MAXADDR, /* lowaddr */ 1334 BUS_SPACE_MAXADDR, /* highaddr */ 1335 NULL, NULL, /* filter, filterarg */ 1336 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1337 QLA_MAX_SEGMENTS, /* nsegments */ 1338 PAGE_SIZE, /* maxsegsize */ 1339 BUS_DMA_ALLOCNOW, /* flags */ 1340 NULL, /* lockfunc */ 1341 NULL, /* lockfuncarg */ 1342 &ha->tx_tag)) { 1343 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1344 __func__); 1345 return (ENOMEM); 1346 } 1347 1348 for (i = 0; i < ha->hw.num_tx_rings; i++) { 1349 bzero((void *)ha->tx_ring[i].tx_buf, 1350 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1351 } 1352 1353 for (j = 0; j < ha->hw.num_tx_rings; j++) { 1354 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) { 1355 1356 txb = &ha->tx_ring[j].tx_buf[i]; 1357 1358 if ((ret = bus_dmamap_create(ha->tx_tag, 1359 BUS_DMA_NOWAIT, &txb->map))) { 1360 1361 ha->err_tx_dmamap_create++; 1362 device_printf(ha->pci_dev, 1363 "%s: bus_dmamap_create failed[%d]\n", 1364 __func__, ret); 1365 1366 qla_free_xmt_bufs(ha); 1367 1368 return (ret); 1369 } 1370 } 1371 } 1372 1373 return 0; 1374 } 1375 1376 /* 1377 * Release mbuf after it sent on the wire 1378 */ 1379 static void 1380 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1381 { 1382 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1383 1384 if (txb->m_head && txb->map) { 1385 1386 bus_dmamap_unload(ha->tx_tag, txb->map); 1387 1388 m_freem(txb->m_head); 1389 txb->m_head = NULL; 1390 } 1391 1392 if (txb->map) 1393 bus_dmamap_destroy(ha->tx_tag, txb->map); 1394 1395 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1396 } 1397 1398 static void 1399 qla_free_xmt_bufs(qla_host_t *ha) 1400 { 1401 int i, j; 1402 1403 for (j = 0; j < ha->hw.num_tx_rings; j++) { 1404 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1405 qla_clear_tx_buf(ha, &ha->tx_ring[j].tx_buf[i]); 1406 } 1407 1408 if (ha->tx_tag != NULL) { 1409 bus_dma_tag_destroy(ha->tx_tag); 1410 ha->tx_tag = NULL; 1411 } 1412 1413 for (i = 0; i < ha->hw.num_tx_rings; i++) { 1414 bzero((void *)ha->tx_ring[i].tx_buf, 1415 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1416 } 1417 return; 1418 } 1419 1420 1421 static int 1422 qla_alloc_rcv_std(qla_host_t *ha) 1423 { 1424 int i, j, k, r, ret = 0; 1425 qla_rx_buf_t *rxb; 1426 qla_rx_ring_t *rx_ring; 1427 1428 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1429 1430 rx_ring = &ha->rx_ring[r]; 1431 1432 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1433 1434 rxb = &rx_ring->rx_buf[i]; 1435 1436 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, 1437 &rxb->map); 1438 1439 if (ret) { 1440 device_printf(ha->pci_dev, 1441 "%s: dmamap[%d, %d] failed\n", 1442 __func__, r, i); 1443 1444 for (k = 0; k < r; k++) { 1445 for (j = 0; j < NUM_RX_DESCRIPTORS; 1446 j++) { 1447 rxb = &ha->rx_ring[k].rx_buf[j]; 1448 bus_dmamap_destroy(ha->rx_tag, 1449 rxb->map); 1450 } 1451 } 1452 1453 for (j = 0; j < i; j++) { 1454 bus_dmamap_destroy(ha->rx_tag, 1455 rx_ring->rx_buf[j].map); 1456 } 1457 goto qla_alloc_rcv_std_err; 1458 } 1459 } 1460 } 1461 1462 qla_init_hw_rcv_descriptors(ha); 1463 1464 1465 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1466 1467 rx_ring = &ha->rx_ring[r]; 1468 1469 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1470 rxb = &rx_ring->rx_buf[i]; 1471 rxb->handle = i; 1472 if (!(ret = ql_get_mbuf(ha, rxb, NULL))) { 1473 /* 1474 * set the physical address in the 1475 * corresponding descriptor entry in the 1476 * receive ring/queue for the hba 1477 */ 1478 qla_set_hw_rcv_desc(ha, r, i, rxb->handle, 1479 rxb->paddr, 1480 (rxb->m_head)->m_pkthdr.len); 1481 } else { 1482 device_printf(ha->pci_dev, 1483 "%s: ql_get_mbuf [%d, %d] failed\n", 1484 __func__, r, i); 1485 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1486 goto qla_alloc_rcv_std_err; 1487 } 1488 } 1489 } 1490 return 0; 1491 1492 qla_alloc_rcv_std_err: 1493 return (-1); 1494 } 1495 1496 static void 1497 qla_free_rcv_std(qla_host_t *ha) 1498 { 1499 int i, r; 1500 qla_rx_buf_t *rxb; 1501 1502 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1503 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1504 rxb = &ha->rx_ring[r].rx_buf[i]; 1505 if (rxb->m_head != NULL) { 1506 bus_dmamap_unload(ha->rx_tag, rxb->map); 1507 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1508 m_freem(rxb->m_head); 1509 rxb->m_head = NULL; 1510 } 1511 } 1512 } 1513 return; 1514 } 1515 1516 static int 1517 qla_alloc_rcv_bufs(qla_host_t *ha) 1518 { 1519 int i, ret = 0; 1520 1521 if (bus_dma_tag_create(NULL, /* parent */ 1522 1, 0, /* alignment, bounds */ 1523 BUS_SPACE_MAXADDR, /* lowaddr */ 1524 BUS_SPACE_MAXADDR, /* highaddr */ 1525 NULL, NULL, /* filter, filterarg */ 1526 MJUM9BYTES, /* maxsize */ 1527 1, /* nsegments */ 1528 MJUM9BYTES, /* maxsegsize */ 1529 BUS_DMA_ALLOCNOW, /* flags */ 1530 NULL, /* lockfunc */ 1531 NULL, /* lockfuncarg */ 1532 &ha->rx_tag)) { 1533 1534 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1535 __func__); 1536 1537 return (ENOMEM); 1538 } 1539 1540 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS)); 1541 1542 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1543 ha->hw.sds[i].sdsr_next = 0; 1544 ha->hw.sds[i].rxb_free = NULL; 1545 ha->hw.sds[i].rx_free = 0; 1546 } 1547 1548 ret = qla_alloc_rcv_std(ha); 1549 1550 return (ret); 1551 } 1552 1553 static void 1554 qla_free_rcv_bufs(qla_host_t *ha) 1555 { 1556 int i; 1557 1558 qla_free_rcv_std(ha); 1559 1560 if (ha->rx_tag != NULL) { 1561 bus_dma_tag_destroy(ha->rx_tag); 1562 ha->rx_tag = NULL; 1563 } 1564 1565 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS)); 1566 1567 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1568 ha->hw.sds[i].sdsr_next = 0; 1569 ha->hw.sds[i].rxb_free = NULL; 1570 ha->hw.sds[i].rx_free = 0; 1571 } 1572 1573 return; 1574 } 1575 1576 int 1577 ql_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp) 1578 { 1579 register struct mbuf *mp = nmp; 1580 struct ifnet *ifp; 1581 int ret = 0; 1582 uint32_t offset; 1583 bus_dma_segment_t segs[1]; 1584 int nsegs, mbuf_size; 1585 1586 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1587 1588 ifp = ha->ifp; 1589 1590 if (ha->hw.enable_9kb) 1591 mbuf_size = MJUM9BYTES; 1592 else 1593 mbuf_size = MCLBYTES; 1594 1595 if (mp == NULL) { 1596 1597 if (QL_ERR_INJECT(ha, INJCT_M_GETCL_M_GETJCL_FAILURE)) 1598 return(-1); 1599 1600 if (ha->hw.enable_9kb) 1601 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, mbuf_size); 1602 else 1603 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1604 1605 if (mp == NULL) { 1606 ha->err_m_getcl++; 1607 ret = ENOBUFS; 1608 device_printf(ha->pci_dev, 1609 "%s: m_getcl failed\n", __func__); 1610 goto exit_ql_get_mbuf; 1611 } 1612 mp->m_len = mp->m_pkthdr.len = mbuf_size; 1613 } else { 1614 mp->m_len = mp->m_pkthdr.len = mbuf_size; 1615 mp->m_data = mp->m_ext.ext_buf; 1616 mp->m_next = NULL; 1617 } 1618 1619 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1620 if (offset) { 1621 offset = 8 - offset; 1622 m_adj(mp, offset); 1623 } 1624 1625 /* 1626 * Using memory from the mbuf cluster pool, invoke the bus_dma 1627 * machinery to arrange the memory mapping. 1628 */ 1629 ret = bus_dmamap_load_mbuf_sg(ha->rx_tag, rxb->map, 1630 mp, segs, &nsegs, BUS_DMA_NOWAIT); 1631 rxb->paddr = segs[0].ds_addr; 1632 1633 if (ret || !rxb->paddr || (nsegs != 1)) { 1634 m_free(mp); 1635 rxb->m_head = NULL; 1636 device_printf(ha->pci_dev, 1637 "%s: bus_dmamap_load failed[%d, 0x%016llx, %d]\n", 1638 __func__, ret, (long long unsigned int)rxb->paddr, 1639 nsegs); 1640 ret = -1; 1641 goto exit_ql_get_mbuf; 1642 } 1643 rxb->m_head = mp; 1644 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1645 1646 exit_ql_get_mbuf: 1647 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1648 return (ret); 1649 } 1650 1651 static void 1652 qla_tx_done(void *context, int pending) 1653 { 1654 qla_host_t *ha = context; 1655 struct ifnet *ifp; 1656 1657 ifp = ha->ifp; 1658 1659 if (!ifp) 1660 return; 1661 1662 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1663 QL_DPRINT8(ha, (ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1664 return; 1665 } 1666 ql_hw_tx_done(ha); 1667 1668 qla_start(ha->ifp); 1669 } 1670 1671 static void 1672 qla_get_peer(qla_host_t *ha) 1673 { 1674 device_t *peers; 1675 int count, i, slot; 1676 int my_slot = pci_get_slot(ha->pci_dev); 1677 1678 if (device_get_children(device_get_parent(ha->pci_dev), &peers, &count)) 1679 return; 1680 1681 for (i = 0; i < count; i++) { 1682 slot = pci_get_slot(peers[i]); 1683 1684 if ((slot >= 0) && (slot == my_slot) && 1685 (pci_get_device(peers[i]) == 1686 pci_get_device(ha->pci_dev))) { 1687 if (ha->pci_dev != peers[i]) 1688 ha->peer_dev = peers[i]; 1689 } 1690 } 1691 } 1692 1693 static void 1694 qla_send_msg_to_peer(qla_host_t *ha, uint32_t msg_to_peer) 1695 { 1696 qla_host_t *ha_peer; 1697 1698 if (ha->peer_dev) { 1699 if ((ha_peer = device_get_softc(ha->peer_dev)) != NULL) { 1700 1701 ha_peer->msg_from_peer = msg_to_peer; 1702 } 1703 } 1704 } 1705 1706 static void 1707 qla_error_recovery(void *context, int pending) 1708 { 1709 qla_host_t *ha = context; 1710 uint32_t msecs_100 = 100; 1711 struct ifnet *ifp = ha->ifp; 1712 1713 (void)QLA_LOCK(ha, __func__, 0); 1714 1715 if (ha->flags.qla_interface_up) { 1716 1717 ha->hw.imd_compl = 1; 1718 qla_mdelay(__func__, 300); 1719 1720 ql_hw_stop_rcv(ha); 1721 1722 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1723 QLA_TX_LOCK(ha); QLA_TX_UNLOCK(ha); 1724 } 1725 1726 QLA_UNLOCK(ha, __func__); 1727 1728 if ((ha->pci_func & 0x1) == 0) { 1729 1730 if (!ha->msg_from_peer) { 1731 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET); 1732 1733 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && 1734 msecs_100--) 1735 qla_mdelay(__func__, 100); 1736 } 1737 1738 ha->msg_from_peer = 0; 1739 1740 (void)QLA_LOCK(ha, __func__, 0); 1741 ql_minidump(ha); 1742 QLA_UNLOCK(ha, __func__); 1743 1744 (void) ql_init_hw(ha); 1745 1746 (void)QLA_LOCK(ha, __func__, 0); 1747 if (ha->flags.qla_interface_up) { 1748 qla_free_xmt_bufs(ha); 1749 qla_free_rcv_bufs(ha); 1750 } 1751 QLA_UNLOCK(ha, __func__); 1752 1753 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK); 1754 1755 } else { 1756 if (ha->msg_from_peer == QL_PEER_MSG_RESET) { 1757 1758 ha->msg_from_peer = 0; 1759 1760 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK); 1761 } else { 1762 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET); 1763 } 1764 1765 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && msecs_100--) 1766 qla_mdelay(__func__, 100); 1767 ha->msg_from_peer = 0; 1768 1769 (void) ql_init_hw(ha); 1770 1771 (void)QLA_LOCK(ha, __func__, 0); 1772 if (ha->flags.qla_interface_up) { 1773 qla_free_xmt_bufs(ha); 1774 qla_free_rcv_bufs(ha); 1775 } 1776 QLA_UNLOCK(ha, __func__); 1777 } 1778 1779 (void)QLA_LOCK(ha, __func__, 0); 1780 1781 if (ha->flags.qla_interface_up) { 1782 if (qla_alloc_xmt_bufs(ha) != 0) { 1783 QLA_UNLOCK(ha, __func__); 1784 return; 1785 } 1786 qla_confirm_9kb_enable(ha); 1787 1788 if (qla_alloc_rcv_bufs(ha) != 0) { 1789 QLA_UNLOCK(ha, __func__); 1790 return; 1791 } 1792 1793 ha->flags.stop_rcv = 0; 1794 if (ql_init_hw_if(ha) == 0) { 1795 ifp = ha->ifp; 1796 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1797 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1798 ha->flags.qla_watchdog_pause = 0; 1799 } 1800 } else 1801 ha->flags.qla_watchdog_pause = 0; 1802 1803 QLA_UNLOCK(ha, __func__); 1804 } 1805 1806 static void 1807 qla_async_event(void *context, int pending) 1808 { 1809 qla_host_t *ha = context; 1810 1811 (void)QLA_LOCK(ha, __func__, 0); 1812 qla_hw_async_event(ha); 1813 QLA_UNLOCK(ha, __func__); 1814 } 1815 1816