1 /* 2 * Copyright (c) 2013-2016 Qlogic Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * and ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * File: ql_os.c 30 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 37 #include "ql_os.h" 38 #include "ql_hw.h" 39 #include "ql_def.h" 40 #include "ql_inline.h" 41 #include "ql_ver.h" 42 #include "ql_glbl.h" 43 #include "ql_dbg.h" 44 #include <sys/smp.h> 45 46 /* 47 * Some PCI Configuration Space Related Defines 48 */ 49 50 #ifndef PCI_VENDOR_QLOGIC 51 #define PCI_VENDOR_QLOGIC 0x1077 52 #endif 53 54 #ifndef PCI_PRODUCT_QLOGIC_ISP8030 55 #define PCI_PRODUCT_QLOGIC_ISP8030 0x8030 56 #endif 57 58 #define PCI_QLOGIC_ISP8030 \ 59 ((PCI_PRODUCT_QLOGIC_ISP8030 << 16) | PCI_VENDOR_QLOGIC) 60 61 /* 62 * static functions 63 */ 64 static int qla_alloc_parent_dma_tag(qla_host_t *ha); 65 static void qla_free_parent_dma_tag(qla_host_t *ha); 66 static int qla_alloc_xmt_bufs(qla_host_t *ha); 67 static void qla_free_xmt_bufs(qla_host_t *ha); 68 static int qla_alloc_rcv_bufs(qla_host_t *ha); 69 static void qla_free_rcv_bufs(qla_host_t *ha); 70 static void qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb); 71 72 static void qla_init_ifnet(device_t dev, qla_host_t *ha); 73 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 74 static int qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS); 75 static void qla_release(qla_host_t *ha); 76 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 77 int error); 78 static void qla_stop(qla_host_t *ha); 79 static void qla_get_peer(qla_host_t *ha); 80 static void qla_error_recovery(void *context, int pending); 81 static void qla_async_event(void *context, int pending); 82 static int qla_send(qla_host_t *ha, struct mbuf **m_headp, uint32_t txr_idx, 83 uint32_t iscsi_pdu); 84 85 /* 86 * Hooks to the Operating Systems 87 */ 88 static int qla_pci_probe (device_t); 89 static int qla_pci_attach (device_t); 90 static int qla_pci_detach (device_t); 91 92 static void qla_init(void *arg); 93 static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 94 static int qla_media_change(struct ifnet *ifp); 95 static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 96 97 static int qla_transmit(struct ifnet *ifp, struct mbuf *mp); 98 static void qla_qflush(struct ifnet *ifp); 99 static int qla_alloc_tx_br(qla_host_t *ha, qla_tx_fp_t *tx_fp); 100 static void qla_free_tx_br(qla_host_t *ha, qla_tx_fp_t *tx_fp); 101 static int qla_create_fp_taskqueues(qla_host_t *ha); 102 static void qla_destroy_fp_taskqueues(qla_host_t *ha); 103 static void qla_drain_fp_taskqueues(qla_host_t *ha); 104 105 static device_method_t qla_pci_methods[] = { 106 /* Device interface */ 107 DEVMETHOD(device_probe, qla_pci_probe), 108 DEVMETHOD(device_attach, qla_pci_attach), 109 DEVMETHOD(device_detach, qla_pci_detach), 110 { 0, 0 } 111 }; 112 113 static driver_t qla_pci_driver = { 114 "ql", qla_pci_methods, sizeof (qla_host_t), 115 }; 116 117 static devclass_t qla83xx_devclass; 118 119 DRIVER_MODULE(qla83xx, pci, qla_pci_driver, qla83xx_devclass, 0, 0); 120 121 MODULE_DEPEND(qla83xx, pci, 1, 1, 1); 122 MODULE_DEPEND(qla83xx, ether, 1, 1, 1); 123 124 MALLOC_DEFINE(M_QLA83XXBUF, "qla83xxbuf", "Buffers for qla83xx driver"); 125 126 #define QL_STD_REPLENISH_THRES 0 127 #define QL_JUMBO_REPLENISH_THRES 32 128 129 130 static char dev_str[64]; 131 static char ver_str[64]; 132 133 /* 134 * Name: qla_pci_probe 135 * Function: Validate the PCI device to be a QLA80XX device 136 */ 137 static int 138 qla_pci_probe(device_t dev) 139 { 140 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 141 case PCI_QLOGIC_ISP8030: 142 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 143 "Qlogic ISP 83xx PCI CNA Adapter-Ethernet Function", 144 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 145 QLA_VERSION_BUILD); 146 snprintf(ver_str, sizeof(ver_str), "v%d.%d.%d", 147 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 148 QLA_VERSION_BUILD); 149 device_set_desc(dev, dev_str); 150 break; 151 default: 152 return (ENXIO); 153 } 154 155 if (bootverbose) 156 printf("%s: %s\n ", __func__, dev_str); 157 158 return (BUS_PROBE_DEFAULT); 159 } 160 161 static void 162 qla_add_sysctls(qla_host_t *ha) 163 { 164 device_t dev = ha->pci_dev; 165 166 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 167 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 168 OID_AUTO, "version", CTLFLAG_RD, 169 ver_str, 0, "Driver Version"); 170 171 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 172 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 173 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RW, 174 (void *)ha, 0, 175 qla_sysctl_get_stats, "I", "Statistics"); 176 177 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 178 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 179 OID_AUTO, "fw_version", CTLFLAG_RD, 180 ha->fw_ver_str, 0, "firmware version"); 181 182 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 183 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 184 OID_AUTO, "link_status", CTLTYPE_INT | CTLFLAG_RW, 185 (void *)ha, 0, 186 qla_sysctl_get_link_status, "I", "Link Status"); 187 188 ha->dbg_level = 0; 189 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 190 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 191 OID_AUTO, "debug", CTLFLAG_RW, 192 &ha->dbg_level, ha->dbg_level, "Debug Level"); 193 194 ha->std_replenish = QL_STD_REPLENISH_THRES; 195 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 196 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 197 OID_AUTO, "std_replenish", CTLFLAG_RW, 198 &ha->std_replenish, ha->std_replenish, 199 "Threshold for Replenishing Standard Frames"); 200 201 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 202 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 203 OID_AUTO, "ipv4_lro", 204 CTLFLAG_RD, &ha->ipv4_lro, 205 "number of ipv4 lro completions"); 206 207 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 208 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 209 OID_AUTO, "ipv6_lro", 210 CTLFLAG_RD, &ha->ipv6_lro, 211 "number of ipv6 lro completions"); 212 213 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 214 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 215 OID_AUTO, "tx_tso_frames", 216 CTLFLAG_RD, &ha->tx_tso_frames, 217 "number of Tx TSO Frames"); 218 219 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev), 220 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 221 OID_AUTO, "hw_vlan_tx_frames", 222 CTLFLAG_RD, &ha->hw_vlan_tx_frames, 223 "number of Tx VLAN Frames"); 224 225 return; 226 } 227 228 static void 229 qla_watchdog(void *arg) 230 { 231 qla_host_t *ha = arg; 232 qla_hw_t *hw; 233 struct ifnet *ifp; 234 uint32_t i; 235 236 hw = &ha->hw; 237 ifp = ha->ifp; 238 239 if (ha->flags.qla_watchdog_exit) { 240 ha->qla_watchdog_exited = 1; 241 return; 242 } 243 ha->qla_watchdog_exited = 0; 244 245 if (!ha->flags.qla_watchdog_pause) { 246 if (ql_hw_check_health(ha) || ha->qla_initiate_recovery || 247 (ha->msg_from_peer == QL_PEER_MSG_RESET)) { 248 ha->qla_watchdog_paused = 1; 249 ha->flags.qla_watchdog_pause = 1; 250 ha->qla_initiate_recovery = 0; 251 ha->err_inject = 0; 252 device_printf(ha->pci_dev, 253 "%s: taskqueue_enqueue(err_task) \n", __func__); 254 taskqueue_enqueue(ha->err_tq, &ha->err_task); 255 } else if (ha->flags.qla_interface_up) { 256 257 if (ha->async_event) { 258 ha->async_event = 0; 259 taskqueue_enqueue(ha->async_event_tq, 260 &ha->async_event_task); 261 } 262 263 for (i = 0; i < ha->hw.num_sds_rings; i++) { 264 qla_tx_fp_t *fp = &ha->tx_fp[i]; 265 266 if (fp->fp_taskqueue != NULL) 267 taskqueue_enqueue(fp->fp_taskqueue, 268 &fp->fp_task); 269 } 270 271 ha->qla_watchdog_paused = 0; 272 } else { 273 ha->qla_watchdog_paused = 0; 274 } 275 } else { 276 ha->qla_watchdog_paused = 1; 277 } 278 279 ha->watchdog_ticks = ha->watchdog_ticks++ % 1000; 280 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 281 qla_watchdog, ha); 282 } 283 284 /* 285 * Name: qla_pci_attach 286 * Function: attaches the device to the operating system 287 */ 288 static int 289 qla_pci_attach(device_t dev) 290 { 291 qla_host_t *ha = NULL; 292 uint32_t rsrc_len; 293 int i; 294 uint32_t num_rcvq = 0; 295 296 if ((ha = device_get_softc(dev)) == NULL) { 297 device_printf(dev, "cannot get softc\n"); 298 return (ENOMEM); 299 } 300 301 memset(ha, 0, sizeof (qla_host_t)); 302 303 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8030) { 304 device_printf(dev, "device is not ISP8030\n"); 305 return (ENXIO); 306 } 307 308 ha->pci_func = pci_get_function(dev) & 0x1; 309 310 ha->pci_dev = dev; 311 312 pci_enable_busmaster(dev); 313 314 ha->reg_rid = PCIR_BAR(0); 315 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 316 RF_ACTIVE); 317 318 if (ha->pci_reg == NULL) { 319 device_printf(dev, "unable to map any ports\n"); 320 goto qla_pci_attach_err; 321 } 322 323 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 324 ha->reg_rid); 325 326 mtx_init(&ha->hw_lock, "qla83xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 327 328 qla_add_sysctls(ha); 329 ql_hw_add_sysctls(ha); 330 331 ha->flags.lock_init = 1; 332 333 ha->reg_rid1 = PCIR_BAR(2); 334 ha->pci_reg1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 335 &ha->reg_rid1, RF_ACTIVE); 336 337 ha->msix_count = pci_msix_count(dev); 338 339 if (ha->msix_count < (ha->hw.num_sds_rings + 1)) { 340 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 341 ha->msix_count); 342 goto qla_pci_attach_err; 343 } 344 345 QL_DPRINT2(ha, (dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x" 346 " msix_count 0x%x pci_reg %p pci_reg1 %p\n", __func__, ha, 347 ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg, 348 ha->pci_reg1)); 349 350 /* initialize hardware */ 351 if (ql_init_hw(ha)) { 352 device_printf(dev, "%s: ql_init_hw failed\n", __func__); 353 goto qla_pci_attach_err; 354 } 355 356 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 357 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 358 ha->fw_ver_build); 359 snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d", 360 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 361 ha->fw_ver_build); 362 363 if (qla_get_nic_partition(ha, NULL, &num_rcvq)) { 364 device_printf(dev, "%s: qla_get_nic_partition failed\n", 365 __func__); 366 goto qla_pci_attach_err; 367 } 368 device_printf(dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x" 369 " msix_count 0x%x pci_reg %p pci_reg1 %p num_rcvq = %d\n", 370 __func__, ha, ha->pci_func, rsrc_len, ha->msix_count, 371 ha->pci_reg, ha->pci_reg1, num_rcvq); 372 373 374 #ifdef QL_ENABLE_ISCSI_TLV 375 if ((ha->msix_count < 64) || (num_rcvq != 32)) { 376 ha->hw.num_sds_rings = 15; 377 ha->hw.num_tx_rings = ha->hw.num_sds_rings * 2; 378 } 379 #endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 380 ha->hw.num_rds_rings = ha->hw.num_sds_rings; 381 382 ha->msix_count = ha->hw.num_sds_rings + 1; 383 384 if (pci_alloc_msix(dev, &ha->msix_count)) { 385 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 386 ha->msix_count); 387 ha->msix_count = 0; 388 goto qla_pci_attach_err; 389 } 390 391 ha->mbx_irq_rid = 1; 392 ha->mbx_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 393 &ha->mbx_irq_rid, 394 (RF_ACTIVE | RF_SHAREABLE)); 395 if (ha->mbx_irq == NULL) { 396 device_printf(dev, "could not allocate mbx interrupt\n"); 397 goto qla_pci_attach_err; 398 } 399 if (bus_setup_intr(dev, ha->mbx_irq, (INTR_TYPE_NET | INTR_MPSAFE), 400 NULL, ql_mbx_isr, ha, &ha->mbx_handle)) { 401 device_printf(dev, "could not setup mbx interrupt\n"); 402 goto qla_pci_attach_err; 403 } 404 405 for (i = 0; i < ha->hw.num_sds_rings; i++) { 406 ha->irq_vec[i].sds_idx = i; 407 ha->irq_vec[i].ha = ha; 408 ha->irq_vec[i].irq_rid = 2 + i; 409 410 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 411 &ha->irq_vec[i].irq_rid, 412 (RF_ACTIVE | RF_SHAREABLE)); 413 414 if (ha->irq_vec[i].irq == NULL) { 415 device_printf(dev, "could not allocate interrupt\n"); 416 goto qla_pci_attach_err; 417 } 418 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 419 (INTR_TYPE_NET | INTR_MPSAFE), 420 NULL, ql_isr, &ha->irq_vec[i], 421 &ha->irq_vec[i].handle)) { 422 device_printf(dev, "could not setup interrupt\n"); 423 goto qla_pci_attach_err; 424 } 425 426 ha->tx_fp[i].ha = ha; 427 ha->tx_fp[i].txr_idx = i; 428 429 if (qla_alloc_tx_br(ha, &ha->tx_fp[i])) { 430 device_printf(dev, "%s: could not allocate tx_br[%d]\n", 431 __func__, i); 432 goto qla_pci_attach_err; 433 } 434 } 435 436 if (qla_create_fp_taskqueues(ha) != 0) 437 goto qla_pci_attach_err; 438 439 printf("%s: mp__ncpus %d sds %d rds %d msi-x %d\n", __func__, mp_ncpus, 440 ha->hw.num_sds_rings, ha->hw.num_rds_rings, ha->msix_count); 441 442 ql_read_mac_addr(ha); 443 444 /* allocate parent dma tag */ 445 if (qla_alloc_parent_dma_tag(ha)) { 446 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 447 __func__); 448 goto qla_pci_attach_err; 449 } 450 451 /* alloc all dma buffers */ 452 if (ql_alloc_dma(ha)) { 453 device_printf(dev, "%s: ql_alloc_dma failed\n", __func__); 454 goto qla_pci_attach_err; 455 } 456 qla_get_peer(ha); 457 458 if (ql_minidump_init(ha) != 0) { 459 device_printf(dev, "%s: ql_minidump_init failed\n", __func__); 460 goto qla_pci_attach_err; 461 } 462 /* create the o.s ethernet interface */ 463 qla_init_ifnet(dev, ha); 464 465 ha->flags.qla_watchdog_active = 1; 466 ha->flags.qla_watchdog_pause = 0; 467 468 callout_init(&ha->tx_callout, TRUE); 469 ha->flags.qla_callout_init = 1; 470 471 /* create ioctl device interface */ 472 if (ql_make_cdev(ha)) { 473 device_printf(dev, "%s: ql_make_cdev failed\n", __func__); 474 goto qla_pci_attach_err; 475 } 476 477 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 478 qla_watchdog, ha); 479 480 TASK_INIT(&ha->err_task, 0, qla_error_recovery, ha); 481 ha->err_tq = taskqueue_create("qla_errq", M_NOWAIT, 482 taskqueue_thread_enqueue, &ha->err_tq); 483 taskqueue_start_threads(&ha->err_tq, 1, PI_NET, "%s errq", 484 device_get_nameunit(ha->pci_dev)); 485 486 TASK_INIT(&ha->async_event_task, 0, qla_async_event, ha); 487 ha->async_event_tq = taskqueue_create("qla_asyncq", M_NOWAIT, 488 taskqueue_thread_enqueue, &ha->async_event_tq); 489 taskqueue_start_threads(&ha->async_event_tq, 1, PI_NET, "%s asyncq", 490 device_get_nameunit(ha->pci_dev)); 491 492 QL_DPRINT2(ha, (dev, "%s: exit 0\n", __func__)); 493 return (0); 494 495 qla_pci_attach_err: 496 497 qla_release(ha); 498 499 QL_DPRINT2(ha, (dev, "%s: exit ENXIO\n", __func__)); 500 return (ENXIO); 501 } 502 503 /* 504 * Name: qla_pci_detach 505 * Function: Unhooks the device from the operating system 506 */ 507 static int 508 qla_pci_detach(device_t dev) 509 { 510 qla_host_t *ha = NULL; 511 struct ifnet *ifp; 512 513 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 514 515 if ((ha = device_get_softc(dev)) == NULL) { 516 device_printf(dev, "cannot get softc\n"); 517 return (ENOMEM); 518 } 519 520 ifp = ha->ifp; 521 522 QLA_LOCK(ha); 523 qla_stop(ha); 524 QLA_UNLOCK(ha); 525 526 qla_release(ha); 527 528 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__)); 529 530 return (0); 531 } 532 533 /* 534 * SYSCTL Related Callbacks 535 */ 536 static int 537 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 538 { 539 int err, ret = 0; 540 qla_host_t *ha; 541 542 err = sysctl_handle_int(oidp, &ret, 0, req); 543 544 if (err || !req->newptr) 545 return (err); 546 547 if (ret == 1) { 548 ha = (qla_host_t *)arg1; 549 ql_get_stats(ha); 550 } 551 return (err); 552 } 553 static int 554 qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS) 555 { 556 int err, ret = 0; 557 qla_host_t *ha; 558 559 err = sysctl_handle_int(oidp, &ret, 0, req); 560 561 if (err || !req->newptr) 562 return (err); 563 564 if (ret == 1) { 565 ha = (qla_host_t *)arg1; 566 ql_hw_link_status(ha); 567 } 568 return (err); 569 } 570 571 /* 572 * Name: qla_release 573 * Function: Releases the resources allocated for the device 574 */ 575 static void 576 qla_release(qla_host_t *ha) 577 { 578 device_t dev; 579 int i; 580 581 dev = ha->pci_dev; 582 583 if (ha->async_event_tq) { 584 taskqueue_drain(ha->async_event_tq, &ha->async_event_task); 585 taskqueue_free(ha->async_event_tq); 586 } 587 588 if (ha->err_tq) { 589 taskqueue_drain(ha->err_tq, &ha->err_task); 590 taskqueue_free(ha->err_tq); 591 } 592 593 ql_del_cdev(ha); 594 595 if (ha->flags.qla_watchdog_active) { 596 ha->flags.qla_watchdog_exit = 1; 597 598 while (ha->qla_watchdog_exited == 0) 599 qla_mdelay(__func__, 1); 600 } 601 602 if (ha->flags.qla_callout_init) 603 callout_stop(&ha->tx_callout); 604 605 if (ha->ifp != NULL) 606 ether_ifdetach(ha->ifp); 607 608 ql_free_dma(ha); 609 qla_free_parent_dma_tag(ha); 610 611 if (ha->mbx_handle) 612 (void)bus_teardown_intr(dev, ha->mbx_irq, ha->mbx_handle); 613 614 if (ha->mbx_irq) 615 (void) bus_release_resource(dev, SYS_RES_IRQ, ha->mbx_irq_rid, 616 ha->mbx_irq); 617 618 for (i = 0; i < ha->hw.num_sds_rings; i++) { 619 620 if (ha->irq_vec[i].handle) { 621 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 622 ha->irq_vec[i].handle); 623 } 624 625 if (ha->irq_vec[i].irq) { 626 (void)bus_release_resource(dev, SYS_RES_IRQ, 627 ha->irq_vec[i].irq_rid, 628 ha->irq_vec[i].irq); 629 } 630 631 qla_free_tx_br(ha, &ha->tx_fp[i]); 632 } 633 qla_destroy_fp_taskqueues(ha); 634 635 if (ha->msix_count) 636 pci_release_msi(dev); 637 638 if (ha->flags.lock_init) { 639 mtx_destroy(&ha->hw_lock); 640 } 641 642 if (ha->pci_reg) 643 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 644 ha->pci_reg); 645 646 if (ha->pci_reg1) 647 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid1, 648 ha->pci_reg1); 649 } 650 651 /* 652 * DMA Related Functions 653 */ 654 655 static void 656 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 657 { 658 *((bus_addr_t *)arg) = 0; 659 660 if (error) { 661 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 662 return; 663 } 664 665 *((bus_addr_t *)arg) = segs[0].ds_addr; 666 667 return; 668 } 669 670 int 671 ql_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 672 { 673 int ret = 0; 674 device_t dev; 675 bus_addr_t b_addr; 676 677 dev = ha->pci_dev; 678 679 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 680 681 ret = bus_dma_tag_create( 682 ha->parent_tag,/* parent */ 683 dma_buf->alignment, 684 ((bus_size_t)(1ULL << 32)),/* boundary */ 685 BUS_SPACE_MAXADDR, /* lowaddr */ 686 BUS_SPACE_MAXADDR, /* highaddr */ 687 NULL, NULL, /* filter, filterarg */ 688 dma_buf->size, /* maxsize */ 689 1, /* nsegments */ 690 dma_buf->size, /* maxsegsize */ 691 0, /* flags */ 692 NULL, NULL, /* lockfunc, lockarg */ 693 &dma_buf->dma_tag); 694 695 if (ret) { 696 device_printf(dev, "%s: could not create dma tag\n", __func__); 697 goto ql_alloc_dmabuf_exit; 698 } 699 ret = bus_dmamem_alloc(dma_buf->dma_tag, 700 (void **)&dma_buf->dma_b, 701 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 702 &dma_buf->dma_map); 703 if (ret) { 704 bus_dma_tag_destroy(dma_buf->dma_tag); 705 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 706 goto ql_alloc_dmabuf_exit; 707 } 708 709 ret = bus_dmamap_load(dma_buf->dma_tag, 710 dma_buf->dma_map, 711 dma_buf->dma_b, 712 dma_buf->size, 713 qla_dmamap_callback, 714 &b_addr, BUS_DMA_NOWAIT); 715 716 if (ret || !b_addr) { 717 bus_dma_tag_destroy(dma_buf->dma_tag); 718 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 719 dma_buf->dma_map); 720 ret = -1; 721 goto ql_alloc_dmabuf_exit; 722 } 723 724 dma_buf->dma_addr = b_addr; 725 726 ql_alloc_dmabuf_exit: 727 QL_DPRINT2(ha, (dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 728 __func__, ret, (void *)dma_buf->dma_tag, 729 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 730 dma_buf->size)); 731 732 return ret; 733 } 734 735 void 736 ql_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 737 { 738 bus_dmamap_unload(dma_buf->dma_tag, dma_buf->dma_map); 739 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 740 bus_dma_tag_destroy(dma_buf->dma_tag); 741 } 742 743 static int 744 qla_alloc_parent_dma_tag(qla_host_t *ha) 745 { 746 int ret; 747 device_t dev; 748 749 dev = ha->pci_dev; 750 751 /* 752 * Allocate parent DMA Tag 753 */ 754 ret = bus_dma_tag_create( 755 bus_get_dma_tag(dev), /* parent */ 756 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 757 BUS_SPACE_MAXADDR, /* lowaddr */ 758 BUS_SPACE_MAXADDR, /* highaddr */ 759 NULL, NULL, /* filter, filterarg */ 760 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 761 0, /* nsegments */ 762 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 763 0, /* flags */ 764 NULL, NULL, /* lockfunc, lockarg */ 765 &ha->parent_tag); 766 767 if (ret) { 768 device_printf(dev, "%s: could not create parent dma tag\n", 769 __func__); 770 return (-1); 771 } 772 773 ha->flags.parent_tag = 1; 774 775 return (0); 776 } 777 778 static void 779 qla_free_parent_dma_tag(qla_host_t *ha) 780 { 781 if (ha->flags.parent_tag) { 782 bus_dma_tag_destroy(ha->parent_tag); 783 ha->flags.parent_tag = 0; 784 } 785 } 786 787 /* 788 * Name: qla_init_ifnet 789 * Function: Creates the Network Device Interface and Registers it with the O.S 790 */ 791 792 static void 793 qla_init_ifnet(device_t dev, qla_host_t *ha) 794 { 795 struct ifnet *ifp; 796 797 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__)); 798 799 ifp = ha->ifp = if_alloc(IFT_ETHER); 800 801 if (ifp == NULL) 802 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 803 804 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 805 806 ifp->if_baudrate = IF_Gbps(10); 807 ifp->if_capabilities = IFCAP_LINKSTATE; 808 ifp->if_mtu = ETHERMTU; 809 810 ifp->if_init = qla_init; 811 ifp->if_softc = ha; 812 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 813 ifp->if_ioctl = qla_ioctl; 814 815 ifp->if_transmit = qla_transmit; 816 ifp->if_qflush = qla_qflush; 817 818 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha)); 819 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha); 820 IFQ_SET_READY(&ifp->if_snd); 821 822 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 823 824 ether_ifattach(ifp, qla_get_mac_addr(ha)); 825 826 ifp->if_capabilities |= IFCAP_HWCSUM | 827 IFCAP_TSO4 | 828 IFCAP_JUMBO_MTU | 829 IFCAP_VLAN_HWTAGGING | 830 IFCAP_VLAN_MTU | 831 IFCAP_VLAN_HWTSO | 832 IFCAP_LRO; 833 834 ifp->if_capenable = ifp->if_capabilities; 835 836 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 837 838 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 839 840 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 841 NULL); 842 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 843 844 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 845 846 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__)); 847 848 return; 849 } 850 851 static void 852 qla_init_locked(qla_host_t *ha) 853 { 854 struct ifnet *ifp = ha->ifp; 855 856 qla_stop(ha); 857 858 if (qla_alloc_xmt_bufs(ha) != 0) 859 return; 860 861 qla_confirm_9kb_enable(ha); 862 863 if (qla_alloc_rcv_bufs(ha) != 0) 864 return; 865 866 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 867 868 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO; 869 870 ha->flags.stop_rcv = 0; 871 if (ql_init_hw_if(ha) == 0) { 872 ifp = ha->ifp; 873 ifp->if_drv_flags |= IFF_DRV_RUNNING; 874 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 875 ha->flags.qla_watchdog_pause = 0; 876 ha->hw_vlan_tx_frames = 0; 877 ha->tx_tso_frames = 0; 878 ha->flags.qla_interface_up = 1; 879 } 880 881 return; 882 } 883 884 static void 885 qla_init(void *arg) 886 { 887 qla_host_t *ha; 888 889 ha = (qla_host_t *)arg; 890 891 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 892 893 QLA_LOCK(ha); 894 qla_init_locked(ha); 895 QLA_UNLOCK(ha); 896 897 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 898 } 899 900 static int 901 qla_set_multi(qla_host_t *ha, uint32_t add_multi) 902 { 903 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 904 struct ifmultiaddr *ifma; 905 int mcnt = 0; 906 struct ifnet *ifp = ha->ifp; 907 int ret = 0; 908 909 if_maddr_rlock(ifp); 910 911 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 912 913 if (ifma->ifma_addr->sa_family != AF_LINK) 914 continue; 915 916 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 917 break; 918 919 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 920 &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 921 922 mcnt++; 923 } 924 925 if_maddr_runlock(ifp); 926 927 QLA_LOCK(ha); 928 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 929 ret = ql_hw_set_multi(ha, mta, mcnt, add_multi); 930 } 931 QLA_UNLOCK(ha); 932 933 return (ret); 934 } 935 936 static int 937 qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 938 { 939 int ret = 0; 940 struct ifreq *ifr = (struct ifreq *)data; 941 struct ifaddr *ifa = (struct ifaddr *)data; 942 qla_host_t *ha; 943 944 ha = (qla_host_t *)ifp->if_softc; 945 946 switch (cmd) { 947 case SIOCSIFADDR: 948 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 949 __func__, cmd)); 950 951 if (ifa->ifa_addr->sa_family == AF_INET) { 952 ifp->if_flags |= IFF_UP; 953 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 954 QLA_LOCK(ha); 955 qla_init_locked(ha); 956 QLA_UNLOCK(ha); 957 } 958 QL_DPRINT4(ha, (ha->pci_dev, 959 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 960 __func__, cmd, 961 ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 962 963 arp_ifinit(ifp, ifa); 964 } else { 965 ether_ioctl(ifp, cmd, data); 966 } 967 break; 968 969 case SIOCSIFMTU: 970 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 971 __func__, cmd)); 972 973 if (ifr->ifr_mtu > QLA_MAX_MTU) { 974 ret = EINVAL; 975 } else { 976 QLA_LOCK(ha); 977 978 ifp->if_mtu = ifr->ifr_mtu; 979 ha->max_frame_size = 980 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 981 982 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 983 qla_init_locked(ha); 984 } 985 986 if (ifp->if_mtu > ETHERMTU) 987 ha->std_replenish = QL_JUMBO_REPLENISH_THRES; 988 else 989 ha->std_replenish = QL_STD_REPLENISH_THRES; 990 991 992 QLA_UNLOCK(ha); 993 994 if (ret) 995 ret = EINVAL; 996 } 997 998 break; 999 1000 case SIOCSIFFLAGS: 1001 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 1002 __func__, cmd)); 1003 1004 QLA_LOCK(ha); 1005 1006 if (ifp->if_flags & IFF_UP) { 1007 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1008 if ((ifp->if_flags ^ ha->if_flags) & 1009 IFF_PROMISC) { 1010 ret = ql_set_promisc(ha); 1011 } else if ((ifp->if_flags ^ ha->if_flags) & 1012 IFF_ALLMULTI) { 1013 ret = ql_set_allmulti(ha); 1014 } 1015 } else { 1016 ha->max_frame_size = ifp->if_mtu + 1017 ETHER_HDR_LEN + ETHER_CRC_LEN; 1018 qla_init_locked(ha); 1019 } 1020 } else { 1021 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1022 qla_stop(ha); 1023 ha->if_flags = ifp->if_flags; 1024 } 1025 1026 QLA_UNLOCK(ha); 1027 break; 1028 1029 case SIOCADDMULTI: 1030 QL_DPRINT4(ha, (ha->pci_dev, 1031 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 1032 1033 if (qla_set_multi(ha, 1)) 1034 ret = EINVAL; 1035 break; 1036 1037 case SIOCDELMULTI: 1038 QL_DPRINT4(ha, (ha->pci_dev, 1039 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 1040 1041 if (qla_set_multi(ha, 0)) 1042 ret = EINVAL; 1043 break; 1044 1045 case SIOCSIFMEDIA: 1046 case SIOCGIFMEDIA: 1047 QL_DPRINT4(ha, (ha->pci_dev, 1048 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 1049 __func__, cmd)); 1050 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 1051 break; 1052 1053 case SIOCSIFCAP: 1054 { 1055 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1056 1057 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 1058 __func__, cmd)); 1059 1060 if (mask & IFCAP_HWCSUM) 1061 ifp->if_capenable ^= IFCAP_HWCSUM; 1062 if (mask & IFCAP_TSO4) 1063 ifp->if_capenable ^= IFCAP_TSO4; 1064 if (mask & IFCAP_VLAN_HWTAGGING) 1065 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 1066 if (mask & IFCAP_VLAN_HWTSO) 1067 ifp->if_capenable ^= IFCAP_VLAN_HWTSO; 1068 if (mask & IFCAP_LRO) 1069 ifp->if_capenable ^= IFCAP_LRO; 1070 1071 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1072 qla_init(ha); 1073 1074 VLAN_CAPABILITIES(ifp); 1075 break; 1076 } 1077 1078 default: 1079 QL_DPRINT4(ha, (ha->pci_dev, "%s: default (0x%lx)\n", 1080 __func__, cmd)); 1081 ret = ether_ioctl(ifp, cmd, data); 1082 break; 1083 } 1084 1085 return (ret); 1086 } 1087 1088 static int 1089 qla_media_change(struct ifnet *ifp) 1090 { 1091 qla_host_t *ha; 1092 struct ifmedia *ifm; 1093 int ret = 0; 1094 1095 ha = (qla_host_t *)ifp->if_softc; 1096 1097 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1098 1099 ifm = &ha->media; 1100 1101 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1102 ret = EINVAL; 1103 1104 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1105 1106 return (ret); 1107 } 1108 1109 static void 1110 qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 1111 { 1112 qla_host_t *ha; 1113 1114 ha = (qla_host_t *)ifp->if_softc; 1115 1116 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1117 1118 ifmr->ifm_status = IFM_AVALID; 1119 ifmr->ifm_active = IFM_ETHER; 1120 1121 ql_update_link_state(ha); 1122 if (ha->hw.link_up) { 1123 ifmr->ifm_status |= IFM_ACTIVE; 1124 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 1125 } 1126 1127 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit (%s)\n", __func__,\ 1128 (ha->hw.link_up ? "link_up" : "link_down"))); 1129 1130 return; 1131 } 1132 1133 1134 static int 1135 qla_send(qla_host_t *ha, struct mbuf **m_headp, uint32_t txr_idx, 1136 uint32_t iscsi_pdu) 1137 { 1138 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1139 bus_dmamap_t map; 1140 int nsegs; 1141 int ret = -1; 1142 uint32_t tx_idx; 1143 struct mbuf *m_head = *m_headp; 1144 1145 QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1146 1147 tx_idx = ha->hw.tx_cntxt[txr_idx].txr_next; 1148 map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map; 1149 1150 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1151 BUS_DMA_NOWAIT); 1152 1153 if (ret == EFBIG) { 1154 1155 struct mbuf *m; 1156 1157 QL_DPRINT8(ha, (ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1158 m_head->m_pkthdr.len)); 1159 1160 m = m_defrag(m_head, M_NOWAIT); 1161 if (m == NULL) { 1162 ha->err_tx_defrag++; 1163 m_freem(m_head); 1164 *m_headp = NULL; 1165 device_printf(ha->pci_dev, 1166 "%s: m_defrag() = NULL [%d]\n", 1167 __func__, ret); 1168 return (ENOBUFS); 1169 } 1170 m_head = m; 1171 *m_headp = m_head; 1172 1173 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1174 segs, &nsegs, BUS_DMA_NOWAIT))) { 1175 1176 ha->err_tx_dmamap_load++; 1177 1178 device_printf(ha->pci_dev, 1179 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1180 __func__, ret, m_head->m_pkthdr.len); 1181 1182 if (ret != ENOMEM) { 1183 m_freem(m_head); 1184 *m_headp = NULL; 1185 } 1186 return (ret); 1187 } 1188 1189 } else if (ret) { 1190 1191 ha->err_tx_dmamap_load++; 1192 1193 device_printf(ha->pci_dev, 1194 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1195 __func__, ret, m_head->m_pkthdr.len); 1196 1197 if (ret != ENOMEM) { 1198 m_freem(m_head); 1199 *m_headp = NULL; 1200 } 1201 return (ret); 1202 } 1203 1204 QL_ASSERT(ha, (nsegs != 0), ("qla_send: empty packet")); 1205 1206 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1207 1208 if (!(ret = ql_hw_send(ha, segs, nsegs, tx_idx, m_head, txr_idx, 1209 iscsi_pdu))) { 1210 ha->tx_ring[txr_idx].count++; 1211 ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head = m_head; 1212 } else { 1213 if (ret == EINVAL) { 1214 if (m_head) 1215 m_freem(m_head); 1216 *m_headp = NULL; 1217 } 1218 } 1219 1220 QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1221 return (ret); 1222 } 1223 1224 static int 1225 qla_alloc_tx_br(qla_host_t *ha, qla_tx_fp_t *fp) 1226 { 1227 snprintf(fp->tx_mtx_name, sizeof(fp->tx_mtx_name), 1228 "qla%d_fp%d_tx_mq_lock", ha->pci_func, fp->txr_idx); 1229 1230 mtx_init(&fp->tx_mtx, fp->tx_mtx_name, NULL, MTX_DEF); 1231 1232 fp->tx_br = buf_ring_alloc(NUM_TX_DESCRIPTORS, M_DEVBUF, 1233 M_NOWAIT, &fp->tx_mtx); 1234 if (fp->tx_br == NULL) { 1235 QL_DPRINT1(ha, (ha->pci_dev, "buf_ring_alloc failed for " 1236 " fp[%d, %d]\n", ha->pci_func, fp->txr_idx)); 1237 return (-ENOMEM); 1238 } 1239 return 0; 1240 } 1241 1242 static void 1243 qla_free_tx_br(qla_host_t *ha, qla_tx_fp_t *fp) 1244 { 1245 struct mbuf *mp; 1246 struct ifnet *ifp = ha->ifp; 1247 1248 if (mtx_initialized(&fp->tx_mtx)) { 1249 1250 if (fp->tx_br != NULL) { 1251 1252 mtx_lock(&fp->tx_mtx); 1253 1254 while ((mp = drbr_dequeue(ifp, fp->tx_br)) != NULL) { 1255 m_freem(mp); 1256 } 1257 1258 mtx_unlock(&fp->tx_mtx); 1259 1260 buf_ring_free(fp->tx_br, M_DEVBUF); 1261 fp->tx_br = NULL; 1262 } 1263 mtx_destroy(&fp->tx_mtx); 1264 } 1265 return; 1266 } 1267 1268 static void 1269 qla_fp_taskqueue(void *context, int pending) 1270 { 1271 qla_tx_fp_t *fp; 1272 qla_host_t *ha; 1273 struct ifnet *ifp; 1274 struct mbuf *mp; 1275 int ret; 1276 uint32_t txr_idx; 1277 uint32_t iscsi_pdu = 0; 1278 uint32_t rx_pkts_left; 1279 1280 fp = context; 1281 1282 if (fp == NULL) 1283 return; 1284 1285 ha = (qla_host_t *)fp->ha; 1286 1287 ifp = ha->ifp; 1288 1289 txr_idx = fp->txr_idx; 1290 1291 mtx_lock(&fp->tx_mtx); 1292 1293 if (((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1294 IFF_DRV_RUNNING) || (!ha->hw.link_up)) { 1295 mtx_unlock(&fp->tx_mtx); 1296 goto qla_fp_taskqueue_exit; 1297 } 1298 1299 rx_pkts_left = ql_rcv_isr(ha, fp->txr_idx, 64); 1300 1301 #ifdef QL_ENABLE_ISCSI_TLV 1302 ql_hw_tx_done_locked(ha, fp->txr_idx); 1303 ql_hw_tx_done_locked(ha, (fp->txr_idx + (ha->hw.num_tx_rings >> 1))); 1304 txr_idx = txr_idx + (ha->hw.num_tx_rings >> 1); 1305 #else 1306 ql_hw_tx_done_locked(ha, fp->txr_idx); 1307 #endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 1308 1309 mp = drbr_peek(ifp, fp->tx_br); 1310 1311 while (mp != NULL) { 1312 1313 if (M_HASHTYPE_GET(mp) != M_HASHTYPE_NONE) { 1314 #ifdef QL_ENABLE_ISCSI_TLV 1315 if (ql_iscsi_pdu(ha, mp) == 0) { 1316 iscsi_pdu = 1; 1317 } 1318 #endif /* #ifdef QL_ENABLE_ISCSI_TLV */ 1319 } 1320 1321 ret = qla_send(ha, &mp, txr_idx, iscsi_pdu); 1322 1323 if (ret) { 1324 if (mp != NULL) 1325 drbr_putback(ifp, fp->tx_br, mp); 1326 else { 1327 drbr_advance(ifp, fp->tx_br); 1328 } 1329 1330 mtx_unlock(&fp->tx_mtx); 1331 1332 goto qla_fp_taskqueue_exit0; 1333 } else { 1334 drbr_advance(ifp, fp->tx_br); 1335 } 1336 1337 mp = drbr_peek(ifp, fp->tx_br); 1338 } 1339 1340 mtx_unlock(&fp->tx_mtx); 1341 1342 qla_fp_taskqueue_exit0: 1343 1344 if (rx_pkts_left || ((mp != NULL) && ret)) { 1345 taskqueue_enqueue(fp->fp_taskqueue, &fp->fp_task); 1346 } else { 1347 if (!ha->flags.stop_rcv) { 1348 QL_ENABLE_INTERRUPTS(ha, fp->txr_idx); 1349 } 1350 } 1351 1352 qla_fp_taskqueue_exit: 1353 1354 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = %d\n", __func__, ret)); 1355 return; 1356 } 1357 1358 static int 1359 qla_create_fp_taskqueues(qla_host_t *ha) 1360 { 1361 int i; 1362 uint8_t tq_name[32]; 1363 1364 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1365 1366 qla_tx_fp_t *fp = &ha->tx_fp[i]; 1367 1368 bzero(tq_name, sizeof (tq_name)); 1369 snprintf(tq_name, sizeof (tq_name), "ql_fp_tq_%d", i); 1370 1371 TASK_INIT(&fp->fp_task, 0, qla_fp_taskqueue, fp); 1372 1373 fp->fp_taskqueue = taskqueue_create_fast(tq_name, M_NOWAIT, 1374 taskqueue_thread_enqueue, 1375 &fp->fp_taskqueue); 1376 1377 if (fp->fp_taskqueue == NULL) 1378 return (-1); 1379 1380 taskqueue_start_threads(&fp->fp_taskqueue, 1, PI_NET, "%s", 1381 tq_name); 1382 1383 QL_DPRINT1(ha, (ha->pci_dev, "%s: %p\n", __func__, 1384 fp->fp_taskqueue)); 1385 } 1386 1387 return (0); 1388 } 1389 1390 static void 1391 qla_destroy_fp_taskqueues(qla_host_t *ha) 1392 { 1393 int i; 1394 1395 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1396 1397 qla_tx_fp_t *fp = &ha->tx_fp[i]; 1398 1399 if (fp->fp_taskqueue != NULL) { 1400 taskqueue_drain(fp->fp_taskqueue, &fp->fp_task); 1401 taskqueue_free(fp->fp_taskqueue); 1402 fp->fp_taskqueue = NULL; 1403 } 1404 } 1405 return; 1406 } 1407 1408 static void 1409 qla_drain_fp_taskqueues(qla_host_t *ha) 1410 { 1411 int i; 1412 1413 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1414 qla_tx_fp_t *fp = &ha->tx_fp[i]; 1415 1416 if (fp->fp_taskqueue != NULL) { 1417 taskqueue_drain(fp->fp_taskqueue, &fp->fp_task); 1418 } 1419 } 1420 return; 1421 } 1422 1423 static int 1424 qla_transmit(struct ifnet *ifp, struct mbuf *mp) 1425 { 1426 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 1427 qla_tx_fp_t *fp; 1428 int rss_id = 0; 1429 int ret = 0; 1430 1431 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1432 1433 #if __FreeBSD_version >= 1100000 1434 if (M_HASHTYPE_GET(mp) != M_HASHTYPE_NONE) 1435 #else 1436 if (mp->m_flags & M_FLOWID) 1437 #endif 1438 rss_id = (mp->m_pkthdr.flowid & Q8_RSS_IND_TBL_MAX_IDX) % 1439 ha->hw.num_sds_rings; 1440 fp = &ha->tx_fp[rss_id]; 1441 1442 if (fp->tx_br == NULL) { 1443 ret = EINVAL; 1444 goto qla_transmit_exit; 1445 } 1446 1447 if (mp != NULL) { 1448 ret = drbr_enqueue(ifp, fp->tx_br, mp); 1449 } 1450 1451 if (fp->fp_taskqueue != NULL) 1452 taskqueue_enqueue(fp->fp_taskqueue, &fp->fp_task); 1453 1454 ret = 0; 1455 1456 qla_transmit_exit: 1457 1458 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = %d\n", __func__, ret)); 1459 return ret; 1460 } 1461 1462 static void 1463 qla_qflush(struct ifnet *ifp) 1464 { 1465 int i; 1466 qla_tx_fp_t *fp; 1467 struct mbuf *mp; 1468 qla_host_t *ha; 1469 1470 ha = (qla_host_t *)ifp->if_softc; 1471 1472 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1473 1474 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1475 1476 fp = &ha->tx_fp[i]; 1477 1478 if (fp == NULL) 1479 continue; 1480 1481 if (fp->tx_br) { 1482 mtx_lock(&fp->tx_mtx); 1483 1484 while ((mp = drbr_dequeue(ifp, fp->tx_br)) != NULL) { 1485 m_freem(mp); 1486 } 1487 mtx_unlock(&fp->tx_mtx); 1488 } 1489 } 1490 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1491 1492 return; 1493 } 1494 1495 static void 1496 qla_stop(qla_host_t *ha) 1497 { 1498 struct ifnet *ifp = ha->ifp; 1499 device_t dev; 1500 int i = 0; 1501 1502 dev = ha->pci_dev; 1503 1504 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1505 1506 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1507 qla_tx_fp_t *fp; 1508 1509 fp = &ha->tx_fp[i]; 1510 1511 if (fp == NULL) 1512 continue; 1513 1514 if (fp->tx_br != NULL) { 1515 mtx_lock(&fp->tx_mtx); 1516 mtx_unlock(&fp->tx_mtx); 1517 } 1518 } 1519 1520 ha->flags.qla_watchdog_pause = 1; 1521 1522 while (!ha->qla_watchdog_paused) { 1523 QLA_UNLOCK(ha); 1524 qla_mdelay(__func__, 1); 1525 QLA_LOCK(ha); 1526 } 1527 1528 ha->flags.qla_interface_up = 0; 1529 1530 QLA_UNLOCK(ha); 1531 qla_drain_fp_taskqueues(ha); 1532 QLA_LOCK(ha); 1533 1534 ql_del_hw_if(ha); 1535 1536 qla_free_xmt_bufs(ha); 1537 qla_free_rcv_bufs(ha); 1538 1539 return; 1540 } 1541 1542 /* 1543 * Buffer Management Functions for Transmit and Receive Rings 1544 */ 1545 static int 1546 qla_alloc_xmt_bufs(qla_host_t *ha) 1547 { 1548 int ret = 0; 1549 uint32_t i, j; 1550 qla_tx_buf_t *txb; 1551 1552 if (bus_dma_tag_create(NULL, /* parent */ 1553 1, 0, /* alignment, bounds */ 1554 BUS_SPACE_MAXADDR, /* lowaddr */ 1555 BUS_SPACE_MAXADDR, /* highaddr */ 1556 NULL, NULL, /* filter, filterarg */ 1557 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1558 QLA_MAX_SEGMENTS, /* nsegments */ 1559 PAGE_SIZE, /* maxsegsize */ 1560 BUS_DMA_ALLOCNOW, /* flags */ 1561 NULL, /* lockfunc */ 1562 NULL, /* lockfuncarg */ 1563 &ha->tx_tag)) { 1564 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1565 __func__); 1566 return (ENOMEM); 1567 } 1568 1569 for (i = 0; i < ha->hw.num_tx_rings; i++) { 1570 bzero((void *)ha->tx_ring[i].tx_buf, 1571 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1572 } 1573 1574 for (j = 0; j < ha->hw.num_tx_rings; j++) { 1575 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) { 1576 1577 txb = &ha->tx_ring[j].tx_buf[i]; 1578 1579 if ((ret = bus_dmamap_create(ha->tx_tag, 1580 BUS_DMA_NOWAIT, &txb->map))) { 1581 1582 ha->err_tx_dmamap_create++; 1583 device_printf(ha->pci_dev, 1584 "%s: bus_dmamap_create failed[%d]\n", 1585 __func__, ret); 1586 1587 qla_free_xmt_bufs(ha); 1588 1589 return (ret); 1590 } 1591 } 1592 } 1593 1594 return 0; 1595 } 1596 1597 /* 1598 * Release mbuf after it sent on the wire 1599 */ 1600 static void 1601 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1602 { 1603 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1604 1605 if (txb->m_head && txb->map) { 1606 1607 bus_dmamap_unload(ha->tx_tag, txb->map); 1608 1609 m_freem(txb->m_head); 1610 txb->m_head = NULL; 1611 } 1612 1613 if (txb->map) 1614 bus_dmamap_destroy(ha->tx_tag, txb->map); 1615 1616 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__)); 1617 } 1618 1619 static void 1620 qla_free_xmt_bufs(qla_host_t *ha) 1621 { 1622 int i, j; 1623 1624 for (j = 0; j < ha->hw.num_tx_rings; j++) { 1625 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1626 qla_clear_tx_buf(ha, &ha->tx_ring[j].tx_buf[i]); 1627 } 1628 1629 if (ha->tx_tag != NULL) { 1630 bus_dma_tag_destroy(ha->tx_tag); 1631 ha->tx_tag = NULL; 1632 } 1633 1634 for (i = 0; i < ha->hw.num_tx_rings; i++) { 1635 bzero((void *)ha->tx_ring[i].tx_buf, 1636 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1637 } 1638 return; 1639 } 1640 1641 1642 static int 1643 qla_alloc_rcv_std(qla_host_t *ha) 1644 { 1645 int i, j, k, r, ret = 0; 1646 qla_rx_buf_t *rxb; 1647 qla_rx_ring_t *rx_ring; 1648 1649 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1650 1651 rx_ring = &ha->rx_ring[r]; 1652 1653 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1654 1655 rxb = &rx_ring->rx_buf[i]; 1656 1657 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, 1658 &rxb->map); 1659 1660 if (ret) { 1661 device_printf(ha->pci_dev, 1662 "%s: dmamap[%d, %d] failed\n", 1663 __func__, r, i); 1664 1665 for (k = 0; k < r; k++) { 1666 for (j = 0; j < NUM_RX_DESCRIPTORS; 1667 j++) { 1668 rxb = &ha->rx_ring[k].rx_buf[j]; 1669 bus_dmamap_destroy(ha->rx_tag, 1670 rxb->map); 1671 } 1672 } 1673 1674 for (j = 0; j < i; j++) { 1675 bus_dmamap_destroy(ha->rx_tag, 1676 rx_ring->rx_buf[j].map); 1677 } 1678 goto qla_alloc_rcv_std_err; 1679 } 1680 } 1681 } 1682 1683 qla_init_hw_rcv_descriptors(ha); 1684 1685 1686 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1687 1688 rx_ring = &ha->rx_ring[r]; 1689 1690 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1691 rxb = &rx_ring->rx_buf[i]; 1692 rxb->handle = i; 1693 if (!(ret = ql_get_mbuf(ha, rxb, NULL))) { 1694 /* 1695 * set the physical address in the 1696 * corresponding descriptor entry in the 1697 * receive ring/queue for the hba 1698 */ 1699 qla_set_hw_rcv_desc(ha, r, i, rxb->handle, 1700 rxb->paddr, 1701 (rxb->m_head)->m_pkthdr.len); 1702 } else { 1703 device_printf(ha->pci_dev, 1704 "%s: ql_get_mbuf [%d, %d] failed\n", 1705 __func__, r, i); 1706 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1707 goto qla_alloc_rcv_std_err; 1708 } 1709 } 1710 } 1711 return 0; 1712 1713 qla_alloc_rcv_std_err: 1714 return (-1); 1715 } 1716 1717 static void 1718 qla_free_rcv_std(qla_host_t *ha) 1719 { 1720 int i, r; 1721 qla_rx_buf_t *rxb; 1722 1723 for (r = 0; r < ha->hw.num_rds_rings; r++) { 1724 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1725 rxb = &ha->rx_ring[r].rx_buf[i]; 1726 if (rxb->m_head != NULL) { 1727 bus_dmamap_unload(ha->rx_tag, rxb->map); 1728 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1729 m_freem(rxb->m_head); 1730 rxb->m_head = NULL; 1731 } 1732 } 1733 } 1734 return; 1735 } 1736 1737 static int 1738 qla_alloc_rcv_bufs(qla_host_t *ha) 1739 { 1740 int i, ret = 0; 1741 1742 if (bus_dma_tag_create(NULL, /* parent */ 1743 1, 0, /* alignment, bounds */ 1744 BUS_SPACE_MAXADDR, /* lowaddr */ 1745 BUS_SPACE_MAXADDR, /* highaddr */ 1746 NULL, NULL, /* filter, filterarg */ 1747 MJUM9BYTES, /* maxsize */ 1748 1, /* nsegments */ 1749 MJUM9BYTES, /* maxsegsize */ 1750 BUS_DMA_ALLOCNOW, /* flags */ 1751 NULL, /* lockfunc */ 1752 NULL, /* lockfuncarg */ 1753 &ha->rx_tag)) { 1754 1755 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1756 __func__); 1757 1758 return (ENOMEM); 1759 } 1760 1761 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS)); 1762 1763 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1764 ha->hw.sds[i].sdsr_next = 0; 1765 ha->hw.sds[i].rxb_free = NULL; 1766 ha->hw.sds[i].rx_free = 0; 1767 } 1768 1769 ret = qla_alloc_rcv_std(ha); 1770 1771 return (ret); 1772 } 1773 1774 static void 1775 qla_free_rcv_bufs(qla_host_t *ha) 1776 { 1777 int i; 1778 1779 qla_free_rcv_std(ha); 1780 1781 if (ha->rx_tag != NULL) { 1782 bus_dma_tag_destroy(ha->rx_tag); 1783 ha->rx_tag = NULL; 1784 } 1785 1786 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS)); 1787 1788 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1789 ha->hw.sds[i].sdsr_next = 0; 1790 ha->hw.sds[i].rxb_free = NULL; 1791 ha->hw.sds[i].rx_free = 0; 1792 } 1793 1794 return; 1795 } 1796 1797 int 1798 ql_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp) 1799 { 1800 struct mbuf *mp = nmp; 1801 struct ifnet *ifp; 1802 int ret = 0; 1803 uint32_t offset; 1804 bus_dma_segment_t segs[1]; 1805 int nsegs, mbuf_size; 1806 1807 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__)); 1808 1809 ifp = ha->ifp; 1810 1811 if (ha->hw.enable_9kb) 1812 mbuf_size = MJUM9BYTES; 1813 else 1814 mbuf_size = MCLBYTES; 1815 1816 if (mp == NULL) { 1817 1818 if (QL_ERR_INJECT(ha, INJCT_M_GETCL_M_GETJCL_FAILURE)) 1819 return(-1); 1820 1821 if (ha->hw.enable_9kb) 1822 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, mbuf_size); 1823 else 1824 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1825 1826 if (mp == NULL) { 1827 ha->err_m_getcl++; 1828 ret = ENOBUFS; 1829 device_printf(ha->pci_dev, 1830 "%s: m_getcl failed\n", __func__); 1831 goto exit_ql_get_mbuf; 1832 } 1833 mp->m_len = mp->m_pkthdr.len = mbuf_size; 1834 } else { 1835 mp->m_len = mp->m_pkthdr.len = mbuf_size; 1836 mp->m_data = mp->m_ext.ext_buf; 1837 mp->m_next = NULL; 1838 } 1839 1840 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1841 if (offset) { 1842 offset = 8 - offset; 1843 m_adj(mp, offset); 1844 } 1845 1846 /* 1847 * Using memory from the mbuf cluster pool, invoke the bus_dma 1848 * machinery to arrange the memory mapping. 1849 */ 1850 ret = bus_dmamap_load_mbuf_sg(ha->rx_tag, rxb->map, 1851 mp, segs, &nsegs, BUS_DMA_NOWAIT); 1852 rxb->paddr = segs[0].ds_addr; 1853 1854 if (ret || !rxb->paddr || (nsegs != 1)) { 1855 m_free(mp); 1856 rxb->m_head = NULL; 1857 device_printf(ha->pci_dev, 1858 "%s: bus_dmamap_load failed[%d, 0x%016llx, %d]\n", 1859 __func__, ret, (long long unsigned int)rxb->paddr, 1860 nsegs); 1861 ret = -1; 1862 goto exit_ql_get_mbuf; 1863 } 1864 rxb->m_head = mp; 1865 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1866 1867 exit_ql_get_mbuf: 1868 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1869 return (ret); 1870 } 1871 1872 1873 static void 1874 qla_get_peer(qla_host_t *ha) 1875 { 1876 device_t *peers; 1877 int count, i, slot; 1878 int my_slot = pci_get_slot(ha->pci_dev); 1879 1880 if (device_get_children(device_get_parent(ha->pci_dev), &peers, &count)) 1881 return; 1882 1883 for (i = 0; i < count; i++) { 1884 slot = pci_get_slot(peers[i]); 1885 1886 if ((slot >= 0) && (slot == my_slot) && 1887 (pci_get_device(peers[i]) == 1888 pci_get_device(ha->pci_dev))) { 1889 if (ha->pci_dev != peers[i]) 1890 ha->peer_dev = peers[i]; 1891 } 1892 } 1893 } 1894 1895 static void 1896 qla_send_msg_to_peer(qla_host_t *ha, uint32_t msg_to_peer) 1897 { 1898 qla_host_t *ha_peer; 1899 1900 if (ha->peer_dev) { 1901 if ((ha_peer = device_get_softc(ha->peer_dev)) != NULL) { 1902 1903 ha_peer->msg_from_peer = msg_to_peer; 1904 } 1905 } 1906 } 1907 1908 static void 1909 qla_error_recovery(void *context, int pending) 1910 { 1911 qla_host_t *ha = context; 1912 uint32_t msecs_100 = 100; 1913 struct ifnet *ifp = ha->ifp; 1914 int i = 0; 1915 1916 QLA_LOCK(ha); 1917 1918 if (ha->flags.qla_interface_up) { 1919 1920 ha->hw.imd_compl = 1; 1921 1922 QLA_UNLOCK(ha); 1923 qla_mdelay(__func__, 300); 1924 QLA_LOCK(ha); 1925 1926 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1927 1928 for (i = 0; i < ha->hw.num_sds_rings; i++) { 1929 qla_tx_fp_t *fp; 1930 1931 fp = &ha->tx_fp[i]; 1932 1933 if (fp == NULL) 1934 continue; 1935 1936 if (fp->tx_br != NULL) { 1937 mtx_lock(&fp->tx_mtx); 1938 mtx_unlock(&fp->tx_mtx); 1939 } 1940 } 1941 } 1942 1943 QLA_UNLOCK(ha); 1944 1945 qla_drain_fp_taskqueues(ha); 1946 1947 if ((ha->pci_func & 0x1) == 0) { 1948 1949 if (!ha->msg_from_peer) { 1950 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET); 1951 1952 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && 1953 msecs_100--) 1954 qla_mdelay(__func__, 100); 1955 } 1956 1957 ha->msg_from_peer = 0; 1958 1959 QLA_LOCK(ha); 1960 1961 ql_minidump(ha); 1962 1963 QLA_UNLOCK(ha); 1964 1965 (void) ql_init_hw(ha); 1966 1967 QLA_LOCK(ha); 1968 1969 if (ha->flags.qla_interface_up) { 1970 qla_free_xmt_bufs(ha); 1971 qla_free_rcv_bufs(ha); 1972 } 1973 1974 QLA_UNLOCK(ha); 1975 1976 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK); 1977 1978 } else { 1979 if (ha->msg_from_peer == QL_PEER_MSG_RESET) { 1980 1981 ha->msg_from_peer = 0; 1982 1983 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK); 1984 } else { 1985 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET); 1986 } 1987 1988 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && msecs_100--) 1989 qla_mdelay(__func__, 100); 1990 ha->msg_from_peer = 0; 1991 1992 (void) ql_init_hw(ha); 1993 1994 QLA_LOCK(ha); 1995 1996 if (ha->flags.qla_interface_up) { 1997 qla_free_xmt_bufs(ha); 1998 qla_free_rcv_bufs(ha); 1999 } 2000 2001 QLA_UNLOCK(ha); 2002 } 2003 2004 QLA_LOCK(ha); 2005 2006 if (ha->flags.qla_interface_up) { 2007 2008 if (qla_alloc_xmt_bufs(ha) != 0) { 2009 QLA_UNLOCK(ha); 2010 return; 2011 } 2012 qla_confirm_9kb_enable(ha); 2013 2014 if (qla_alloc_rcv_bufs(ha) != 0) { 2015 QLA_UNLOCK(ha); 2016 return; 2017 } 2018 2019 ha->flags.stop_rcv = 0; 2020 2021 if (ql_init_hw_if(ha) == 0) { 2022 ifp = ha->ifp; 2023 ifp->if_drv_flags |= IFF_DRV_RUNNING; 2024 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 2025 ha->flags.qla_watchdog_pause = 0; 2026 } 2027 } else 2028 ha->flags.qla_watchdog_pause = 0; 2029 2030 QLA_UNLOCK(ha); 2031 } 2032 2033 static void 2034 qla_async_event(void *context, int pending) 2035 { 2036 qla_host_t *ha = context; 2037 2038 QLA_LOCK(ha); 2039 qla_hw_async_event(ha); 2040 QLA_UNLOCK(ha); 2041 } 2042 2043