xref: /freebsd/sys/dev/qlxgbe/ql_ioctl.h (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2013-2016 Qlogic Corporation
5  * All rights reserved.
6  *
7  *  Redistribution and use in source and binary forms, with or without
8  *  modification, are permitted provided that the following conditions
9  *  are met:
10  *
11  *  1. Redistributions of source code must retain the above copyright
12  *     notice, this list of conditions and the following disclaimer.
13  *  2. Redistributions in binary form must reproduce the above copyright
14  *     notice, this list of conditions and the following disclaimer in the
15  *     documentation and/or other materials provided with the distribution.
16  *
17  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  *  POSSIBILITY OF SUCH DAMAGE.
28  */
29 /*
30  * File: ql_ioctl.h
31  * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
32  */
33 
34 #ifndef _QL_IOCTL_H_
35 #define _QL_IOCTL_H_
36 
37 #include <sys/ioccom.h>
38 
39 struct qla_reg_val {
40         uint16_t rd;
41         uint16_t direct;
42         uint32_t reg;
43         uint32_t val;
44 };
45 typedef struct qla_reg_val qla_reg_val_t;
46 
47 struct qla_rd_flash {
48         uint32_t off;
49         uint32_t data;
50 };
51 typedef struct qla_rd_flash qla_rd_flash_t;
52 
53 struct qla_wr_flash {
54 	uint32_t off;
55 	uint32_t size;
56 	void *buffer;
57 	uint32_t pattern;
58 };
59 typedef struct qla_wr_flash qla_wr_flash_t;
60 
61 struct qla_erase_flash {
62 	uint32_t off;
63 	uint32_t size;
64 };
65 typedef struct qla_erase_flash qla_erase_flash_t;
66 
67 struct qla_rd_pci_ids {
68 	uint16_t ven_id;
69 	uint16_t dev_id;
70 	uint16_t subsys_ven_id;
71 	uint16_t subsys_dev_id;
72 	uint8_t rev_id;
73 };
74 typedef struct qla_rd_pci_ids qla_rd_pci_ids_t;
75 
76 #define NUM_LOG_ENTRY_PARAMS	5
77 #define NUM_LOG_ENTRIES		512
78 
79 struct qla_sp_log_entry {
80 	uint32_t fmtstr_idx;
81 	uint32_t num_params;
82 	uint64_t usec_ts;
83 	uint32_t params[NUM_LOG_ENTRY_PARAMS];
84 };
85 typedef struct qla_sp_log_entry qla_sp_log_entry_t;
86 
87 /*
88  * structure encapsulating the value to read/write from/to offchip (MS) memory
89  */
90 struct qla_offchip_mem_val {
91 	uint16_t rd;
92 	uint64_t off;
93 	uint32_t data_lo;
94 	uint32_t data_hi;
95 	uint32_t data_ulo;
96 	uint32_t data_uhi;
97 };
98 typedef struct qla_offchip_mem_val qla_offchip_mem_val_t;
99 
100 struct qla_rd_fw_dump {
101 	uint16_t pci_func;
102 	uint16_t saved;
103 	uint64_t usec_ts;
104 	uint32_t minidump_size;
105 	void *minidump;
106 };
107 typedef struct qla_rd_fw_dump qla_rd_fw_dump_t;
108 
109 struct qla_drvr_state_tx {
110 	uint64_t	base_p_addr;
111 	uint64_t	cons_p_addr;
112 	uint32_t	tx_prod_reg;
113 	uint32_t	tx_cntxt_id;
114 	uint32_t	txr_free;
115 	uint32_t	txr_next;
116 	uint32_t	txr_comp;
117 };
118 typedef struct qla_drvr_state_tx qla_drvr_state_tx_t;
119 
120 struct qla_drvr_state_sds {
121 	uint32_t        sdsr_next; /* next entry in SDS ring to process */
122 	uint32_t        sds_consumer;
123 };
124 typedef struct qla_drvr_state_sds qla_drvr_state_sds_t;
125 
126 struct qla_drvr_state_rx {
127 	uint32_t	prod_std;
128 	uint32_t	rx_next; /* next standard rcv ring to arm fw */;
129 };
130 typedef struct qla_drvr_state_rx qla_drvr_state_rx_t;
131 
132 struct qla_drvr_state_hdr {
133 	uint32_t	drvr_version_major;
134 	uint32_t	drvr_version_minor;
135 	uint32_t	drvr_version_build;
136 
137 	uint8_t         mac_addr[ETHER_ADDR_LEN];
138 	uint16_t	saved;
139 	uint64_t	usec_ts;
140         uint16_t        link_speed;
141         uint16_t        cable_length;
142         uint32_t        cable_oui;
143         uint8_t         link_up;
144         uint8_t         module_type;
145         uint8_t         link_faults;
146         uint32_t        rcv_intr_coalesce;
147         uint32_t        xmt_intr_coalesce;
148 
149 	uint32_t	tx_state_offset;/* size = sizeof (qla_drvr_state_tx_t) * num_tx_rings */
150 	uint32_t	rx_state_offset;/* size = sizeof (qla_drvr_state_rx_t) * num_rx_rings */
151 	uint32_t	sds_state_offset;/* size = sizeof (qla_drvr_state_sds_t) * num_sds_rings */
152 
153 	uint32_t	num_tx_rings; /* number of tx rings */
154 	uint32_t	txr_size; /* size of each tx ring in bytes */
155 	uint32_t	txr_entries; /* number of descriptors in each tx ring */
156 	uint32_t	txr_offset; /* start of tx ring [0 - #rings] content */
157 
158 	uint32_t	num_rx_rings; /* number of rx rings */
159 	uint32_t	rxr_size; /* size of each rx ring in bytes */
160 	uint32_t	rxr_entries; /* number of descriptors in each rx ring */
161 	uint32_t	rxr_offset; /* start of rx ring [0 - #rings] content */
162 
163 	uint32_t	num_sds_rings; /* number of sds rings */
164 	uint32_t	sds_ring_size; /* size of each sds ring in bytes */
165 	uint32_t	sds_entries; /* number of descriptors in each sds ring */
166 	uint32_t	sds_offset; /* start of sds ring [0 - #rings] content */
167 };
168 
169 typedef struct qla_drvr_state_hdr qla_drvr_state_hdr_t;
170 
171 struct qla_driver_state {
172 	uint32_t	size;
173 	void		*buffer;
174 };
175 typedef struct qla_driver_state qla_driver_state_t;
176 
177 struct qla_sp_log {
178 	uint32_t	next_idx; /* index of next entry in slowpath trace log */
179 	uint32_t	num_entries; /* number of entries in slowpath trace log */
180 	void		*buffer;
181 };
182 typedef struct qla_sp_log qla_sp_log_t;
183 
184 /*
185  * Read/Write Register
186  */
187 #define QLA_RDWR_REG		_IOWR('q', 1, qla_reg_val_t)
188 
189 /*
190  * Read Flash
191  */
192 #define QLA_RD_FLASH		_IOWR('q', 2, qla_rd_flash_t)
193 
194 /*
195  * Write Flash
196  */
197 #define QLA_WR_FLASH		_IOWR('q', 3, qla_wr_flash_t)
198 
199 /*
200  * Read Offchip (MS) Memory
201  */
202 #define QLA_RDWR_MS_MEM		_IOWR('q', 4, qla_offchip_mem_val_t)
203 
204 /*
205  * Erase Flash
206  */
207 #define QLA_ERASE_FLASH		_IOWR('q', 5, qla_erase_flash_t)
208 
209 /*
210  * Read PCI IDs
211  */
212 #define QLA_RD_PCI_IDS		_IOWR('q', 6, qla_rd_pci_ids_t)
213 
214 /*
215  * Read Minidump Template Size
216  */
217 #define QLA_RD_FW_DUMP_SIZE	_IOWR('q', 7, qla_rd_fw_dump_t)
218 
219 /*
220  * Read Minidump Template
221  */
222 #define QLA_RD_FW_DUMP		_IOWR('q', 8, qla_rd_fw_dump_t)
223 
224 /*
225  * Read Driver State
226  */
227 #define QLA_RD_DRVR_STATE	_IOWR('q', 9, qla_driver_state_t)
228 
229 /*
230  * Read Slowpath Log
231  */
232 #define QLA_RD_SLOWPATH_LOG	_IOWR('q', 10, qla_sp_log_t)
233 
234 /*
235  * Format Strings For Slowpath Trace Logs
236  */
237 #define SP_TLOG_FMT_STR_0	\
238 	"qla_mbx_cmd [%ld]: enter no_pause = %d [0x%08x 0x%08x 0x%08x 0x%08x]\n"
239 
240 #define SP_TLOG_FMT_STR_1	\
241 	"qla_mbx_cmd [%ld]: offline = 0x%08x qla_initiate_recovery = 0x%08x exit1\n"
242 
243 #define SP_TLOG_FMT_STR_2	\
244 	"qla_mbx_cmd [%ld]: qla_initiate_recovery = 0x%08x exit2\n"
245 
246 #define SP_TLOG_FMT_STR_3	\
247 	"qla_mbx_cmd [%ld]: timeout exit3 [host_mbx_cntrl = 0x%08x]\n"
248 
249 #define SP_TLOG_FMT_STR_4	\
250 	"qla_mbx_cmd [%ld]: qla_initiate_recovery = 0x%08x exit4\n"
251 
252 #define SP_TLOG_FMT_STR_5	\
253 	"qla_mbx_cmd [%ld]: timeout exit5 [fw_mbx_cntrl = 0x%08x]\n"
254 
255 #define SP_TLOG_FMT_STR_6	\
256 	"qla_mbx_cmd [%ld]: qla_initiate_recovery = 0x%08x exit6\n"
257 
258 #define SP_TLOG_FMT_STR_7	\
259 	"qla_mbx_cmd [%ld]: exit [0x%08x 0x%08x 0x%08x 0x%08x 0x%08x]\n"
260 
261 #define SP_TLOG_FMT_STR_8	\
262 	"qla_ioctl [%ld]: SIOCSIFADDR if_drv_flags = 0x%08x [0x%08x] ipv4 = 0x%08x\n"
263 
264 #define SP_TLOG_FMT_STR_9	\
265 	"qla_ioctl [%ld]: SIOCSIFMTU if_drv_flags = 0x%08x [0x%08x] max_frame_size = 0x%08x if_mtu = 0x%08x\n"
266 
267 #define SP_TLOG_FMT_STR_10	\
268 
269 
270 #define SP_TLOG_FMT_STR_11	\
271 
272 
273 #define SP_TLOG_FMT_STR_12	\
274 	"qla_set_multi [%ld]: if_drv_flags = 0x%08x [0x%08x] add_multi = 0x%08x mcnt = 0x%08x\n"
275 
276 #define SP_TLOG_FMT_STR_13	\
277 	"qla_stop [%ld]: \n"
278 
279 #define SP_TLOG_FMT_STR_14	\
280 	"qla_init_locked [%ld]: \n"
281 
282 #endif /* #ifndef _QL_IOCTL_H_ */
283