xref: /freebsd/sys/dev/qlxgbe/ql_inline.h (revision 9f23cbd6cae82fd77edfad7173432fa8dccd0a95)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2013-2016 Qlogic Corporation
5  * All rights reserved.
6  *
7  *  Redistribution and use in source and binary forms, with or without
8  *  modification, are permitted provided that the following conditions
9  *  are met:
10  *
11  *  1. Redistributions of source code must retain the above copyright
12  *     notice, this list of conditions and the following disclaimer.
13  *  2. Redistributions in binary form must reproduce the above copyright
14  *     notice, this list of conditions and the following disclaimer in the
15  *     documentation and/or other materials provided with the distribution.
16  *
17  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  *  POSSIBILITY OF SUCH DAMAGE.
28  *
29  * $FreeBSD$
30  */
31 /*
32  * File: ql_inline.h
33  * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
34  */
35 #ifndef _QL_INLINE_H_
36 #define _QL_INLINE_H_
37 
38 #define QL8_SEMLOCK_TIMEOUT	1000/* QLA8020 Semaphore Lock Timeout 10ms */
39 
40 /*
41  * Inline functions for hardware semaphores
42  */
43 
44 /*
45  * Name:	qla_sem_lock
46  * Function:	Locks one of the semaphore registers (semaphore 2,3,5 & 7)
47  *		If the id_reg is valid, then id_val is written into it.
48  *		This is for debugging purpose
49  * Returns:	0 on success; otherwise its failed.
50  */
51 static __inline int
52 qla_sem_lock(qla_host_t *ha, uint32_t sem_reg, uint32_t id_reg, uint32_t id_val)
53 {
54 	int count = QL8_SEMLOCK_TIMEOUT;
55 
56 	while (count) {
57 		if ((READ_REG32(ha, sem_reg) & BIT_0))
58 			break;
59 		count--;
60 
61 		if (!count)
62 			return(-1);
63 		qla_mdelay(__func__, 10);
64 	}
65 	if (id_reg)
66 		WRITE_REG32(ha, id_reg, id_val);
67 
68 	return(0);
69 }
70 
71 /*
72  * Name:	qla_sem_unlock
73  * Function:	Unlocks the semaphore registers (semaphore 2,3,5 & 7)
74  *		previously locked by qla_sem_lock()
75  */
76 static __inline void
77 qla_sem_unlock(qla_host_t *ha, uint32_t sem_reg)
78 {
79 	READ_REG32(ha, sem_reg);
80 }
81 
82 static __inline int
83 qla_get_ifq_snd_maxlen(qla_host_t *ha)
84 {
85 	return(((NUM_TX_DESCRIPTORS * 4) - 1));
86 }
87 
88 static __inline uint32_t
89 qla_get_optics(qla_host_t *ha)
90 {
91 	uint32_t link_speed;
92 
93 	link_speed = READ_REG32(ha, Q8_LINK_SPEED_0);
94 	if (ha->pci_func == 0)
95 		link_speed = link_speed & 0xFF;
96 	else
97 		link_speed = (link_speed >> 8) & 0xFF;
98 
99 	switch (link_speed) {
100 	case 0x1:
101 		link_speed = IFM_100_FX;
102 		break;
103 
104 	case 0x10:
105 		link_speed = IFM_1000_SX;
106 		break;
107 
108 	default:
109 		if ((ha->hw.module_type == 0x4) ||
110 			(ha->hw.module_type == 0x5) ||
111 			(ha->hw.module_type == 0x6))
112 			link_speed = (IFM_10G_TWINAX);
113 		else
114 			link_speed = (IFM_10G_LR | IFM_10G_SR);
115 		break;
116 	}
117 
118 	return(link_speed);
119 }
120 
121 static __inline uint8_t *
122 qla_get_mac_addr(qla_host_t *ha)
123 {
124 	return (ha->hw.mac_addr);
125 }
126 
127 static __inline void
128 qla_set_hw_rcv_desc(qla_host_t *ha, uint32_t r_idx, uint32_t index,
129 	uint32_t handle, bus_addr_t paddr, uint32_t buf_size)
130 {
131 	volatile q80_recv_desc_t *rcv_desc;
132 
133 	rcv_desc = (q80_recv_desc_t *)ha->hw.dma_buf.rds_ring[r_idx].dma_b;
134 
135 	rcv_desc += index;
136 
137 	rcv_desc->handle = (uint16_t)handle;
138 	rcv_desc->buf_size = buf_size;
139 	rcv_desc->buf_addr = paddr;
140 
141 	return;
142 }
143 
144 static __inline void
145 qla_init_hw_rcv_descriptors(qla_host_t *ha)
146 {
147 	int i;
148 
149 	for (i = 0; i < ha->hw.num_rds_rings; i++)
150 		bzero((void *)ha->hw.dma_buf.rds_ring[i].dma_b,
151 			(sizeof(q80_recv_desc_t) * NUM_RX_DESCRIPTORS));
152 }
153 
154 #define QLA_LOCK_DEFAULT_MS_TIMEOUT	3000
155 
156 #ifndef QLA_LOCK_NO_SLEEP
157 #define QLA_LOCK_NO_SLEEP		0
158 #endif
159 
160 static __inline int
161 qla_lock(qla_host_t *ha, const char *str, uint32_t timeout_ms,
162 	uint32_t no_sleep)
163 {
164 	int ret = -1;
165 
166 	while (1) {
167 		mtx_lock(&ha->hw_lock);
168 
169 		if (ha->qla_detach_active || ha->offline) {
170 			mtx_unlock(&ha->hw_lock);
171 			break;
172 		}
173 
174 		if (!ha->hw_lock_held) {
175 			ha->hw_lock_held = 1;
176 			ha->qla_lock = str;
177 			ret = 0;
178 			mtx_unlock(&ha->hw_lock);
179 			break;
180 		}
181 		mtx_unlock(&ha->hw_lock);
182 
183 		if (--timeout_ms == 0) {
184 			ha->hw_lock_failed++;
185 			break;
186 		} else {
187 			if (no_sleep)
188 				DELAY(1000);
189 			else
190 				qla_mdelay(__func__, 1);
191 		}
192 	}
193 
194 //	if (!ha->enable_error_recovery)
195 //		device_printf(ha->pci_dev, "%s: %s ret = %d\n", __func__,
196 //			str,ret);
197 
198 	return (ret);
199 }
200 
201 static __inline void
202 qla_unlock(qla_host_t *ha, const char *str)
203 {
204 	mtx_lock(&ha->hw_lock);
205 	ha->hw_lock_held = 0;
206 	ha->qla_unlock = str;
207 	mtx_unlock(&ha->hw_lock);
208 
209 //	if (!ha->enable_error_recovery)
210 //		device_printf(ha->pci_dev, "%s: %s\n", __func__, str);
211 
212 	return;
213 }
214 
215 #endif /* #ifndef _QL_INLINE_H_ */
216