1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011-2013 Qlogic Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * File: qla_os.c 32 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 #include "qla_os.h" 39 #include "qla_reg.h" 40 #include "qla_hw.h" 41 #include "qla_def.h" 42 #include "qla_inline.h" 43 #include "qla_ver.h" 44 #include "qla_glbl.h" 45 #include "qla_dbg.h" 46 47 /* 48 * Some PCI Configuration Space Related Defines 49 */ 50 51 #ifndef PCI_VENDOR_QLOGIC 52 #define PCI_VENDOR_QLOGIC 0x1077 53 #endif 54 55 #ifndef PCI_PRODUCT_QLOGIC_ISP8020 56 #define PCI_PRODUCT_QLOGIC_ISP8020 0x8020 57 #endif 58 59 #define PCI_QLOGIC_ISP8020 \ 60 ((PCI_PRODUCT_QLOGIC_ISP8020 << 16) | PCI_VENDOR_QLOGIC) 61 62 /* 63 * static functions 64 */ 65 static int qla_alloc_parent_dma_tag(qla_host_t *ha); 66 static void qla_free_parent_dma_tag(qla_host_t *ha); 67 static int qla_alloc_xmt_bufs(qla_host_t *ha); 68 static void qla_free_xmt_bufs(qla_host_t *ha); 69 static int qla_alloc_rcv_bufs(qla_host_t *ha); 70 static void qla_free_rcv_bufs(qla_host_t *ha); 71 72 static void qla_init_ifnet(device_t dev, qla_host_t *ha); 73 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 74 static void qla_release(qla_host_t *ha); 75 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 76 int error); 77 static void qla_stop(qla_host_t *ha); 78 static int qla_send(qla_host_t *ha, struct mbuf **m_headp); 79 static void qla_tx_done(void *context, int pending); 80 81 /* 82 * Hooks to the Operating Systems 83 */ 84 static int qla_pci_probe (device_t); 85 static int qla_pci_attach (device_t); 86 static int qla_pci_detach (device_t); 87 88 static void qla_init(void *arg); 89 static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 90 static int qla_media_change(struct ifnet *ifp); 91 static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 92 93 static device_method_t qla_pci_methods[] = { 94 /* Device interface */ 95 DEVMETHOD(device_probe, qla_pci_probe), 96 DEVMETHOD(device_attach, qla_pci_attach), 97 DEVMETHOD(device_detach, qla_pci_detach), 98 { 0, 0 } 99 }; 100 101 static driver_t qla_pci_driver = { 102 "ql", qla_pci_methods, sizeof (qla_host_t), 103 }; 104 105 static devclass_t qla80xx_devclass; 106 107 DRIVER_MODULE(qla80xx, pci, qla_pci_driver, qla80xx_devclass, 0, 0); 108 109 MODULE_DEPEND(qla80xx, pci, 1, 1, 1); 110 MODULE_DEPEND(qla80xx, ether, 1, 1, 1); 111 112 MALLOC_DEFINE(M_QLA8XXXBUF, "qla80xxbuf", "Buffers for qla80xx driver"); 113 114 uint32_t std_replenish = 8; 115 uint32_t jumbo_replenish = 2; 116 uint32_t rcv_pkt_thres = 128; 117 uint32_t rcv_pkt_thres_d = 32; 118 uint32_t snd_pkt_thres = 16; 119 uint32_t free_pkt_thres = (NUM_TX_DESCRIPTORS / 2); 120 121 static char dev_str[64]; 122 123 /* 124 * Name: qla_pci_probe 125 * Function: Validate the PCI device to be a QLA80XX device 126 */ 127 static int 128 qla_pci_probe(device_t dev) 129 { 130 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 131 case PCI_QLOGIC_ISP8020: 132 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 133 "Qlogic ISP 80xx PCI CNA Adapter-Ethernet Function", 134 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 135 QLA_VERSION_BUILD); 136 device_set_desc(dev, dev_str); 137 break; 138 default: 139 return (ENXIO); 140 } 141 142 if (bootverbose) 143 printf("%s: %s\n ", __func__, dev_str); 144 145 return (BUS_PROBE_DEFAULT); 146 } 147 148 static void 149 qla_add_sysctls(qla_host_t *ha) 150 { 151 device_t dev = ha->pci_dev; 152 153 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 154 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 155 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 156 (void *)ha, 0, qla_sysctl_get_stats, "I", "Statistics"); 157 158 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 159 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 160 OID_AUTO, "fw_version", CTLFLAG_RD, 161 ha->fw_ver_str, 0, "firmware version"); 162 163 dbg_level = 0; 164 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 165 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 166 OID_AUTO, "debug", CTLFLAG_RW, 167 &dbg_level, dbg_level, "Debug Level"); 168 169 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 170 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 171 OID_AUTO, "std_replenish", CTLFLAG_RW, 172 &std_replenish, std_replenish, 173 "Threshold for Replenishing Standard Frames"); 174 175 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 176 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 177 OID_AUTO, "jumbo_replenish", CTLFLAG_RW, 178 &jumbo_replenish, jumbo_replenish, 179 "Threshold for Replenishing Jumbo Frames"); 180 181 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 182 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 183 OID_AUTO, "rcv_pkt_thres", CTLFLAG_RW, 184 &rcv_pkt_thres, rcv_pkt_thres, 185 "Threshold for # of rcv pkts to trigger indication isr"); 186 187 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 188 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 189 OID_AUTO, "rcv_pkt_thres_d", CTLFLAG_RW, 190 &rcv_pkt_thres_d, rcv_pkt_thres_d, 191 "Threshold for # of rcv pkts to trigger indication defered"); 192 193 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 194 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 195 OID_AUTO, "snd_pkt_thres", CTLFLAG_RW, 196 &snd_pkt_thres, snd_pkt_thres, 197 "Threshold for # of snd packets"); 198 199 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 200 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 201 OID_AUTO, "free_pkt_thres", CTLFLAG_RW, 202 &free_pkt_thres, free_pkt_thres, 203 "Threshold for # of packets to free at a time"); 204 205 return; 206 } 207 208 static void 209 qla_watchdog(void *arg) 210 { 211 qla_host_t *ha = arg; 212 qla_hw_t *hw; 213 struct ifnet *ifp; 214 215 hw = &ha->hw; 216 ifp = ha->ifp; 217 218 if (ha->flags.qla_watchdog_exit) 219 return; 220 221 if (!ha->flags.qla_watchdog_pause) { 222 if (qla_le32_to_host(*(hw->tx_cons)) != hw->txr_comp) { 223 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 224 } else if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 225 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 226 } 227 } 228 ha->watchdog_ticks = (ha->watchdog_ticks + 1) % 1000; 229 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 230 qla_watchdog, ha); 231 } 232 233 /* 234 * Name: qla_pci_attach 235 * Function: attaches the device to the operating system 236 */ 237 static int 238 qla_pci_attach(device_t dev) 239 { 240 qla_host_t *ha = NULL; 241 uint32_t rsrc_len, i; 242 243 QL_DPRINT2((dev, "%s: enter\n", __func__)); 244 245 if ((ha = device_get_softc(dev)) == NULL) { 246 device_printf(dev, "cannot get softc\n"); 247 return (ENOMEM); 248 } 249 250 memset(ha, 0, sizeof (qla_host_t)); 251 252 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8020) { 253 device_printf(dev, "device is not ISP8020\n"); 254 return (ENXIO); 255 } 256 257 ha->pci_func = pci_get_function(dev); 258 259 ha->pci_dev = dev; 260 261 pci_enable_busmaster(dev); 262 263 ha->reg_rid = PCIR_BAR(0); 264 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 265 RF_ACTIVE); 266 267 if (ha->pci_reg == NULL) { 268 device_printf(dev, "unable to map any ports\n"); 269 goto qla_pci_attach_err; 270 } 271 272 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 273 ha->reg_rid); 274 275 mtx_init(&ha->hw_lock, "qla80xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 276 mtx_init(&ha->tx_lock, "qla80xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 277 mtx_init(&ha->rx_lock, "qla80xx_rx_lock", MTX_NETWORK_LOCK, MTX_DEF); 278 mtx_init(&ha->rxj_lock, "qla80xx_rxj_lock", MTX_NETWORK_LOCK, MTX_DEF); 279 ha->flags.lock_init = 1; 280 281 ha->msix_count = pci_msix_count(dev); 282 283 if (ha->msix_count < qla_get_msix_count(ha)) { 284 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 285 ha->msix_count); 286 goto qla_pci_attach_err; 287 } 288 289 QL_DPRINT2((dev, "%s: ha %p irq %p pci_func 0x%x rsrc_count 0x%08x" 290 " msix_count 0x%x pci_reg %p\n", __func__, ha, 291 ha->irq, ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg)); 292 293 ha->msix_count = qla_get_msix_count(ha); 294 295 if (pci_alloc_msix(dev, &ha->msix_count)) { 296 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 297 ha->msix_count); 298 ha->msix_count = 0; 299 goto qla_pci_attach_err; 300 } 301 302 TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha); 303 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 304 taskqueue_thread_enqueue, &ha->tx_tq); 305 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 306 device_get_nameunit(ha->pci_dev)); 307 308 for (i = 0; i < ha->msix_count; i++) { 309 ha->irq_vec[i].irq_rid = i+1; 310 ha->irq_vec[i].ha = ha; 311 312 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 313 &ha->irq_vec[i].irq_rid, 314 (RF_ACTIVE | RF_SHAREABLE)); 315 316 if (ha->irq_vec[i].irq == NULL) { 317 device_printf(dev, "could not allocate interrupt\n"); 318 goto qla_pci_attach_err; 319 } 320 321 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 322 (INTR_TYPE_NET | INTR_MPSAFE), 323 NULL, qla_isr, &ha->irq_vec[i], 324 &ha->irq_vec[i].handle)) { 325 device_printf(dev, "could not setup interrupt\n"); 326 goto qla_pci_attach_err; 327 } 328 329 TASK_INIT(&ha->irq_vec[i].rcv_task, 0, qla_rcv,\ 330 &ha->irq_vec[i]); 331 332 ha->irq_vec[i].rcv_tq = taskqueue_create_fast("qla_rcvq", 333 M_NOWAIT, taskqueue_thread_enqueue, 334 &ha->irq_vec[i].rcv_tq); 335 336 taskqueue_start_threads(&ha->irq_vec[i].rcv_tq, 1, PI_NET, 337 "%s rcvq", 338 device_get_nameunit(ha->pci_dev)); 339 } 340 341 qla_add_sysctls(ha); 342 343 /* add hardware specific sysctls */ 344 qla_hw_add_sysctls(ha); 345 346 /* initialize hardware */ 347 if (qla_init_hw(ha)) { 348 device_printf(dev, "%s: qla_init_hw failed\n", __func__); 349 goto qla_pci_attach_err; 350 } 351 352 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 353 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 354 ha->fw_ver_build); 355 356 snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d", 357 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 358 ha->fw_ver_build); 359 360 //qla_get_hw_caps(ha); 361 qla_read_mac_addr(ha); 362 363 /* allocate parent dma tag */ 364 if (qla_alloc_parent_dma_tag(ha)) { 365 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 366 __func__); 367 goto qla_pci_attach_err; 368 } 369 370 /* alloc all dma buffers */ 371 if (qla_alloc_dma(ha)) { 372 device_printf(dev, "%s: qla_alloc_dma failed\n", __func__); 373 goto qla_pci_attach_err; 374 } 375 376 /* create the o.s ethernet interface */ 377 qla_init_ifnet(dev, ha); 378 379 ha->flags.qla_watchdog_active = 1; 380 ha->flags.qla_watchdog_pause = 1; 381 382 callout_init(&ha->tx_callout, 1); 383 384 /* create ioctl device interface */ 385 if (qla_make_cdev(ha)) { 386 device_printf(dev, "%s: qla_make_cdev failed\n", __func__); 387 goto qla_pci_attach_err; 388 } 389 390 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 391 qla_watchdog, ha); 392 393 QL_DPRINT2((dev, "%s: exit 0\n", __func__)); 394 return (0); 395 396 qla_pci_attach_err: 397 398 qla_release(ha); 399 400 QL_DPRINT2((dev, "%s: exit ENXIO\n", __func__)); 401 return (ENXIO); 402 } 403 404 /* 405 * Name: qla_pci_detach 406 * Function: Unhooks the device from the operating system 407 */ 408 static int 409 qla_pci_detach(device_t dev) 410 { 411 qla_host_t *ha = NULL; 412 struct ifnet *ifp; 413 int i; 414 415 QL_DPRINT2((dev, "%s: enter\n", __func__)); 416 417 if ((ha = device_get_softc(dev)) == NULL) { 418 device_printf(dev, "cannot get softc\n"); 419 return (ENOMEM); 420 } 421 422 ifp = ha->ifp; 423 424 QLA_LOCK(ha, __func__); 425 qla_stop(ha); 426 QLA_UNLOCK(ha, __func__); 427 428 if (ha->tx_tq) { 429 taskqueue_drain(ha->tx_tq, &ha->tx_task); 430 taskqueue_free(ha->tx_tq); 431 } 432 433 for (i = 0; i < ha->msix_count; i++) { 434 taskqueue_drain(ha->irq_vec[i].rcv_tq, 435 &ha->irq_vec[i].rcv_task); 436 taskqueue_free(ha->irq_vec[i].rcv_tq); 437 } 438 439 qla_release(ha); 440 441 QL_DPRINT2((dev, "%s: exit\n", __func__)); 442 443 return (0); 444 } 445 446 /* 447 * SYSCTL Related Callbacks 448 */ 449 static int 450 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 451 { 452 int err, ret = 0; 453 qla_host_t *ha; 454 455 err = sysctl_handle_int(oidp, &ret, 0, req); 456 457 if (err) 458 return (err); 459 460 ha = (qla_host_t *)arg1; 461 //qla_get_stats(ha); 462 QL_DPRINT2((ha->pci_dev, "%s: called ret %d\n", __func__, ret)); 463 return (err); 464 } 465 466 467 /* 468 * Name: qla_release 469 * Function: Releases the resources allocated for the device 470 */ 471 static void 472 qla_release(qla_host_t *ha) 473 { 474 device_t dev; 475 int i; 476 477 dev = ha->pci_dev; 478 479 qla_del_cdev(ha); 480 481 if (ha->flags.qla_watchdog_active) 482 ha->flags.qla_watchdog_exit = 1; 483 484 callout_stop(&ha->tx_callout); 485 qla_mdelay(__func__, 100); 486 487 if (ha->ifp != NULL) 488 ether_ifdetach(ha->ifp); 489 490 qla_free_dma(ha); 491 qla_free_parent_dma_tag(ha); 492 493 for (i = 0; i < ha->msix_count; i++) { 494 if (ha->irq_vec[i].handle) 495 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 496 ha->irq_vec[i].handle); 497 if (ha->irq_vec[i].irq) 498 (void) bus_release_resource(dev, SYS_RES_IRQ, 499 ha->irq_vec[i].irq_rid, 500 ha->irq_vec[i].irq); 501 } 502 if (ha->msix_count) 503 pci_release_msi(dev); 504 505 if (ha->flags.lock_init) { 506 mtx_destroy(&ha->tx_lock); 507 mtx_destroy(&ha->rx_lock); 508 mtx_destroy(&ha->rxj_lock); 509 mtx_destroy(&ha->hw_lock); 510 } 511 512 if (ha->pci_reg) 513 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 514 ha->pci_reg); 515 } 516 517 /* 518 * DMA Related Functions 519 */ 520 521 static void 522 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 523 { 524 *((bus_addr_t *)arg) = 0; 525 526 if (error) { 527 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 528 return; 529 } 530 531 QL_ASSERT((nsegs == 1), ("%s: %d segments returned!", __func__, nsegs)); 532 533 *((bus_addr_t *)arg) = segs[0].ds_addr; 534 535 return; 536 } 537 538 int 539 qla_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 540 { 541 int ret = 0; 542 device_t dev; 543 bus_addr_t b_addr; 544 545 dev = ha->pci_dev; 546 547 QL_DPRINT2((dev, "%s: enter\n", __func__)); 548 549 ret = bus_dma_tag_create( 550 ha->parent_tag,/* parent */ 551 dma_buf->alignment, 552 ((bus_size_t)(1ULL << 32)),/* boundary */ 553 BUS_SPACE_MAXADDR, /* lowaddr */ 554 BUS_SPACE_MAXADDR, /* highaddr */ 555 NULL, NULL, /* filter, filterarg */ 556 dma_buf->size, /* maxsize */ 557 1, /* nsegments */ 558 dma_buf->size, /* maxsegsize */ 559 0, /* flags */ 560 NULL, NULL, /* lockfunc, lockarg */ 561 &dma_buf->dma_tag); 562 563 if (ret) { 564 device_printf(dev, "%s: could not create dma tag\n", __func__); 565 goto qla_alloc_dmabuf_exit; 566 } 567 ret = bus_dmamem_alloc(dma_buf->dma_tag, 568 (void **)&dma_buf->dma_b, 569 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 570 &dma_buf->dma_map); 571 if (ret) { 572 bus_dma_tag_destroy(dma_buf->dma_tag); 573 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 574 goto qla_alloc_dmabuf_exit; 575 } 576 577 ret = bus_dmamap_load(dma_buf->dma_tag, 578 dma_buf->dma_map, 579 dma_buf->dma_b, 580 dma_buf->size, 581 qla_dmamap_callback, 582 &b_addr, BUS_DMA_NOWAIT); 583 584 if (ret || !b_addr) { 585 bus_dma_tag_destroy(dma_buf->dma_tag); 586 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 587 dma_buf->dma_map); 588 ret = -1; 589 goto qla_alloc_dmabuf_exit; 590 } 591 592 dma_buf->dma_addr = b_addr; 593 594 qla_alloc_dmabuf_exit: 595 QL_DPRINT2((dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 596 __func__, ret, (void *)dma_buf->dma_tag, 597 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 598 dma_buf->size)); 599 600 return ret; 601 } 602 603 void 604 qla_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 605 { 606 bus_dmamap_unload(dma_buf->dma_tag, dma_buf->dma_map); 607 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 608 bus_dma_tag_destroy(dma_buf->dma_tag); 609 } 610 611 static int 612 qla_alloc_parent_dma_tag(qla_host_t *ha) 613 { 614 int ret; 615 device_t dev; 616 617 dev = ha->pci_dev; 618 619 /* 620 * Allocate parent DMA Tag 621 */ 622 ret = bus_dma_tag_create( 623 bus_get_dma_tag(dev), /* parent */ 624 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 625 BUS_SPACE_MAXADDR, /* lowaddr */ 626 BUS_SPACE_MAXADDR, /* highaddr */ 627 NULL, NULL, /* filter, filterarg */ 628 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 629 0, /* nsegments */ 630 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 631 0, /* flags */ 632 NULL, NULL, /* lockfunc, lockarg */ 633 &ha->parent_tag); 634 635 if (ret) { 636 device_printf(dev, "%s: could not create parent dma tag\n", 637 __func__); 638 return (-1); 639 } 640 641 ha->flags.parent_tag = 1; 642 643 return (0); 644 } 645 646 static void 647 qla_free_parent_dma_tag(qla_host_t *ha) 648 { 649 if (ha->flags.parent_tag) { 650 bus_dma_tag_destroy(ha->parent_tag); 651 ha->flags.parent_tag = 0; 652 } 653 } 654 655 /* 656 * Name: qla_init_ifnet 657 * Function: Creates the Network Device Interface and Registers it with the O.S 658 */ 659 660 static void 661 qla_init_ifnet(device_t dev, qla_host_t *ha) 662 { 663 struct ifnet *ifp; 664 665 QL_DPRINT2((dev, "%s: enter\n", __func__)); 666 667 ifp = ha->ifp = if_alloc(IFT_ETHER); 668 669 if (ifp == NULL) 670 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 671 672 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 673 674 ifp->if_baudrate = IF_Gbps(10); 675 ifp->if_init = qla_init; 676 ifp->if_softc = ha; 677 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 678 ifp->if_ioctl = qla_ioctl; 679 ifp->if_start = qla_start; 680 681 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha)); 682 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha); 683 IFQ_SET_READY(&ifp->if_snd); 684 685 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 686 687 ether_ifattach(ifp, qla_get_mac_addr(ha)); 688 689 ifp->if_capabilities = IFCAP_HWCSUM | 690 IFCAP_TSO4 | 691 IFCAP_JUMBO_MTU; 692 693 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 694 ifp->if_capabilities |= IFCAP_LINKSTATE; 695 696 #if defined(__FreeBSD_version) && (__FreeBSD_version < 900002) 697 ifp->if_timer = 0; 698 ifp->if_watchdog = NULL; 699 #endif /* #if defined(__FreeBSD_version) && (__FreeBSD_version < 900002) */ 700 701 ifp->if_capenable = ifp->if_capabilities; 702 703 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 704 705 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 706 707 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 708 NULL); 709 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 710 711 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 712 713 QL_DPRINT2((dev, "%s: exit\n", __func__)); 714 715 return; 716 } 717 718 static void 719 qla_init_locked(qla_host_t *ha) 720 { 721 struct ifnet *ifp = ha->ifp; 722 723 qla_stop(ha); 724 725 if (qla_alloc_xmt_bufs(ha) != 0) 726 return; 727 728 if (qla_alloc_rcv_bufs(ha) != 0) 729 return; 730 731 if (qla_config_lro(ha)) 732 return; 733 734 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 735 736 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO; 737 738 ha->flags.stop_rcv = 0; 739 if (qla_init_hw_if(ha) == 0) { 740 ifp = ha->ifp; 741 ifp->if_drv_flags |= IFF_DRV_RUNNING; 742 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 743 ha->flags.qla_watchdog_pause = 0; 744 } 745 746 return; 747 } 748 749 static void 750 qla_init(void *arg) 751 { 752 qla_host_t *ha; 753 754 ha = (qla_host_t *)arg; 755 756 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 757 758 QLA_LOCK(ha, __func__); 759 qla_init_locked(ha); 760 QLA_UNLOCK(ha, __func__); 761 762 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 763 } 764 765 static u_int 766 qla_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int mcnt) 767 { 768 uint8_t *mta = arg; 769 770 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 771 return (0); 772 bcopy(LLADDR(sdl), &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 773 774 return (1); 775 } 776 777 static void 778 qla_set_multi(qla_host_t *ha, uint32_t add_multi) 779 { 780 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 781 struct ifnet *ifp = ha->ifp; 782 int mcnt; 783 784 mcnt = if_foreach_llmaddr(ifp, qla_copy_maddr, mta); 785 qla_hw_set_multi(ha, mta, mcnt, add_multi); 786 787 return; 788 } 789 790 static int 791 qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 792 { 793 int ret = 0; 794 struct ifreq *ifr = (struct ifreq *)data; 795 struct ifaddr *ifa = (struct ifaddr *)data; 796 qla_host_t *ha; 797 798 ha = (qla_host_t *)ifp->if_softc; 799 800 switch (cmd) { 801 case SIOCSIFADDR: 802 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 803 __func__, cmd)); 804 805 if (ifa->ifa_addr->sa_family == AF_INET) { 806 ifp->if_flags |= IFF_UP; 807 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 808 QLA_LOCK(ha, __func__); 809 qla_init_locked(ha); 810 QLA_UNLOCK(ha, __func__); 811 } 812 QL_DPRINT4((ha->pci_dev, 813 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 814 __func__, cmd, ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 815 816 arp_ifinit(ifp, ifa); 817 if (ntohl(IA_SIN(ifa)->sin_addr.s_addr) != INADDR_ANY) { 818 qla_config_ipv4_addr(ha, 819 (IA_SIN(ifa)->sin_addr.s_addr)); 820 } 821 } else { 822 ether_ioctl(ifp, cmd, data); 823 } 824 break; 825 826 case SIOCSIFMTU: 827 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 828 __func__, cmd)); 829 830 if (ifr->ifr_mtu > QLA_MAX_FRAME_SIZE - ETHER_HDR_LEN) { 831 ret = EINVAL; 832 } else { 833 QLA_LOCK(ha, __func__); 834 ifp->if_mtu = ifr->ifr_mtu; 835 ha->max_frame_size = 836 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 837 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 838 ret = qla_set_max_mtu(ha, ha->max_frame_size, 839 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 840 } 841 QLA_UNLOCK(ha, __func__); 842 843 if (ret) 844 ret = EINVAL; 845 } 846 847 break; 848 849 case SIOCSIFFLAGS: 850 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 851 __func__, cmd)); 852 853 if (ifp->if_flags & IFF_UP) { 854 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 855 if ((ifp->if_flags ^ ha->if_flags) & 856 IFF_PROMISC) { 857 qla_set_promisc(ha); 858 } else if ((ifp->if_flags ^ ha->if_flags) & 859 IFF_ALLMULTI) { 860 qla_set_allmulti(ha); 861 } 862 } else { 863 QLA_LOCK(ha, __func__); 864 qla_init_locked(ha); 865 ha->max_frame_size = ifp->if_mtu + 866 ETHER_HDR_LEN + ETHER_CRC_LEN; 867 ret = qla_set_max_mtu(ha, ha->max_frame_size, 868 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 869 QLA_UNLOCK(ha, __func__); 870 } 871 } else { 872 QLA_LOCK(ha, __func__); 873 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 874 qla_stop(ha); 875 ha->if_flags = ifp->if_flags; 876 QLA_UNLOCK(ha, __func__); 877 } 878 break; 879 880 case SIOCADDMULTI: 881 QL_DPRINT4((ha->pci_dev, 882 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 883 884 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 885 qla_set_multi(ha, 1); 886 } 887 break; 888 889 case SIOCDELMULTI: 890 QL_DPRINT4((ha->pci_dev, 891 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 892 893 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 894 qla_set_multi(ha, 0); 895 } 896 break; 897 898 case SIOCSIFMEDIA: 899 case SIOCGIFMEDIA: 900 QL_DPRINT4((ha->pci_dev, 901 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 902 __func__, cmd)); 903 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 904 break; 905 906 case SIOCSIFCAP: 907 { 908 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 909 910 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 911 __func__, cmd)); 912 913 if (mask & IFCAP_HWCSUM) 914 ifp->if_capenable ^= IFCAP_HWCSUM; 915 if (mask & IFCAP_TSO4) 916 ifp->if_capenable ^= IFCAP_TSO4; 917 if (mask & IFCAP_TSO6) 918 ifp->if_capenable ^= IFCAP_TSO6; 919 if (mask & IFCAP_VLAN_HWTAGGING) 920 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 921 922 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 923 qla_init(ha); 924 925 VLAN_CAPABILITIES(ifp); 926 break; 927 } 928 929 default: 930 QL_DPRINT4((ha->pci_dev, "%s: default (0x%lx)\n", 931 __func__, cmd)); 932 ret = ether_ioctl(ifp, cmd, data); 933 break; 934 } 935 936 return (ret); 937 } 938 939 static int 940 qla_media_change(struct ifnet *ifp) 941 { 942 qla_host_t *ha; 943 struct ifmedia *ifm; 944 int ret = 0; 945 946 ha = (qla_host_t *)ifp->if_softc; 947 948 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 949 950 ifm = &ha->media; 951 952 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 953 ret = EINVAL; 954 955 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 956 957 return (ret); 958 } 959 960 static void 961 qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 962 { 963 qla_host_t *ha; 964 965 ha = (qla_host_t *)ifp->if_softc; 966 967 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 968 969 ifmr->ifm_status = IFM_AVALID; 970 ifmr->ifm_active = IFM_ETHER; 971 972 qla_update_link_state(ha); 973 if (ha->hw.flags.link_up) { 974 ifmr->ifm_status |= IFM_ACTIVE; 975 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 976 } 977 978 QL_DPRINT2((ha->pci_dev, "%s: exit (%s)\n", __func__,\ 979 (ha->hw.flags.link_up ? "link_up" : "link_down"))); 980 981 return; 982 } 983 984 void 985 qla_start(struct ifnet *ifp) 986 { 987 struct mbuf *m_head; 988 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 989 990 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 991 992 if (!mtx_trylock(&ha->tx_lock)) { 993 QL_DPRINT8((ha->pci_dev, 994 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 995 return; 996 } 997 998 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 999 IFF_DRV_RUNNING) { 1000 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1001 QLA_TX_UNLOCK(ha); 1002 return; 1003 } 1004 1005 if (!ha->watchdog_ticks) 1006 qla_update_link_state(ha); 1007 1008 if (!ha->hw.flags.link_up) { 1009 QL_DPRINT8((ha->pci_dev, "%s: link down\n", __func__)); 1010 QLA_TX_UNLOCK(ha); 1011 return; 1012 } 1013 1014 while (ifp->if_snd.ifq_head != NULL) { 1015 IF_DEQUEUE(&ifp->if_snd, m_head); 1016 1017 if (m_head == NULL) { 1018 QL_DPRINT8((ha->pci_dev, "%s: m_head == NULL\n", 1019 __func__)); 1020 break; 1021 } 1022 1023 if (qla_send(ha, &m_head)) { 1024 if (m_head == NULL) 1025 break; 1026 QL_DPRINT8((ha->pci_dev, "%s: PREPEND\n", __func__)); 1027 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1028 IF_PREPEND(&ifp->if_snd, m_head); 1029 break; 1030 } 1031 /* Send a copy of the frame to the BPF listener */ 1032 ETHER_BPF_MTAP(ifp, m_head); 1033 } 1034 QLA_TX_UNLOCK(ha); 1035 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1036 return; 1037 } 1038 1039 static int 1040 qla_send(qla_host_t *ha, struct mbuf **m_headp) 1041 { 1042 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1043 bus_dmamap_t map; 1044 int nsegs; 1045 int ret = -1; 1046 uint32_t tx_idx; 1047 struct mbuf *m_head = *m_headp; 1048 1049 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1050 1051 if ((ret = bus_dmamap_create(ha->tx_tag, BUS_DMA_NOWAIT, &map))) { 1052 ha->err_tx_dmamap_create++; 1053 device_printf(ha->pci_dev, 1054 "%s: bus_dmamap_create failed[%d, %d]\n", 1055 __func__, ret, m_head->m_pkthdr.len); 1056 return (ret); 1057 } 1058 1059 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1060 BUS_DMA_NOWAIT); 1061 1062 if (ret == EFBIG) { 1063 1064 struct mbuf *m; 1065 1066 QL_DPRINT8((ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1067 m_head->m_pkthdr.len)); 1068 1069 m = m_defrag(m_head, M_NOWAIT); 1070 if (m == NULL) { 1071 ha->err_tx_defrag++; 1072 m_freem(m_head); 1073 *m_headp = NULL; 1074 device_printf(ha->pci_dev, 1075 "%s: m_defrag() = NULL [%d]\n", 1076 __func__, ret); 1077 return (ENOBUFS); 1078 } 1079 m_head = m; 1080 1081 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1082 segs, &nsegs, BUS_DMA_NOWAIT))) { 1083 1084 ha->err_tx_dmamap_load++; 1085 1086 device_printf(ha->pci_dev, 1087 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1088 __func__, ret, m_head->m_pkthdr.len); 1089 1090 bus_dmamap_destroy(ha->tx_tag, map); 1091 if (ret != ENOMEM) { 1092 m_freem(m_head); 1093 *m_headp = NULL; 1094 } 1095 return (ret); 1096 } 1097 } else if (ret) { 1098 ha->err_tx_dmamap_load++; 1099 1100 device_printf(ha->pci_dev, 1101 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1102 __func__, ret, m_head->m_pkthdr.len); 1103 1104 bus_dmamap_destroy(ha->tx_tag, map); 1105 1106 if (ret != ENOMEM) { 1107 m_freem(m_head); 1108 *m_headp = NULL; 1109 } 1110 return (ret); 1111 } 1112 1113 QL_ASSERT((nsegs != 0), ("qla_send: empty packet")); 1114 1115 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1116 1117 if (!(ret = qla_hw_send(ha, segs, nsegs, &tx_idx, m_head))) { 1118 ha->tx_buf[tx_idx].m_head = m_head; 1119 ha->tx_buf[tx_idx].map = map; 1120 } else { 1121 if (ret == EINVAL) { 1122 m_freem(m_head); 1123 *m_headp = NULL; 1124 } 1125 } 1126 1127 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1128 return (ret); 1129 } 1130 1131 static void 1132 qla_stop(qla_host_t *ha) 1133 { 1134 struct ifnet *ifp = ha->ifp; 1135 device_t dev; 1136 1137 dev = ha->pci_dev; 1138 1139 ha->flags.qla_watchdog_pause = 1; 1140 qla_mdelay(__func__, 100); 1141 1142 ha->flags.stop_rcv = 1; 1143 qla_hw_stop_rcv(ha); 1144 1145 qla_del_hw_if(ha); 1146 1147 qla_free_lro(ha); 1148 1149 qla_free_xmt_bufs(ha); 1150 qla_free_rcv_bufs(ha); 1151 1152 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1153 1154 return; 1155 } 1156 1157 /* 1158 * Buffer Management Functions for Transmit and Receive Rings 1159 */ 1160 static int 1161 qla_alloc_xmt_bufs(qla_host_t *ha) 1162 { 1163 if (bus_dma_tag_create(NULL, /* parent */ 1164 1, 0, /* alignment, bounds */ 1165 BUS_SPACE_MAXADDR, /* lowaddr */ 1166 BUS_SPACE_MAXADDR, /* highaddr */ 1167 NULL, NULL, /* filter, filterarg */ 1168 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1169 QLA_MAX_SEGMENTS, /* nsegments */ 1170 PAGE_SIZE, /* maxsegsize */ 1171 BUS_DMA_ALLOCNOW, /* flags */ 1172 NULL, /* lockfunc */ 1173 NULL, /* lockfuncarg */ 1174 &ha->tx_tag)) { 1175 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1176 __func__); 1177 return (ENOMEM); 1178 } 1179 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1180 1181 return 0; 1182 } 1183 1184 /* 1185 * Release mbuf after it sent on the wire 1186 */ 1187 static void 1188 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1189 { 1190 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1191 1192 if (txb->m_head) { 1193 1194 bus_dmamap_unload(ha->tx_tag, txb->map); 1195 bus_dmamap_destroy(ha->tx_tag, txb->map); 1196 1197 m_freem(txb->m_head); 1198 txb->m_head = NULL; 1199 } 1200 1201 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1202 } 1203 1204 static void 1205 qla_free_xmt_bufs(qla_host_t *ha) 1206 { 1207 int i; 1208 1209 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1210 qla_clear_tx_buf(ha, &ha->tx_buf[i]); 1211 1212 if (ha->tx_tag != NULL) { 1213 bus_dma_tag_destroy(ha->tx_tag); 1214 ha->tx_tag = NULL; 1215 } 1216 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1217 1218 return; 1219 } 1220 1221 1222 static int 1223 qla_alloc_rcv_bufs(qla_host_t *ha) 1224 { 1225 int i, j, ret = 0; 1226 qla_rx_buf_t *rxb; 1227 1228 if (bus_dma_tag_create(NULL, /* parent */ 1229 1, 0, /* alignment, bounds */ 1230 BUS_SPACE_MAXADDR, /* lowaddr */ 1231 BUS_SPACE_MAXADDR, /* highaddr */ 1232 NULL, NULL, /* filter, filterarg */ 1233 MJUM9BYTES, /* maxsize */ 1234 1, /* nsegments */ 1235 MJUM9BYTES, /* maxsegsize */ 1236 BUS_DMA_ALLOCNOW, /* flags */ 1237 NULL, /* lockfunc */ 1238 NULL, /* lockfuncarg */ 1239 &ha->rx_tag)) { 1240 1241 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1242 __func__); 1243 1244 return (ENOMEM); 1245 } 1246 1247 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1248 bzero((void *)ha->rx_jbuf, 1249 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1250 1251 for (i = 0; i < MAX_SDS_RINGS; i++) { 1252 ha->hw.sds[i].sdsr_next = 0; 1253 ha->hw.sds[i].rxb_free = NULL; 1254 ha->hw.sds[i].rx_free = 0; 1255 ha->hw.sds[i].rxjb_free = NULL; 1256 ha->hw.sds[i].rxj_free = 0; 1257 } 1258 1259 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1260 1261 rxb = &ha->rx_buf[i]; 1262 1263 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1264 1265 if (ret) { 1266 device_printf(ha->pci_dev, 1267 "%s: dmamap[%d] failed\n", __func__, i); 1268 1269 for (j = 0; j < i; j++) { 1270 bus_dmamap_destroy(ha->rx_tag, 1271 ha->rx_buf[j].map); 1272 } 1273 goto qla_alloc_rcv_bufs_failed; 1274 } 1275 } 1276 1277 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_NORMAL); 1278 1279 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1280 rxb = &ha->rx_buf[i]; 1281 rxb->handle = i; 1282 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 0))) { 1283 /* 1284 * set the physical address in the corresponding 1285 * descriptor entry in the receive ring/queue for the 1286 * hba 1287 */ 1288 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_NORMAL, i, 1289 rxb->handle, rxb->paddr, 1290 (rxb->m_head)->m_pkthdr.len); 1291 } else { 1292 device_printf(ha->pci_dev, 1293 "%s: qla_get_mbuf [standard(%d)] failed\n", 1294 __func__, i); 1295 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1296 goto qla_alloc_rcv_bufs_failed; 1297 } 1298 } 1299 1300 1301 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1302 1303 rxb = &ha->rx_jbuf[i]; 1304 1305 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1306 1307 if (ret) { 1308 device_printf(ha->pci_dev, 1309 "%s: dmamap[%d] failed\n", __func__, i); 1310 1311 for (j = 0; j < i; j++) { 1312 bus_dmamap_destroy(ha->rx_tag, 1313 ha->rx_jbuf[j].map); 1314 } 1315 goto qla_alloc_rcv_bufs_failed; 1316 } 1317 } 1318 1319 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_JUMBO); 1320 1321 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1322 rxb = &ha->rx_jbuf[i]; 1323 rxb->handle = i; 1324 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 1))) { 1325 /* 1326 * set the physical address in the corresponding 1327 * descriptor entry in the receive ring/queue for the 1328 * hba 1329 */ 1330 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_JUMBO, i, 1331 rxb->handle, rxb->paddr, 1332 (rxb->m_head)->m_pkthdr.len); 1333 } else { 1334 device_printf(ha->pci_dev, 1335 "%s: qla_get_mbuf [jumbo(%d)] failed\n", 1336 __func__, i); 1337 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1338 goto qla_alloc_rcv_bufs_failed; 1339 } 1340 } 1341 1342 return (0); 1343 1344 qla_alloc_rcv_bufs_failed: 1345 qla_free_rcv_bufs(ha); 1346 return (ret); 1347 } 1348 1349 static void 1350 qla_free_rcv_bufs(qla_host_t *ha) 1351 { 1352 int i; 1353 qla_rx_buf_t *rxb; 1354 1355 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1356 rxb = &ha->rx_buf[i]; 1357 if (rxb->m_head != NULL) { 1358 bus_dmamap_unload(ha->rx_tag, rxb->map); 1359 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1360 m_freem(rxb->m_head); 1361 rxb->m_head = NULL; 1362 } 1363 } 1364 1365 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1366 rxb = &ha->rx_jbuf[i]; 1367 if (rxb->m_head != NULL) { 1368 bus_dmamap_unload(ha->rx_tag, rxb->map); 1369 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1370 m_freem(rxb->m_head); 1371 rxb->m_head = NULL; 1372 } 1373 } 1374 1375 if (ha->rx_tag != NULL) { 1376 bus_dma_tag_destroy(ha->rx_tag); 1377 ha->rx_tag = NULL; 1378 } 1379 1380 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1381 bzero((void *)ha->rx_jbuf, 1382 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1383 1384 for (i = 0; i < MAX_SDS_RINGS; i++) { 1385 ha->hw.sds[i].sdsr_next = 0; 1386 ha->hw.sds[i].rxb_free = NULL; 1387 ha->hw.sds[i].rx_free = 0; 1388 ha->hw.sds[i].rxjb_free = NULL; 1389 ha->hw.sds[i].rxj_free = 0; 1390 } 1391 1392 return; 1393 } 1394 1395 int 1396 qla_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp, 1397 uint32_t jumbo) 1398 { 1399 struct mbuf *mp = nmp; 1400 struct ifnet *ifp; 1401 int ret = 0; 1402 uint32_t offset; 1403 1404 QL_DPRINT2((ha->pci_dev, "%s: jumbo(0x%x) enter\n", __func__, jumbo)); 1405 1406 ifp = ha->ifp; 1407 1408 if (mp == NULL) { 1409 1410 if (!jumbo) { 1411 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1412 1413 if (mp == NULL) { 1414 ha->err_m_getcl++; 1415 ret = ENOBUFS; 1416 device_printf(ha->pci_dev, 1417 "%s: m_getcl failed\n", __func__); 1418 goto exit_qla_get_mbuf; 1419 } 1420 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1421 } else { 1422 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, 1423 MJUM9BYTES); 1424 if (mp == NULL) { 1425 ha->err_m_getjcl++; 1426 ret = ENOBUFS; 1427 device_printf(ha->pci_dev, 1428 "%s: m_getjcl failed\n", __func__); 1429 goto exit_qla_get_mbuf; 1430 } 1431 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1432 } 1433 } else { 1434 if (!jumbo) 1435 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1436 else 1437 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1438 1439 mp->m_data = mp->m_ext.ext_buf; 1440 mp->m_next = NULL; 1441 } 1442 1443 1444 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1445 if (offset) { 1446 offset = 8 - offset; 1447 m_adj(mp, offset); 1448 } 1449 1450 /* 1451 * Using memory from the mbuf cluster pool, invoke the bus_dma 1452 * machinery to arrange the memory mapping. 1453 */ 1454 ret = bus_dmamap_load(ha->rx_tag, rxb->map, 1455 mtod(mp, void *), mp->m_len, 1456 qla_dmamap_callback, &rxb->paddr, 1457 BUS_DMA_NOWAIT); 1458 if (ret || !rxb->paddr) { 1459 m_free(mp); 1460 rxb->m_head = NULL; 1461 device_printf(ha->pci_dev, 1462 "%s: bus_dmamap_load failed\n", __func__); 1463 ret = -1; 1464 goto exit_qla_get_mbuf; 1465 } 1466 rxb->m_head = mp; 1467 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1468 1469 exit_qla_get_mbuf: 1470 QL_DPRINT2((ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1471 return (ret); 1472 } 1473 1474 static void 1475 qla_tx_done(void *context, int pending) 1476 { 1477 qla_host_t *ha = context; 1478 1479 qla_hw_tx_done(ha); 1480 qla_start(ha->ifp); 1481 } 1482 1483