1 /* 2 * Copyright (c) 2010-2011 Qlogic Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * File: qla_os.c 30 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include "qla_os.h" 37 #include "qla_reg.h" 38 #include "qla_hw.h" 39 #include "qla_def.h" 40 #include "qla_inline.h" 41 #include "qla_ver.h" 42 #include "qla_glbl.h" 43 #include "qla_dbg.h" 44 45 /* 46 * Some PCI Configuration Space Related Defines 47 */ 48 49 #ifndef PCI_VENDOR_QLOGIC 50 #define PCI_VENDOR_QLOGIC 0x1077 51 #endif 52 53 #ifndef PCI_PRODUCT_QLOGIC_ISP8020 54 #define PCI_PRODUCT_QLOGIC_ISP8020 0x8020 55 #endif 56 57 #define PCI_QLOGIC_ISP8020 \ 58 ((PCI_PRODUCT_QLOGIC_ISP8020 << 16) | PCI_VENDOR_QLOGIC) 59 60 /* 61 * static functions 62 */ 63 static int qla_alloc_parent_dma_tag(qla_host_t *ha); 64 static void qla_free_parent_dma_tag(qla_host_t *ha); 65 static int qla_alloc_xmt_bufs(qla_host_t *ha); 66 static void qla_free_xmt_bufs(qla_host_t *ha); 67 static int qla_alloc_rcv_bufs(qla_host_t *ha); 68 static void qla_free_rcv_bufs(qla_host_t *ha); 69 70 static void qla_init_ifnet(device_t dev, qla_host_t *ha); 71 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 72 static void qla_release(qla_host_t *ha); 73 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 74 int error); 75 static void qla_stop(qla_host_t *ha); 76 static int qla_send(qla_host_t *ha, struct mbuf **m_headp); 77 static void qla_tx_done(void *context, int pending); 78 79 /* 80 * Hooks to the Operating Systems 81 */ 82 static int qla_pci_probe (device_t); 83 static int qla_pci_attach (device_t); 84 static int qla_pci_detach (device_t); 85 86 static void qla_init(void *arg); 87 static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 88 static int qla_media_change(struct ifnet *ifp); 89 static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 90 91 static device_method_t qla_pci_methods[] = { 92 /* Device interface */ 93 DEVMETHOD(device_probe, qla_pci_probe), 94 DEVMETHOD(device_attach, qla_pci_attach), 95 DEVMETHOD(device_detach, qla_pci_detach), 96 { 0, 0 } 97 }; 98 99 static driver_t qla_pci_driver = { 100 "ql", qla_pci_methods, sizeof (qla_host_t), 101 }; 102 103 static devclass_t qla80xx_devclass; 104 105 DRIVER_MODULE(qla80xx, pci, qla_pci_driver, qla80xx_devclass, 0, 0); 106 107 MODULE_DEPEND(qla80xx, pci, 1, 1, 1); 108 MODULE_DEPEND(qla80xx, ether, 1, 1, 1); 109 110 MALLOC_DEFINE(M_QLA8XXXBUF, "qla80xxbuf", "Buffers for qla80xx driver"); 111 112 uint32_t std_replenish = 8; 113 uint32_t jumbo_replenish = 2; 114 uint32_t rcv_pkt_thres = 128; 115 uint32_t rcv_pkt_thres_d = 32; 116 uint32_t snd_pkt_thres = 16; 117 uint32_t free_pkt_thres = (NUM_TX_DESCRIPTORS / 2); 118 119 static char dev_str[64]; 120 121 /* 122 * Name: qla_pci_probe 123 * Function: Validate the PCI device to be a QLA80XX device 124 */ 125 static int 126 qla_pci_probe(device_t dev) 127 { 128 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 129 case PCI_QLOGIC_ISP8020: 130 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 131 "Qlogic ISP 80xx PCI CNA Adapter-Ethernet Function", 132 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 133 QLA_VERSION_BUILD); 134 device_set_desc(dev, dev_str); 135 break; 136 default: 137 return (ENXIO); 138 } 139 140 if (bootverbose) 141 printf("%s: %s\n ", __func__, dev_str); 142 143 return (BUS_PROBE_DEFAULT); 144 } 145 146 static void 147 qla_add_sysctls(qla_host_t *ha) 148 { 149 device_t dev = ha->pci_dev; 150 151 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 152 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 153 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RD, 154 (void *)ha, 0, 155 qla_sysctl_get_stats, "I", "Statistics"); 156 157 dbg_level = 0; 158 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 159 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 160 OID_AUTO, "debug", CTLFLAG_RW, 161 &dbg_level, dbg_level, "Debug Level"); 162 163 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 164 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 165 OID_AUTO, "std_replenish", CTLFLAG_RW, 166 &std_replenish, std_replenish, 167 "Threshold for Replenishing Standard Frames"); 168 169 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 170 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 171 OID_AUTO, "jumbo_replenish", CTLFLAG_RW, 172 &jumbo_replenish, jumbo_replenish, 173 "Threshold for Replenishing Jumbo Frames"); 174 175 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 176 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 177 OID_AUTO, "rcv_pkt_thres", CTLFLAG_RW, 178 &rcv_pkt_thres, rcv_pkt_thres, 179 "Threshold for # of rcv pkts to trigger indication isr"); 180 181 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 182 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 183 OID_AUTO, "rcv_pkt_thres_d", CTLFLAG_RW, 184 &rcv_pkt_thres_d, rcv_pkt_thres_d, 185 "Threshold for # of rcv pkts to trigger indication defered"); 186 187 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 188 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 189 OID_AUTO, "snd_pkt_thres", CTLFLAG_RW, 190 &snd_pkt_thres, snd_pkt_thres, 191 "Threshold for # of snd packets"); 192 193 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 194 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 195 OID_AUTO, "free_pkt_thres", CTLFLAG_RW, 196 &free_pkt_thres, free_pkt_thres, 197 "Threshold for # of packets to free at a time"); 198 199 return; 200 } 201 202 static void 203 qla_watchdog(void *arg) 204 { 205 qla_host_t *ha = arg; 206 qla_hw_t *hw; 207 struct ifnet *ifp; 208 209 hw = &ha->hw; 210 ifp = ha->ifp; 211 212 if (ha->flags.qla_watchdog_exit) 213 return; 214 215 if (!ha->flags.qla_watchdog_pause) { 216 if (qla_le32_to_host(*(hw->tx_cons)) != hw->txr_comp) { 217 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 218 } else if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 219 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 220 } 221 } 222 ha->watchdog_ticks = ha->watchdog_ticks++ % 1000; 223 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 224 qla_watchdog, ha); 225 } 226 227 /* 228 * Name: qla_pci_attach 229 * Function: attaches the device to the operating system 230 */ 231 static int 232 qla_pci_attach(device_t dev) 233 { 234 qla_host_t *ha = NULL; 235 uint32_t rsrc_len, i; 236 237 QL_DPRINT2((dev, "%s: enter\n", __func__)); 238 239 if ((ha = device_get_softc(dev)) == NULL) { 240 device_printf(dev, "cannot get softc\n"); 241 return (ENOMEM); 242 } 243 244 memset(ha, 0, sizeof (qla_host_t)); 245 246 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8020) { 247 device_printf(dev, "device is not ISP8020\n"); 248 return (ENXIO); 249 } 250 251 ha->pci_func = pci_get_function(dev); 252 253 ha->pci_dev = dev; 254 255 pci_enable_busmaster(dev); 256 257 ha->reg_rid = PCIR_BAR(0); 258 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 259 RF_ACTIVE); 260 261 if (ha->pci_reg == NULL) { 262 device_printf(dev, "unable to map any ports\n"); 263 goto qla_pci_attach_err; 264 } 265 266 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 267 ha->reg_rid); 268 269 mtx_init(&ha->hw_lock, "qla80xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 270 mtx_init(&ha->tx_lock, "qla80xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 271 mtx_init(&ha->rx_lock, "qla80xx_rx_lock", MTX_NETWORK_LOCK, MTX_DEF); 272 mtx_init(&ha->rxj_lock, "qla80xx_rxj_lock", MTX_NETWORK_LOCK, MTX_DEF); 273 ha->flags.lock_init = 1; 274 275 ha->msix_count = pci_msix_count(dev); 276 277 if (ha->msix_count < qla_get_msix_count(ha)) { 278 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 279 ha->msix_count); 280 goto qla_pci_attach_err; 281 } 282 283 QL_DPRINT2((dev, "%s: ha %p irq %p pci_func 0x%x rsrc_count 0x%08x" 284 " msix_count 0x%x pci_reg %p\n", __func__, ha, 285 ha->irq, ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg)); 286 287 ha->msix_count = qla_get_msix_count(ha); 288 289 if (pci_alloc_msix(dev, &ha->msix_count)) { 290 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 291 ha->msix_count); 292 ha->msix_count = 0; 293 goto qla_pci_attach_err; 294 } 295 296 TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha); 297 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 298 taskqueue_thread_enqueue, &ha->tx_tq); 299 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 300 device_get_nameunit(ha->pci_dev)); 301 302 for (i = 0; i < ha->msix_count; i++) { 303 ha->irq_vec[i].irq_rid = i+1; 304 ha->irq_vec[i].ha = ha; 305 306 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 307 &ha->irq_vec[i].irq_rid, 308 (RF_ACTIVE | RF_SHAREABLE)); 309 310 if (ha->irq_vec[i].irq == NULL) { 311 device_printf(dev, "could not allocate interrupt\n"); 312 goto qla_pci_attach_err; 313 } 314 315 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 316 (INTR_TYPE_NET | INTR_MPSAFE), 317 NULL, qla_isr, &ha->irq_vec[i], 318 &ha->irq_vec[i].handle)) { 319 device_printf(dev, "could not setup interrupt\n"); 320 goto qla_pci_attach_err; 321 } 322 323 TASK_INIT(&ha->irq_vec[i].rcv_task, 0, qla_rcv,\ 324 &ha->irq_vec[i]); 325 326 ha->irq_vec[i].rcv_tq = taskqueue_create_fast("qla_rcvq", 327 M_NOWAIT, taskqueue_thread_enqueue, 328 &ha->irq_vec[i].rcv_tq); 329 330 taskqueue_start_threads(&ha->irq_vec[i].rcv_tq, 1, PI_NET, 331 "%s rcvq", 332 device_get_nameunit(ha->pci_dev)); 333 } 334 335 qla_add_sysctls(ha); 336 337 /* add hardware specific sysctls */ 338 qla_hw_add_sysctls(ha); 339 340 /* initialize hardware */ 341 if (qla_init_hw(ha)) { 342 device_printf(dev, "%s: qla_init_hw failed\n", __func__); 343 goto qla_pci_attach_err; 344 } 345 346 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 347 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 348 ha->fw_ver_build); 349 350 //qla_get_hw_caps(ha); 351 qla_read_mac_addr(ha); 352 353 /* allocate parent dma tag */ 354 if (qla_alloc_parent_dma_tag(ha)) { 355 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 356 __func__); 357 goto qla_pci_attach_err; 358 } 359 360 /* alloc all dma buffers */ 361 if (qla_alloc_dma(ha)) { 362 device_printf(dev, "%s: qla_alloc_dma failed\n", __func__); 363 goto qla_pci_attach_err; 364 } 365 366 /* create the o.s ethernet interface */ 367 qla_init_ifnet(dev, ha); 368 369 ha->flags.qla_watchdog_active = 1; 370 ha->flags.qla_watchdog_pause = 1; 371 372 callout_init(&ha->tx_callout, TRUE); 373 374 /* create ioctl device interface */ 375 if (qla_make_cdev(ha)) { 376 device_printf(dev, "%s: qla_make_cdev failed\n", __func__); 377 goto qla_pci_attach_err; 378 } 379 380 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 381 qla_watchdog, ha); 382 383 QL_DPRINT2((dev, "%s: exit 0\n", __func__)); 384 return (0); 385 386 qla_pci_attach_err: 387 388 qla_release(ha); 389 390 QL_DPRINT2((dev, "%s: exit ENXIO\n", __func__)); 391 return (ENXIO); 392 } 393 394 /* 395 * Name: qla_pci_detach 396 * Function: Unhooks the device from the operating system 397 */ 398 static int 399 qla_pci_detach(device_t dev) 400 { 401 qla_host_t *ha = NULL; 402 struct ifnet *ifp; 403 int i; 404 405 QL_DPRINT2((dev, "%s: enter\n", __func__)); 406 407 if ((ha = device_get_softc(dev)) == NULL) { 408 device_printf(dev, "cannot get softc\n"); 409 return (ENOMEM); 410 } 411 412 ifp = ha->ifp; 413 414 QLA_LOCK(ha, __func__); 415 qla_stop(ha); 416 QLA_UNLOCK(ha, __func__); 417 418 if (ha->tx_tq) { 419 taskqueue_drain(ha->tx_tq, &ha->tx_task); 420 taskqueue_free(ha->tx_tq); 421 } 422 423 for (i = 0; i < ha->msix_count; i++) { 424 taskqueue_drain(ha->irq_vec[i].rcv_tq, 425 &ha->irq_vec[i].rcv_task); 426 taskqueue_free(ha->irq_vec[i].rcv_tq); 427 } 428 429 qla_release(ha); 430 431 QL_DPRINT2((dev, "%s: exit\n", __func__)); 432 433 return (0); 434 } 435 436 /* 437 * SYSCTL Related Callbacks 438 */ 439 static int 440 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 441 { 442 int err, ret = 0; 443 qla_host_t *ha; 444 445 err = sysctl_handle_int(oidp, &ret, 0, req); 446 447 if (err) 448 return (err); 449 450 ha = (qla_host_t *)arg1; 451 //qla_get_stats(ha); 452 QL_DPRINT2((ha->pci_dev, "%s: called ret %d\n", __func__, ret)); 453 return (err); 454 } 455 456 457 /* 458 * Name: qla_release 459 * Function: Releases the resources allocated for the device 460 */ 461 static void 462 qla_release(qla_host_t *ha) 463 { 464 device_t dev; 465 int i; 466 467 dev = ha->pci_dev; 468 469 qla_del_cdev(ha); 470 471 if (ha->flags.qla_watchdog_active) 472 ha->flags.qla_watchdog_exit = 1; 473 474 callout_stop(&ha->tx_callout); 475 qla_mdelay(__func__, 100); 476 477 if (ha->ifp != NULL) 478 ether_ifdetach(ha->ifp); 479 480 qla_free_dma(ha); 481 qla_free_parent_dma_tag(ha); 482 483 for (i = 0; i < ha->msix_count; i++) { 484 if (ha->irq_vec[i].handle) 485 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 486 ha->irq_vec[i].handle); 487 if (ha->irq_vec[i].irq) 488 (void) bus_release_resource(dev, SYS_RES_IRQ, 489 ha->irq_vec[i].irq_rid, 490 ha->irq_vec[i].irq); 491 } 492 if (ha->msix_count) 493 pci_release_msi(dev); 494 495 if (ha->flags.lock_init) { 496 mtx_destroy(&ha->tx_lock); 497 mtx_destroy(&ha->rx_lock); 498 mtx_destroy(&ha->rxj_lock); 499 mtx_destroy(&ha->hw_lock); 500 } 501 502 if (ha->pci_reg) 503 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 504 ha->pci_reg); 505 } 506 507 /* 508 * DMA Related Functions 509 */ 510 511 static void 512 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 513 { 514 *((bus_addr_t *)arg) = 0; 515 516 if (error) { 517 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 518 return; 519 } 520 521 QL_ASSERT((nsegs == 1), ("%s: %d segments returned!", __func__, nsegs)); 522 523 *((bus_addr_t *)arg) = segs[0].ds_addr; 524 525 return; 526 } 527 528 int 529 qla_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 530 { 531 int ret = 0; 532 device_t dev; 533 bus_addr_t b_addr; 534 535 dev = ha->pci_dev; 536 537 QL_DPRINT2((dev, "%s: enter\n", __func__)); 538 539 ret = bus_dma_tag_create( 540 ha->parent_tag,/* parent */ 541 dma_buf->alignment, 542 ((bus_size_t)(1ULL << 32)),/* boundary */ 543 BUS_SPACE_MAXADDR, /* lowaddr */ 544 BUS_SPACE_MAXADDR, /* highaddr */ 545 NULL, NULL, /* filter, filterarg */ 546 dma_buf->size, /* maxsize */ 547 1, /* nsegments */ 548 dma_buf->size, /* maxsegsize */ 549 0, /* flags */ 550 NULL, NULL, /* lockfunc, lockarg */ 551 &dma_buf->dma_tag); 552 553 if (ret) { 554 device_printf(dev, "%s: could not create dma tag\n", __func__); 555 goto qla_alloc_dmabuf_exit; 556 } 557 ret = bus_dmamem_alloc(dma_buf->dma_tag, 558 (void **)&dma_buf->dma_b, 559 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 560 &dma_buf->dma_map); 561 if (ret) { 562 bus_dma_tag_destroy(dma_buf->dma_tag); 563 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 564 goto qla_alloc_dmabuf_exit; 565 } 566 567 ret = bus_dmamap_load(dma_buf->dma_tag, 568 dma_buf->dma_map, 569 dma_buf->dma_b, 570 dma_buf->size, 571 qla_dmamap_callback, 572 &b_addr, BUS_DMA_NOWAIT); 573 574 if (ret || !b_addr) { 575 bus_dma_tag_destroy(dma_buf->dma_tag); 576 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 577 dma_buf->dma_map); 578 ret = -1; 579 goto qla_alloc_dmabuf_exit; 580 } 581 582 dma_buf->dma_addr = b_addr; 583 584 qla_alloc_dmabuf_exit: 585 QL_DPRINT2((dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 586 __func__, ret, (void *)dma_buf->dma_tag, 587 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 588 dma_buf->size)); 589 590 return ret; 591 } 592 593 void 594 qla_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 595 { 596 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 597 bus_dma_tag_destroy(dma_buf->dma_tag); 598 } 599 600 static int 601 qla_alloc_parent_dma_tag(qla_host_t *ha) 602 { 603 int ret; 604 device_t dev; 605 606 dev = ha->pci_dev; 607 608 /* 609 * Allocate parent DMA Tag 610 */ 611 ret = bus_dma_tag_create( 612 bus_get_dma_tag(dev), /* parent */ 613 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 614 BUS_SPACE_MAXADDR, /* lowaddr */ 615 BUS_SPACE_MAXADDR, /* highaddr */ 616 NULL, NULL, /* filter, filterarg */ 617 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 618 0, /* nsegments */ 619 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 620 0, /* flags */ 621 NULL, NULL, /* lockfunc, lockarg */ 622 &ha->parent_tag); 623 624 if (ret) { 625 device_printf(dev, "%s: could not create parent dma tag\n", 626 __func__); 627 return (-1); 628 } 629 630 ha->flags.parent_tag = 1; 631 632 return (0); 633 } 634 635 static void 636 qla_free_parent_dma_tag(qla_host_t *ha) 637 { 638 if (ha->flags.parent_tag) { 639 bus_dma_tag_destroy(ha->parent_tag); 640 ha->flags.parent_tag = 0; 641 } 642 } 643 644 /* 645 * Name: qla_init_ifnet 646 * Function: Creates the Network Device Interface and Registers it with the O.S 647 */ 648 649 static void 650 qla_init_ifnet(device_t dev, qla_host_t *ha) 651 { 652 struct ifnet *ifp; 653 654 QL_DPRINT2((dev, "%s: enter\n", __func__)); 655 656 ifp = ha->ifp = if_alloc(IFT_ETHER); 657 658 if (ifp == NULL) 659 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 660 661 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 662 663 ifp->if_baudrate = (1 * 1000 * 1000 *1000); 664 ifp->if_init = qla_init; 665 ifp->if_softc = ha; 666 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 667 ifp->if_ioctl = qla_ioctl; 668 ifp->if_start = qla_start; 669 670 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha)); 671 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha); 672 IFQ_SET_READY(&ifp->if_snd); 673 674 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 675 676 ether_ifattach(ifp, qla_get_mac_addr(ha)); 677 678 ifp->if_capabilities = IFCAP_HWCSUM | 679 IFCAP_TSO4 | 680 IFCAP_JUMBO_MTU; 681 682 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 683 684 #if defined(__FreeBSD_version) && (__FreeBSD_version < 900002) 685 ifp->if_timer = 0; 686 ifp->if_watchdog = NULL; 687 #endif /* #if defined(__FreeBSD_version) && (__FreeBSD_version < 900002) */ 688 689 ifp->if_capenable = ifp->if_capabilities; 690 691 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 692 693 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 694 695 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 696 NULL); 697 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 698 699 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 700 701 QL_DPRINT2((dev, "%s: exit\n", __func__)); 702 703 return; 704 } 705 706 static void 707 qla_init_locked(qla_host_t *ha) 708 { 709 struct ifnet *ifp = ha->ifp; 710 711 qla_stop(ha); 712 713 if (qla_alloc_xmt_bufs(ha) != 0) 714 return; 715 716 if (qla_alloc_rcv_bufs(ha) != 0) 717 return; 718 719 if (qla_config_lro(ha)) 720 return; 721 722 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 723 724 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO; 725 726 ha->flags.stop_rcv = 0; 727 if (qla_init_hw_if(ha) == 0) { 728 ifp = ha->ifp; 729 ifp->if_drv_flags |= IFF_DRV_RUNNING; 730 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 731 ha->flags.qla_watchdog_pause = 0; 732 } 733 734 return; 735 } 736 737 static void 738 qla_init(void *arg) 739 { 740 qla_host_t *ha; 741 742 ha = (qla_host_t *)arg; 743 744 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 745 746 QLA_LOCK(ha, __func__); 747 qla_init_locked(ha); 748 QLA_UNLOCK(ha, __func__); 749 750 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 751 } 752 753 static void 754 qla_set_multi(qla_host_t *ha, uint32_t add_multi) 755 { 756 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 757 struct ifmultiaddr *ifma; 758 int mcnt = 0; 759 struct ifnet *ifp = ha->ifp; 760 761 if_maddr_rlock(ifp); 762 763 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 764 765 if (ifma->ifma_addr->sa_family != AF_LINK) 766 continue; 767 768 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 769 break; 770 771 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), 772 &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 773 774 mcnt++; 775 } 776 777 if_maddr_runlock(ifp); 778 779 qla_hw_set_multi(ha, mta, mcnt, add_multi); 780 781 return; 782 } 783 784 static int 785 qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 786 { 787 int ret = 0; 788 struct ifreq *ifr = (struct ifreq *)data; 789 struct ifaddr *ifa = (struct ifaddr *)data; 790 qla_host_t *ha; 791 792 ha = (qla_host_t *)ifp->if_softc; 793 794 switch (cmd) { 795 case SIOCSIFADDR: 796 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 797 __func__, cmd)); 798 799 if (ifa->ifa_addr->sa_family == AF_INET) { 800 ifp->if_flags |= IFF_UP; 801 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 802 QLA_LOCK(ha, __func__); 803 qla_init_locked(ha); 804 QLA_UNLOCK(ha, __func__); 805 } 806 QL_DPRINT4((ha->pci_dev, 807 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 808 __func__, cmd, ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 809 810 arp_ifinit(ifp, ifa); 811 if (ntohl(IA_SIN(ifa)->sin_addr.s_addr) != INADDR_ANY) { 812 qla_config_ipv4_addr(ha, 813 (IA_SIN(ifa)->sin_addr.s_addr)); 814 } 815 } else { 816 ether_ioctl(ifp, cmd, data); 817 } 818 break; 819 820 case SIOCSIFMTU: 821 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 822 __func__, cmd)); 823 824 if (ifr->ifr_mtu > QLA_MAX_FRAME_SIZE - ETHER_HDR_LEN) { 825 ret = EINVAL; 826 } else { 827 QLA_LOCK(ha, __func__); 828 ifp->if_mtu = ifr->ifr_mtu; 829 ha->max_frame_size = 830 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 831 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 832 ret = qla_set_max_mtu(ha, ha->max_frame_size, 833 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 834 } 835 QLA_UNLOCK(ha, __func__); 836 837 if (ret) 838 ret = EINVAL; 839 } 840 841 break; 842 843 case SIOCSIFFLAGS: 844 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 845 __func__, cmd)); 846 847 if (ifp->if_flags & IFF_UP) { 848 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 849 if ((ifp->if_flags ^ ha->if_flags) & 850 IFF_PROMISC) { 851 qla_set_promisc(ha); 852 } else if ((ifp->if_flags ^ ha->if_flags) & 853 IFF_ALLMULTI) { 854 qla_set_allmulti(ha); 855 } 856 } else { 857 QLA_LOCK(ha, __func__); 858 qla_init_locked(ha); 859 ha->max_frame_size = ifp->if_mtu + 860 ETHER_HDR_LEN + ETHER_CRC_LEN; 861 ret = qla_set_max_mtu(ha, ha->max_frame_size, 862 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 863 QLA_UNLOCK(ha, __func__); 864 } 865 } else { 866 QLA_LOCK(ha, __func__); 867 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 868 qla_stop(ha); 869 ha->if_flags = ifp->if_flags; 870 QLA_UNLOCK(ha, __func__); 871 } 872 break; 873 874 case SIOCADDMULTI: 875 QL_DPRINT4((ha->pci_dev, 876 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 877 878 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 879 qla_set_multi(ha, 1); 880 } 881 break; 882 883 case SIOCDELMULTI: 884 QL_DPRINT4((ha->pci_dev, 885 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 886 887 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 888 qla_set_multi(ha, 0); 889 } 890 break; 891 892 case SIOCSIFMEDIA: 893 case SIOCGIFMEDIA: 894 QL_DPRINT4((ha->pci_dev, 895 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 896 __func__, cmd)); 897 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 898 break; 899 900 case SIOCSIFCAP: 901 { 902 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 903 904 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 905 __func__, cmd)); 906 907 if (mask & IFCAP_HWCSUM) 908 ifp->if_capenable ^= IFCAP_HWCSUM; 909 if (mask & IFCAP_TSO4) 910 ifp->if_capenable ^= IFCAP_TSO4; 911 if (mask & IFCAP_TSO6) 912 ifp->if_capenable ^= IFCAP_TSO6; 913 if (mask & IFCAP_VLAN_HWTAGGING) 914 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 915 916 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 917 qla_init(ha); 918 919 VLAN_CAPABILITIES(ifp); 920 break; 921 } 922 923 default: 924 QL_DPRINT4((ha->pci_dev, "%s: default (0x%lx)\n", 925 __func__, cmd)); 926 ret = ether_ioctl(ifp, cmd, data); 927 break; 928 } 929 930 return (ret); 931 } 932 933 static int 934 qla_media_change(struct ifnet *ifp) 935 { 936 qla_host_t *ha; 937 struct ifmedia *ifm; 938 int ret = 0; 939 940 ha = (qla_host_t *)ifp->if_softc; 941 942 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 943 944 ifm = &ha->media; 945 946 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 947 ret = EINVAL; 948 949 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 950 951 return (ret); 952 } 953 954 static void 955 qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 956 { 957 qla_host_t *ha; 958 959 ha = (qla_host_t *)ifp->if_softc; 960 961 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 962 963 ifmr->ifm_status = IFM_AVALID; 964 ifmr->ifm_active = IFM_ETHER; 965 966 qla_update_link_state(ha); 967 if (ha->hw.flags.link_up) { 968 ifmr->ifm_status |= IFM_ACTIVE; 969 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 970 } 971 972 QL_DPRINT2((ha->pci_dev, "%s: exit (%s)\n", __func__,\ 973 (ha->hw.flags.link_up ? "link_up" : "link_down"))); 974 975 return; 976 } 977 978 void 979 qla_start(struct ifnet *ifp) 980 { 981 struct mbuf *m_head; 982 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 983 984 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 985 986 if (!mtx_trylock(&ha->tx_lock)) { 987 QL_DPRINT8((ha->pci_dev, 988 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 989 return; 990 } 991 992 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 993 IFF_DRV_RUNNING) { 994 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 995 QLA_TX_UNLOCK(ha); 996 return; 997 } 998 999 if (!ha->watchdog_ticks) 1000 qla_update_link_state(ha); 1001 1002 if (!ha->hw.flags.link_up) { 1003 QL_DPRINT8((ha->pci_dev, "%s: link down\n", __func__)); 1004 QLA_TX_UNLOCK(ha); 1005 return; 1006 } 1007 1008 while (ifp->if_snd.ifq_head != NULL) { 1009 IF_DEQUEUE(&ifp->if_snd, m_head); 1010 1011 if (m_head == NULL) { 1012 QL_DPRINT8((ha->pci_dev, "%s: m_head == NULL\n", 1013 __func__)); 1014 break; 1015 } 1016 1017 if (qla_send(ha, &m_head)) { 1018 if (m_head == NULL) 1019 break; 1020 QL_DPRINT8((ha->pci_dev, "%s: PREPEND\n", __func__)); 1021 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1022 IF_PREPEND(&ifp->if_snd, m_head); 1023 break; 1024 } 1025 /* Send a copy of the frame to the BPF listener */ 1026 ETHER_BPF_MTAP(ifp, m_head); 1027 } 1028 QLA_TX_UNLOCK(ha); 1029 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1030 return; 1031 } 1032 1033 static int 1034 qla_send(qla_host_t *ha, struct mbuf **m_headp) 1035 { 1036 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1037 bus_dmamap_t map; 1038 int nsegs; 1039 int ret = -1; 1040 uint32_t tx_idx; 1041 struct mbuf *m_head = *m_headp; 1042 1043 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1044 1045 if ((ret = bus_dmamap_create(ha->tx_tag, BUS_DMA_NOWAIT, &map))) { 1046 ha->err_tx_dmamap_create++; 1047 device_printf(ha->pci_dev, 1048 "%s: bus_dmamap_create failed[%d, %d]\n", 1049 __func__, ret, m_head->m_pkthdr.len); 1050 return (ret); 1051 } 1052 1053 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1054 BUS_DMA_NOWAIT); 1055 1056 if ((ret == EFBIG) || 1057 ((nsegs > Q8_TX_MAX_SEGMENTS) && 1058 (((m_head->m_pkthdr.csum_flags & CSUM_TSO) == 0) || 1059 (m_head->m_pkthdr.len <= ha->max_frame_size)))) { 1060 1061 struct mbuf *m; 1062 1063 QL_DPRINT8((ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1064 m_head->m_pkthdr.len)); 1065 1066 m = m_defrag(m_head, M_DONTWAIT); 1067 if (m == NULL) { 1068 ha->err_tx_defrag++; 1069 m_freem(m_head); 1070 *m_headp = NULL; 1071 device_printf(ha->pci_dev, 1072 "%s: m_defrag() = NULL [%d]\n", 1073 __func__, ret); 1074 return (ENOBUFS); 1075 } 1076 m_head = m; 1077 1078 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1079 segs, &nsegs, BUS_DMA_NOWAIT))) { 1080 1081 ha->err_tx_dmamap_load++; 1082 1083 device_printf(ha->pci_dev, 1084 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1085 __func__, ret, m_head->m_pkthdr.len); 1086 1087 bus_dmamap_destroy(ha->tx_tag, map); 1088 if (ret != ENOMEM) { 1089 m_freem(m_head); 1090 *m_headp = NULL; 1091 } 1092 return (ret); 1093 } 1094 } else if (ret) { 1095 ha->err_tx_dmamap_load++; 1096 1097 device_printf(ha->pci_dev, 1098 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1099 __func__, ret, m_head->m_pkthdr.len); 1100 1101 bus_dmamap_destroy(ha->tx_tag, map); 1102 1103 if (ret != ENOMEM) { 1104 m_freem(m_head); 1105 *m_headp = NULL; 1106 } 1107 return (ret); 1108 } 1109 1110 QL_ASSERT((nsegs != 0), ("qla_send: empty packet")); 1111 1112 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1113 1114 if (!(ret = qla_hw_send(ha, segs, nsegs, &tx_idx, m_head))) { 1115 ha->tx_buf[tx_idx].m_head = m_head; 1116 ha->tx_buf[tx_idx].map = map; 1117 } else { 1118 if (ret == EINVAL) { 1119 m_freem(m_head); 1120 *m_headp = NULL; 1121 } 1122 } 1123 1124 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1125 return (ret); 1126 } 1127 1128 static void 1129 qla_stop(qla_host_t *ha) 1130 { 1131 struct ifnet *ifp = ha->ifp; 1132 device_t dev; 1133 1134 dev = ha->pci_dev; 1135 1136 ha->flags.qla_watchdog_pause = 1; 1137 qla_mdelay(__func__, 100); 1138 1139 ha->flags.stop_rcv = 1; 1140 qla_hw_stop_rcv(ha); 1141 1142 qla_del_hw_if(ha); 1143 1144 qla_free_lro(ha); 1145 1146 qla_free_xmt_bufs(ha); 1147 qla_free_rcv_bufs(ha); 1148 1149 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1150 1151 return; 1152 } 1153 1154 /* 1155 * Buffer Management Functions for Transmit and Receive Rings 1156 */ 1157 static int 1158 qla_alloc_xmt_bufs(qla_host_t *ha) 1159 { 1160 if (bus_dma_tag_create(NULL, /* parent */ 1161 1, 0, /* alignment, bounds */ 1162 BUS_SPACE_MAXADDR, /* lowaddr */ 1163 BUS_SPACE_MAXADDR, /* highaddr */ 1164 NULL, NULL, /* filter, filterarg */ 1165 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1166 QLA_MAX_SEGMENTS, /* nsegments */ 1167 PAGE_SIZE, /* maxsegsize */ 1168 BUS_DMA_ALLOCNOW, /* flags */ 1169 NULL, /* lockfunc */ 1170 NULL, /* lockfuncarg */ 1171 &ha->tx_tag)) { 1172 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1173 __func__); 1174 return (ENOMEM); 1175 } 1176 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1177 1178 return 0; 1179 } 1180 1181 /* 1182 * Release mbuf after it sent on the wire 1183 */ 1184 static void 1185 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1186 { 1187 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1188 1189 if (txb->m_head) { 1190 1191 bus_dmamap_unload(ha->tx_tag, txb->map); 1192 bus_dmamap_destroy(ha->tx_tag, txb->map); 1193 1194 m_freem(txb->m_head); 1195 txb->m_head = NULL; 1196 } 1197 1198 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1199 } 1200 1201 static void 1202 qla_free_xmt_bufs(qla_host_t *ha) 1203 { 1204 int i; 1205 1206 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1207 qla_clear_tx_buf(ha, &ha->tx_buf[i]); 1208 1209 if (ha->tx_tag != NULL) { 1210 bus_dma_tag_destroy(ha->tx_tag); 1211 ha->tx_tag = NULL; 1212 } 1213 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1214 1215 return; 1216 } 1217 1218 1219 static int 1220 qla_alloc_rcv_bufs(qla_host_t *ha) 1221 { 1222 int i, j, ret = 0; 1223 qla_rx_buf_t *rxb; 1224 1225 if (bus_dma_tag_create(NULL, /* parent */ 1226 1, 0, /* alignment, bounds */ 1227 BUS_SPACE_MAXADDR, /* lowaddr */ 1228 BUS_SPACE_MAXADDR, /* highaddr */ 1229 NULL, NULL, /* filter, filterarg */ 1230 MJUM9BYTES, /* maxsize */ 1231 1, /* nsegments */ 1232 MJUM9BYTES, /* maxsegsize */ 1233 BUS_DMA_ALLOCNOW, /* flags */ 1234 NULL, /* lockfunc */ 1235 NULL, /* lockfuncarg */ 1236 &ha->rx_tag)) { 1237 1238 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1239 __func__); 1240 1241 return (ENOMEM); 1242 } 1243 1244 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1245 bzero((void *)ha->rx_jbuf, 1246 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1247 1248 for (i = 0; i < MAX_SDS_RINGS; i++) { 1249 ha->hw.sds[i].sdsr_next = 0; 1250 ha->hw.sds[i].rxb_free = NULL; 1251 ha->hw.sds[i].rx_free = 0; 1252 ha->hw.sds[i].rxjb_free = NULL; 1253 ha->hw.sds[i].rxj_free = 0; 1254 } 1255 1256 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1257 1258 rxb = &ha->rx_buf[i]; 1259 1260 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1261 1262 if (ret) { 1263 device_printf(ha->pci_dev, 1264 "%s: dmamap[%d] failed\n", __func__, i); 1265 1266 for (j = 0; j < i; j++) { 1267 bus_dmamap_destroy(ha->rx_tag, 1268 ha->rx_buf[j].map); 1269 } 1270 goto qla_alloc_rcv_bufs_failed; 1271 } 1272 } 1273 1274 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_NORMAL); 1275 1276 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1277 rxb = &ha->rx_buf[i]; 1278 rxb->handle = i; 1279 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 0))) { 1280 /* 1281 * set the physical address in the corresponding 1282 * descriptor entry in the receive ring/queue for the 1283 * hba 1284 */ 1285 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_NORMAL, i, 1286 rxb->handle, rxb->paddr, 1287 (rxb->m_head)->m_pkthdr.len); 1288 } else { 1289 device_printf(ha->pci_dev, 1290 "%s: qla_get_mbuf [standard(%d)] failed\n", 1291 __func__, i); 1292 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1293 goto qla_alloc_rcv_bufs_failed; 1294 } 1295 } 1296 1297 1298 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1299 1300 rxb = &ha->rx_jbuf[i]; 1301 1302 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1303 1304 if (ret) { 1305 device_printf(ha->pci_dev, 1306 "%s: dmamap[%d] failed\n", __func__, i); 1307 1308 for (j = 0; j < i; j++) { 1309 bus_dmamap_destroy(ha->rx_tag, 1310 ha->rx_jbuf[j].map); 1311 } 1312 goto qla_alloc_rcv_bufs_failed; 1313 } 1314 } 1315 1316 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_JUMBO); 1317 1318 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1319 rxb = &ha->rx_jbuf[i]; 1320 rxb->handle = i; 1321 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 1))) { 1322 /* 1323 * set the physical address in the corresponding 1324 * descriptor entry in the receive ring/queue for the 1325 * hba 1326 */ 1327 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_JUMBO, i, 1328 rxb->handle, rxb->paddr, 1329 (rxb->m_head)->m_pkthdr.len); 1330 } else { 1331 device_printf(ha->pci_dev, 1332 "%s: qla_get_mbuf [jumbo(%d)] failed\n", 1333 __func__, i); 1334 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1335 goto qla_alloc_rcv_bufs_failed; 1336 } 1337 } 1338 1339 return (0); 1340 1341 qla_alloc_rcv_bufs_failed: 1342 qla_free_rcv_bufs(ha); 1343 return (ret); 1344 } 1345 1346 static void 1347 qla_free_rcv_bufs(qla_host_t *ha) 1348 { 1349 int i; 1350 qla_rx_buf_t *rxb; 1351 1352 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1353 rxb = &ha->rx_buf[i]; 1354 if (rxb->m_head != NULL) { 1355 bus_dmamap_unload(ha->rx_tag, rxb->map); 1356 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1357 m_freem(rxb->m_head); 1358 rxb->m_head = NULL; 1359 } 1360 } 1361 1362 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1363 rxb = &ha->rx_jbuf[i]; 1364 if (rxb->m_head != NULL) { 1365 bus_dmamap_unload(ha->rx_tag, rxb->map); 1366 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1367 m_freem(rxb->m_head); 1368 rxb->m_head = NULL; 1369 } 1370 } 1371 1372 if (ha->rx_tag != NULL) { 1373 bus_dma_tag_destroy(ha->rx_tag); 1374 ha->rx_tag = NULL; 1375 } 1376 1377 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1378 bzero((void *)ha->rx_jbuf, 1379 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1380 1381 for (i = 0; i < MAX_SDS_RINGS; i++) { 1382 ha->hw.sds[i].sdsr_next = 0; 1383 ha->hw.sds[i].rxb_free = NULL; 1384 ha->hw.sds[i].rx_free = 0; 1385 ha->hw.sds[i].rxjb_free = NULL; 1386 ha->hw.sds[i].rxj_free = 0; 1387 } 1388 1389 return; 1390 } 1391 1392 int 1393 qla_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp, 1394 uint32_t jumbo) 1395 { 1396 register struct mbuf *mp = nmp; 1397 struct ifnet *ifp; 1398 int ret = 0; 1399 uint32_t offset; 1400 1401 QL_DPRINT2((ha->pci_dev, "%s: jumbo(0x%x) enter\n", __func__, jumbo)); 1402 1403 ifp = ha->ifp; 1404 1405 if (mp == NULL) { 1406 1407 if (!jumbo) { 1408 mp = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1409 1410 if (mp == NULL) { 1411 ha->err_m_getcl++; 1412 ret = ENOBUFS; 1413 device_printf(ha->pci_dev, 1414 "%s: m_getcl failed\n", __func__); 1415 goto exit_qla_get_mbuf; 1416 } 1417 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1418 } else { 1419 mp = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, 1420 MJUM9BYTES); 1421 if (mp == NULL) { 1422 ha->err_m_getjcl++; 1423 ret = ENOBUFS; 1424 device_printf(ha->pci_dev, 1425 "%s: m_getjcl failed\n", __func__); 1426 goto exit_qla_get_mbuf; 1427 } 1428 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1429 } 1430 } else { 1431 if (!jumbo) 1432 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1433 else 1434 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1435 1436 mp->m_data = mp->m_ext.ext_buf; 1437 mp->m_next = NULL; 1438 } 1439 1440 1441 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1442 if (offset) { 1443 offset = 8 - offset; 1444 m_adj(mp, offset); 1445 } 1446 1447 /* 1448 * Using memory from the mbuf cluster pool, invoke the bus_dma 1449 * machinery to arrange the memory mapping. 1450 */ 1451 ret = bus_dmamap_load(ha->rx_tag, rxb->map, 1452 mtod(mp, void *), mp->m_len, 1453 qla_dmamap_callback, &rxb->paddr, 1454 BUS_DMA_NOWAIT); 1455 if (ret || !rxb->paddr) { 1456 m_free(mp); 1457 rxb->m_head = NULL; 1458 device_printf(ha->pci_dev, 1459 "%s: bus_dmamap_load failed\n", __func__); 1460 ret = -1; 1461 goto exit_qla_get_mbuf; 1462 } 1463 rxb->m_head = mp; 1464 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1465 1466 exit_qla_get_mbuf: 1467 QL_DPRINT2((ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1468 return (ret); 1469 } 1470 1471 static void 1472 qla_tx_done(void *context, int pending) 1473 { 1474 qla_host_t *ha = context; 1475 1476 qla_hw_tx_done(ha); 1477 qla_start(ha->ifp); 1478 } 1479 1480