1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011-2013 Qlogic Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * File: qla_os.c 32 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 #include "qla_os.h" 39 #include "qla_reg.h" 40 #include "qla_hw.h" 41 #include "qla_def.h" 42 #include "qla_inline.h" 43 #include "qla_ver.h" 44 #include "qla_glbl.h" 45 #include "qla_dbg.h" 46 47 /* 48 * Some PCI Configuration Space Related Defines 49 */ 50 51 #ifndef PCI_VENDOR_QLOGIC 52 #define PCI_VENDOR_QLOGIC 0x1077 53 #endif 54 55 #ifndef PCI_PRODUCT_QLOGIC_ISP8020 56 #define PCI_PRODUCT_QLOGIC_ISP8020 0x8020 57 #endif 58 59 #define PCI_QLOGIC_ISP8020 \ 60 ((PCI_PRODUCT_QLOGIC_ISP8020 << 16) | PCI_VENDOR_QLOGIC) 61 62 /* 63 * static functions 64 */ 65 static int qla_alloc_parent_dma_tag(qla_host_t *ha); 66 static void qla_free_parent_dma_tag(qla_host_t *ha); 67 static int qla_alloc_xmt_bufs(qla_host_t *ha); 68 static void qla_free_xmt_bufs(qla_host_t *ha); 69 static int qla_alloc_rcv_bufs(qla_host_t *ha); 70 static void qla_free_rcv_bufs(qla_host_t *ha); 71 72 static void qla_init_ifnet(device_t dev, qla_host_t *ha); 73 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 74 static void qla_release(qla_host_t *ha); 75 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 76 int error); 77 static void qla_stop(qla_host_t *ha); 78 static int qla_send(qla_host_t *ha, struct mbuf **m_headp); 79 static void qla_tx_done(void *context, int pending); 80 81 /* 82 * Hooks to the Operating Systems 83 */ 84 static int qla_pci_probe (device_t); 85 static int qla_pci_attach (device_t); 86 static int qla_pci_detach (device_t); 87 88 static void qla_init(void *arg); 89 static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 90 static int qla_media_change(struct ifnet *ifp); 91 static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 92 93 static device_method_t qla_pci_methods[] = { 94 /* Device interface */ 95 DEVMETHOD(device_probe, qla_pci_probe), 96 DEVMETHOD(device_attach, qla_pci_attach), 97 DEVMETHOD(device_detach, qla_pci_detach), 98 { 0, 0 } 99 }; 100 101 static driver_t qla_pci_driver = { 102 "ql", qla_pci_methods, sizeof (qla_host_t), 103 }; 104 105 static devclass_t qla80xx_devclass; 106 107 DRIVER_MODULE(qla80xx, pci, qla_pci_driver, qla80xx_devclass, 0, 0); 108 109 MODULE_DEPEND(qla80xx, pci, 1, 1, 1); 110 MODULE_DEPEND(qla80xx, ether, 1, 1, 1); 111 112 MALLOC_DEFINE(M_QLA8XXXBUF, "qla80xxbuf", "Buffers for qla80xx driver"); 113 114 uint32_t std_replenish = 8; 115 uint32_t jumbo_replenish = 2; 116 uint32_t rcv_pkt_thres = 128; 117 uint32_t rcv_pkt_thres_d = 32; 118 uint32_t snd_pkt_thres = 16; 119 uint32_t free_pkt_thres = (NUM_TX_DESCRIPTORS / 2); 120 121 static char dev_str[64]; 122 123 /* 124 * Name: qla_pci_probe 125 * Function: Validate the PCI device to be a QLA80XX device 126 */ 127 static int 128 qla_pci_probe(device_t dev) 129 { 130 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 131 case PCI_QLOGIC_ISP8020: 132 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 133 "Qlogic ISP 80xx PCI CNA Adapter-Ethernet Function", 134 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 135 QLA_VERSION_BUILD); 136 device_set_desc(dev, dev_str); 137 break; 138 default: 139 return (ENXIO); 140 } 141 142 if (bootverbose) 143 printf("%s: %s\n ", __func__, dev_str); 144 145 return (BUS_PROBE_DEFAULT); 146 } 147 148 static void 149 qla_add_sysctls(qla_host_t *ha) 150 { 151 device_t dev = ha->pci_dev; 152 153 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 154 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 155 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 156 (void *)ha, 0, qla_sysctl_get_stats, "I", "Statistics"); 157 158 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 159 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 160 OID_AUTO, "fw_version", CTLFLAG_RD, 161 ha->fw_ver_str, 0, "firmware version"); 162 163 dbg_level = 0; 164 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 165 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 166 OID_AUTO, "debug", CTLFLAG_RW, 167 &dbg_level, dbg_level, "Debug Level"); 168 169 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 170 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 171 OID_AUTO, "std_replenish", CTLFLAG_RW, 172 &std_replenish, std_replenish, 173 "Threshold for Replenishing Standard Frames"); 174 175 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 176 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 177 OID_AUTO, "jumbo_replenish", CTLFLAG_RW, 178 &jumbo_replenish, jumbo_replenish, 179 "Threshold for Replenishing Jumbo Frames"); 180 181 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 182 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 183 OID_AUTO, "rcv_pkt_thres", CTLFLAG_RW, 184 &rcv_pkt_thres, rcv_pkt_thres, 185 "Threshold for # of rcv pkts to trigger indication isr"); 186 187 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 188 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 189 OID_AUTO, "rcv_pkt_thres_d", CTLFLAG_RW, 190 &rcv_pkt_thres_d, rcv_pkt_thres_d, 191 "Threshold for # of rcv pkts to trigger indication defered"); 192 193 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 194 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 195 OID_AUTO, "snd_pkt_thres", CTLFLAG_RW, 196 &snd_pkt_thres, snd_pkt_thres, 197 "Threshold for # of snd packets"); 198 199 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 200 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 201 OID_AUTO, "free_pkt_thres", CTLFLAG_RW, 202 &free_pkt_thres, free_pkt_thres, 203 "Threshold for # of packets to free at a time"); 204 205 return; 206 } 207 208 static void 209 qla_watchdog(void *arg) 210 { 211 qla_host_t *ha = arg; 212 qla_hw_t *hw; 213 struct ifnet *ifp; 214 215 hw = &ha->hw; 216 ifp = ha->ifp; 217 218 if (ha->flags.qla_watchdog_exit) 219 return; 220 221 if (!ha->flags.qla_watchdog_pause) { 222 if (qla_le32_to_host(*(hw->tx_cons)) != hw->txr_comp) { 223 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 224 } else if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 225 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 226 } 227 } 228 ha->watchdog_ticks = (ha->watchdog_ticks + 1) % 1000; 229 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 230 qla_watchdog, ha); 231 } 232 233 /* 234 * Name: qla_pci_attach 235 * Function: attaches the device to the operating system 236 */ 237 static int 238 qla_pci_attach(device_t dev) 239 { 240 qla_host_t *ha = NULL; 241 uint32_t rsrc_len, i; 242 243 QL_DPRINT2((dev, "%s: enter\n", __func__)); 244 245 if ((ha = device_get_softc(dev)) == NULL) { 246 device_printf(dev, "cannot get softc\n"); 247 return (ENOMEM); 248 } 249 250 memset(ha, 0, sizeof (qla_host_t)); 251 252 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8020) { 253 device_printf(dev, "device is not ISP8020\n"); 254 return (ENXIO); 255 } 256 257 ha->pci_func = pci_get_function(dev); 258 259 ha->pci_dev = dev; 260 261 pci_enable_busmaster(dev); 262 263 ha->reg_rid = PCIR_BAR(0); 264 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 265 RF_ACTIVE); 266 267 if (ha->pci_reg == NULL) { 268 device_printf(dev, "unable to map any ports\n"); 269 goto qla_pci_attach_err; 270 } 271 272 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 273 ha->reg_rid); 274 275 mtx_init(&ha->hw_lock, "qla80xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 276 mtx_init(&ha->tx_lock, "qla80xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 277 mtx_init(&ha->rx_lock, "qla80xx_rx_lock", MTX_NETWORK_LOCK, MTX_DEF); 278 mtx_init(&ha->rxj_lock, "qla80xx_rxj_lock", MTX_NETWORK_LOCK, MTX_DEF); 279 ha->flags.lock_init = 1; 280 281 ha->msix_count = pci_msix_count(dev); 282 283 if (ha->msix_count < qla_get_msix_count(ha)) { 284 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 285 ha->msix_count); 286 goto qla_pci_attach_err; 287 } 288 289 QL_DPRINT2((dev, "%s: ha %p irq %p pci_func 0x%x rsrc_count 0x%08x" 290 " msix_count 0x%x pci_reg %p\n", __func__, ha, 291 ha->irq, ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg)); 292 293 ha->msix_count = qla_get_msix_count(ha); 294 295 if (pci_alloc_msix(dev, &ha->msix_count)) { 296 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 297 ha->msix_count); 298 ha->msix_count = 0; 299 goto qla_pci_attach_err; 300 } 301 302 TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha); 303 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 304 taskqueue_thread_enqueue, &ha->tx_tq); 305 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 306 device_get_nameunit(ha->pci_dev)); 307 308 for (i = 0; i < ha->msix_count; i++) { 309 ha->irq_vec[i].irq_rid = i+1; 310 ha->irq_vec[i].ha = ha; 311 312 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 313 &ha->irq_vec[i].irq_rid, 314 (RF_ACTIVE | RF_SHAREABLE)); 315 316 if (ha->irq_vec[i].irq == NULL) { 317 device_printf(dev, "could not allocate interrupt\n"); 318 goto qla_pci_attach_err; 319 } 320 321 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 322 (INTR_TYPE_NET | INTR_MPSAFE), 323 NULL, qla_isr, &ha->irq_vec[i], 324 &ha->irq_vec[i].handle)) { 325 device_printf(dev, "could not setup interrupt\n"); 326 goto qla_pci_attach_err; 327 } 328 329 TASK_INIT(&ha->irq_vec[i].rcv_task, 0, qla_rcv,\ 330 &ha->irq_vec[i]); 331 332 ha->irq_vec[i].rcv_tq = taskqueue_create_fast("qla_rcvq", 333 M_NOWAIT, taskqueue_thread_enqueue, 334 &ha->irq_vec[i].rcv_tq); 335 336 taskqueue_start_threads(&ha->irq_vec[i].rcv_tq, 1, PI_NET, 337 "%s rcvq", 338 device_get_nameunit(ha->pci_dev)); 339 } 340 341 qla_add_sysctls(ha); 342 343 /* add hardware specific sysctls */ 344 qla_hw_add_sysctls(ha); 345 346 /* initialize hardware */ 347 if (qla_init_hw(ha)) { 348 device_printf(dev, "%s: qla_init_hw failed\n", __func__); 349 goto qla_pci_attach_err; 350 } 351 352 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 353 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 354 ha->fw_ver_build); 355 356 snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d", 357 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 358 ha->fw_ver_build); 359 360 //qla_get_hw_caps(ha); 361 qla_read_mac_addr(ha); 362 363 /* allocate parent dma tag */ 364 if (qla_alloc_parent_dma_tag(ha)) { 365 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 366 __func__); 367 goto qla_pci_attach_err; 368 } 369 370 /* alloc all dma buffers */ 371 if (qla_alloc_dma(ha)) { 372 device_printf(dev, "%s: qla_alloc_dma failed\n", __func__); 373 goto qla_pci_attach_err; 374 } 375 376 /* create the o.s ethernet interface */ 377 qla_init_ifnet(dev, ha); 378 379 ha->flags.qla_watchdog_active = 1; 380 ha->flags.qla_watchdog_pause = 1; 381 382 callout_init(&ha->tx_callout, 1); 383 384 /* create ioctl device interface */ 385 if (qla_make_cdev(ha)) { 386 device_printf(dev, "%s: qla_make_cdev failed\n", __func__); 387 goto qla_pci_attach_err; 388 } 389 390 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 391 qla_watchdog, ha); 392 393 QL_DPRINT2((dev, "%s: exit 0\n", __func__)); 394 return (0); 395 396 qla_pci_attach_err: 397 398 qla_release(ha); 399 400 QL_DPRINT2((dev, "%s: exit ENXIO\n", __func__)); 401 return (ENXIO); 402 } 403 404 /* 405 * Name: qla_pci_detach 406 * Function: Unhooks the device from the operating system 407 */ 408 static int 409 qla_pci_detach(device_t dev) 410 { 411 qla_host_t *ha = NULL; 412 int i; 413 414 QL_DPRINT2((dev, "%s: enter\n", __func__)); 415 416 if ((ha = device_get_softc(dev)) == NULL) { 417 device_printf(dev, "cannot get softc\n"); 418 return (ENOMEM); 419 } 420 421 QLA_LOCK(ha, __func__); 422 qla_stop(ha); 423 QLA_UNLOCK(ha, __func__); 424 425 if (ha->tx_tq) { 426 taskqueue_drain(ha->tx_tq, &ha->tx_task); 427 taskqueue_free(ha->tx_tq); 428 } 429 430 for (i = 0; i < ha->msix_count; i++) { 431 taskqueue_drain(ha->irq_vec[i].rcv_tq, 432 &ha->irq_vec[i].rcv_task); 433 taskqueue_free(ha->irq_vec[i].rcv_tq); 434 } 435 436 qla_release(ha); 437 438 QL_DPRINT2((dev, "%s: exit\n", __func__)); 439 440 return (0); 441 } 442 443 /* 444 * SYSCTL Related Callbacks 445 */ 446 static int 447 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 448 { 449 int err, ret = 0; 450 qla_host_t *ha; 451 452 err = sysctl_handle_int(oidp, &ret, 0, req); 453 454 if (err) 455 return (err); 456 457 ha = (qla_host_t *)arg1; 458 //qla_get_stats(ha); 459 QL_DPRINT2((ha->pci_dev, "%s: called ret %d\n", __func__, ret)); 460 return (err); 461 } 462 463 /* 464 * Name: qla_release 465 * Function: Releases the resources allocated for the device 466 */ 467 static void 468 qla_release(qla_host_t *ha) 469 { 470 device_t dev; 471 int i; 472 473 dev = ha->pci_dev; 474 475 qla_del_cdev(ha); 476 477 if (ha->flags.qla_watchdog_active) 478 ha->flags.qla_watchdog_exit = 1; 479 480 callout_stop(&ha->tx_callout); 481 qla_mdelay(__func__, 100); 482 483 if (ha->ifp != NULL) 484 ether_ifdetach(ha->ifp); 485 486 qla_free_dma(ha); 487 qla_free_parent_dma_tag(ha); 488 489 for (i = 0; i < ha->msix_count; i++) { 490 if (ha->irq_vec[i].handle) 491 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 492 ha->irq_vec[i].handle); 493 if (ha->irq_vec[i].irq) 494 (void) bus_release_resource(dev, SYS_RES_IRQ, 495 ha->irq_vec[i].irq_rid, 496 ha->irq_vec[i].irq); 497 } 498 if (ha->msix_count) 499 pci_release_msi(dev); 500 501 if (ha->flags.lock_init) { 502 mtx_destroy(&ha->tx_lock); 503 mtx_destroy(&ha->rx_lock); 504 mtx_destroy(&ha->rxj_lock); 505 mtx_destroy(&ha->hw_lock); 506 } 507 508 if (ha->pci_reg) 509 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 510 ha->pci_reg); 511 } 512 513 /* 514 * DMA Related Functions 515 */ 516 517 static void 518 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 519 { 520 *((bus_addr_t *)arg) = 0; 521 522 if (error) { 523 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 524 return; 525 } 526 527 QL_ASSERT((nsegs == 1), ("%s: %d segments returned!", __func__, nsegs)); 528 529 *((bus_addr_t *)arg) = segs[0].ds_addr; 530 531 return; 532 } 533 534 int 535 qla_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 536 { 537 int ret = 0; 538 device_t dev; 539 bus_addr_t b_addr; 540 541 dev = ha->pci_dev; 542 543 QL_DPRINT2((dev, "%s: enter\n", __func__)); 544 545 ret = bus_dma_tag_create( 546 ha->parent_tag,/* parent */ 547 dma_buf->alignment, 548 ((bus_size_t)(1ULL << 32)),/* boundary */ 549 BUS_SPACE_MAXADDR, /* lowaddr */ 550 BUS_SPACE_MAXADDR, /* highaddr */ 551 NULL, NULL, /* filter, filterarg */ 552 dma_buf->size, /* maxsize */ 553 1, /* nsegments */ 554 dma_buf->size, /* maxsegsize */ 555 0, /* flags */ 556 NULL, NULL, /* lockfunc, lockarg */ 557 &dma_buf->dma_tag); 558 559 if (ret) { 560 device_printf(dev, "%s: could not create dma tag\n", __func__); 561 goto qla_alloc_dmabuf_exit; 562 } 563 ret = bus_dmamem_alloc(dma_buf->dma_tag, 564 (void **)&dma_buf->dma_b, 565 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 566 &dma_buf->dma_map); 567 if (ret) { 568 bus_dma_tag_destroy(dma_buf->dma_tag); 569 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 570 goto qla_alloc_dmabuf_exit; 571 } 572 573 ret = bus_dmamap_load(dma_buf->dma_tag, 574 dma_buf->dma_map, 575 dma_buf->dma_b, 576 dma_buf->size, 577 qla_dmamap_callback, 578 &b_addr, BUS_DMA_NOWAIT); 579 580 if (ret || !b_addr) { 581 bus_dma_tag_destroy(dma_buf->dma_tag); 582 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 583 dma_buf->dma_map); 584 ret = -1; 585 goto qla_alloc_dmabuf_exit; 586 } 587 588 dma_buf->dma_addr = b_addr; 589 590 qla_alloc_dmabuf_exit: 591 QL_DPRINT2((dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 592 __func__, ret, (void *)dma_buf->dma_tag, 593 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 594 dma_buf->size)); 595 596 return ret; 597 } 598 599 void 600 qla_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 601 { 602 bus_dmamap_unload(dma_buf->dma_tag, dma_buf->dma_map); 603 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 604 bus_dma_tag_destroy(dma_buf->dma_tag); 605 } 606 607 static int 608 qla_alloc_parent_dma_tag(qla_host_t *ha) 609 { 610 int ret; 611 device_t dev; 612 613 dev = ha->pci_dev; 614 615 /* 616 * Allocate parent DMA Tag 617 */ 618 ret = bus_dma_tag_create( 619 bus_get_dma_tag(dev), /* parent */ 620 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 621 BUS_SPACE_MAXADDR, /* lowaddr */ 622 BUS_SPACE_MAXADDR, /* highaddr */ 623 NULL, NULL, /* filter, filterarg */ 624 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 625 0, /* nsegments */ 626 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 627 0, /* flags */ 628 NULL, NULL, /* lockfunc, lockarg */ 629 &ha->parent_tag); 630 631 if (ret) { 632 device_printf(dev, "%s: could not create parent dma tag\n", 633 __func__); 634 return (-1); 635 } 636 637 ha->flags.parent_tag = 1; 638 639 return (0); 640 } 641 642 static void 643 qla_free_parent_dma_tag(qla_host_t *ha) 644 { 645 if (ha->flags.parent_tag) { 646 bus_dma_tag_destroy(ha->parent_tag); 647 ha->flags.parent_tag = 0; 648 } 649 } 650 651 /* 652 * Name: qla_init_ifnet 653 * Function: Creates the Network Device Interface and Registers it with the O.S 654 */ 655 656 static void 657 qla_init_ifnet(device_t dev, qla_host_t *ha) 658 { 659 struct ifnet *ifp; 660 661 QL_DPRINT2((dev, "%s: enter\n", __func__)); 662 663 ifp = ha->ifp = if_alloc(IFT_ETHER); 664 665 if (ifp == NULL) 666 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 667 668 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 669 670 ifp->if_mtu = ETHERMTU; 671 ifp->if_baudrate = IF_Gbps(10); 672 ifp->if_init = qla_init; 673 ifp->if_softc = ha; 674 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 675 ifp->if_ioctl = qla_ioctl; 676 ifp->if_start = qla_start; 677 678 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha)); 679 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha); 680 IFQ_SET_READY(&ifp->if_snd); 681 682 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 683 684 ether_ifattach(ifp, qla_get_mac_addr(ha)); 685 686 ifp->if_capabilities = IFCAP_HWCSUM | 687 IFCAP_TSO4 | 688 IFCAP_JUMBO_MTU; 689 690 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 691 ifp->if_capabilities |= IFCAP_LINKSTATE; 692 693 #if defined(__FreeBSD_version) && (__FreeBSD_version < 900002) 694 ifp->if_timer = 0; 695 ifp->if_watchdog = NULL; 696 #endif /* #if defined(__FreeBSD_version) && (__FreeBSD_version < 900002) */ 697 698 ifp->if_capenable = ifp->if_capabilities; 699 700 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 701 702 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 703 704 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 705 NULL); 706 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 707 708 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 709 710 QL_DPRINT2((dev, "%s: exit\n", __func__)); 711 712 return; 713 } 714 715 static void 716 qla_init_locked(qla_host_t *ha) 717 { 718 struct ifnet *ifp = ha->ifp; 719 720 qla_stop(ha); 721 722 if (qla_alloc_xmt_bufs(ha) != 0) 723 return; 724 725 if (qla_alloc_rcv_bufs(ha) != 0) 726 return; 727 728 if (qla_config_lro(ha)) 729 return; 730 731 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 732 733 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO; 734 735 ha->flags.stop_rcv = 0; 736 if (qla_init_hw_if(ha) == 0) { 737 ifp = ha->ifp; 738 ifp->if_drv_flags |= IFF_DRV_RUNNING; 739 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 740 ha->flags.qla_watchdog_pause = 0; 741 } 742 743 return; 744 } 745 746 static void 747 qla_init(void *arg) 748 { 749 qla_host_t *ha; 750 751 ha = (qla_host_t *)arg; 752 753 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 754 755 QLA_LOCK(ha, __func__); 756 qla_init_locked(ha); 757 QLA_UNLOCK(ha, __func__); 758 759 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 760 } 761 762 static u_int 763 qla_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int mcnt) 764 { 765 uint8_t *mta = arg; 766 767 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 768 return (0); 769 bcopy(LLADDR(sdl), &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 770 771 return (1); 772 } 773 774 static void 775 qla_set_multi(qla_host_t *ha, uint32_t add_multi) 776 { 777 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 778 struct ifnet *ifp = ha->ifp; 779 int mcnt; 780 781 mcnt = if_foreach_llmaddr(ifp, qla_copy_maddr, mta); 782 qla_hw_set_multi(ha, mta, mcnt, add_multi); 783 784 return; 785 } 786 787 static int 788 qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 789 { 790 int ret = 0; 791 struct ifreq *ifr = (struct ifreq *)data; 792 struct ifaddr *ifa = (struct ifaddr *)data; 793 qla_host_t *ha; 794 795 ha = (qla_host_t *)ifp->if_softc; 796 797 switch (cmd) { 798 case SIOCSIFADDR: 799 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 800 __func__, cmd)); 801 802 if (ifa->ifa_addr->sa_family == AF_INET) { 803 ifp->if_flags |= IFF_UP; 804 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 805 QLA_LOCK(ha, __func__); 806 qla_init_locked(ha); 807 QLA_UNLOCK(ha, __func__); 808 } 809 QL_DPRINT4((ha->pci_dev, 810 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 811 __func__, cmd, ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 812 813 arp_ifinit(ifp, ifa); 814 if (ntohl(IA_SIN(ifa)->sin_addr.s_addr) != INADDR_ANY) { 815 qla_config_ipv4_addr(ha, 816 (IA_SIN(ifa)->sin_addr.s_addr)); 817 } 818 } else { 819 ether_ioctl(ifp, cmd, data); 820 } 821 break; 822 823 case SIOCSIFMTU: 824 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 825 __func__, cmd)); 826 827 if (ifr->ifr_mtu > QLA_MAX_FRAME_SIZE - ETHER_HDR_LEN) { 828 ret = EINVAL; 829 } else { 830 QLA_LOCK(ha, __func__); 831 ifp->if_mtu = ifr->ifr_mtu; 832 ha->max_frame_size = 833 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 834 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 835 ret = qla_set_max_mtu(ha, ha->max_frame_size, 836 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 837 } 838 QLA_UNLOCK(ha, __func__); 839 840 if (ret) 841 ret = EINVAL; 842 } 843 844 break; 845 846 case SIOCSIFFLAGS: 847 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 848 __func__, cmd)); 849 850 if (ifp->if_flags & IFF_UP) { 851 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 852 if ((ifp->if_flags ^ ha->if_flags) & 853 IFF_PROMISC) { 854 qla_set_promisc(ha); 855 } else if ((ifp->if_flags ^ ha->if_flags) & 856 IFF_ALLMULTI) { 857 qla_set_allmulti(ha); 858 } 859 } else { 860 QLA_LOCK(ha, __func__); 861 qla_init_locked(ha); 862 ha->max_frame_size = ifp->if_mtu + 863 ETHER_HDR_LEN + ETHER_CRC_LEN; 864 ret = qla_set_max_mtu(ha, ha->max_frame_size, 865 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 866 QLA_UNLOCK(ha, __func__); 867 } 868 } else { 869 QLA_LOCK(ha, __func__); 870 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 871 qla_stop(ha); 872 ha->if_flags = ifp->if_flags; 873 QLA_UNLOCK(ha, __func__); 874 } 875 break; 876 877 case SIOCADDMULTI: 878 QL_DPRINT4((ha->pci_dev, 879 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 880 881 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 882 qla_set_multi(ha, 1); 883 } 884 break; 885 886 case SIOCDELMULTI: 887 QL_DPRINT4((ha->pci_dev, 888 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 889 890 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 891 qla_set_multi(ha, 0); 892 } 893 break; 894 895 case SIOCSIFMEDIA: 896 case SIOCGIFMEDIA: 897 QL_DPRINT4((ha->pci_dev, 898 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 899 __func__, cmd)); 900 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 901 break; 902 903 case SIOCSIFCAP: 904 { 905 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 906 907 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 908 __func__, cmd)); 909 910 if (mask & IFCAP_HWCSUM) 911 ifp->if_capenable ^= IFCAP_HWCSUM; 912 if (mask & IFCAP_TSO4) 913 ifp->if_capenable ^= IFCAP_TSO4; 914 if (mask & IFCAP_TSO6) 915 ifp->if_capenable ^= IFCAP_TSO6; 916 if (mask & IFCAP_VLAN_HWTAGGING) 917 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 918 919 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 920 qla_init(ha); 921 922 VLAN_CAPABILITIES(ifp); 923 break; 924 } 925 926 default: 927 QL_DPRINT4((ha->pci_dev, "%s: default (0x%lx)\n", 928 __func__, cmd)); 929 ret = ether_ioctl(ifp, cmd, data); 930 break; 931 } 932 933 return (ret); 934 } 935 936 static int 937 qla_media_change(struct ifnet *ifp) 938 { 939 qla_host_t *ha; 940 struct ifmedia *ifm; 941 int ret = 0; 942 943 ha = (qla_host_t *)ifp->if_softc; 944 945 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 946 947 ifm = &ha->media; 948 949 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 950 ret = EINVAL; 951 952 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 953 954 return (ret); 955 } 956 957 static void 958 qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 959 { 960 qla_host_t *ha; 961 962 ha = (qla_host_t *)ifp->if_softc; 963 964 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 965 966 ifmr->ifm_status = IFM_AVALID; 967 ifmr->ifm_active = IFM_ETHER; 968 969 qla_update_link_state(ha); 970 if (ha->hw.flags.link_up) { 971 ifmr->ifm_status |= IFM_ACTIVE; 972 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 973 } 974 975 QL_DPRINT2((ha->pci_dev, "%s: exit (%s)\n", __func__,\ 976 (ha->hw.flags.link_up ? "link_up" : "link_down"))); 977 978 return; 979 } 980 981 void 982 qla_start(struct ifnet *ifp) 983 { 984 struct mbuf *m_head; 985 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 986 987 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 988 989 if (!mtx_trylock(&ha->tx_lock)) { 990 QL_DPRINT8((ha->pci_dev, 991 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 992 return; 993 } 994 995 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 996 IFF_DRV_RUNNING) { 997 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 998 QLA_TX_UNLOCK(ha); 999 return; 1000 } 1001 1002 if (!ha->watchdog_ticks) 1003 qla_update_link_state(ha); 1004 1005 if (!ha->hw.flags.link_up) { 1006 QL_DPRINT8((ha->pci_dev, "%s: link down\n", __func__)); 1007 QLA_TX_UNLOCK(ha); 1008 return; 1009 } 1010 1011 while (ifp->if_snd.ifq_head != NULL) { 1012 IF_DEQUEUE(&ifp->if_snd, m_head); 1013 1014 if (m_head == NULL) { 1015 QL_DPRINT8((ha->pci_dev, "%s: m_head == NULL\n", 1016 __func__)); 1017 break; 1018 } 1019 1020 if (qla_send(ha, &m_head)) { 1021 if (m_head == NULL) 1022 break; 1023 QL_DPRINT8((ha->pci_dev, "%s: PREPEND\n", __func__)); 1024 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1025 IF_PREPEND(&ifp->if_snd, m_head); 1026 break; 1027 } 1028 /* Send a copy of the frame to the BPF listener */ 1029 ETHER_BPF_MTAP(ifp, m_head); 1030 } 1031 QLA_TX_UNLOCK(ha); 1032 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1033 return; 1034 } 1035 1036 static int 1037 qla_send(qla_host_t *ha, struct mbuf **m_headp) 1038 { 1039 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1040 bus_dmamap_t map; 1041 int nsegs; 1042 int ret = -1; 1043 uint32_t tx_idx; 1044 struct mbuf *m_head = *m_headp; 1045 1046 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1047 1048 if ((ret = bus_dmamap_create(ha->tx_tag, BUS_DMA_NOWAIT, &map))) { 1049 ha->err_tx_dmamap_create++; 1050 device_printf(ha->pci_dev, 1051 "%s: bus_dmamap_create failed[%d, %d]\n", 1052 __func__, ret, m_head->m_pkthdr.len); 1053 return (ret); 1054 } 1055 1056 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1057 BUS_DMA_NOWAIT); 1058 1059 if (ret == EFBIG) { 1060 struct mbuf *m; 1061 1062 QL_DPRINT8((ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1063 m_head->m_pkthdr.len)); 1064 1065 m = m_defrag(m_head, M_NOWAIT); 1066 if (m == NULL) { 1067 ha->err_tx_defrag++; 1068 m_freem(m_head); 1069 *m_headp = NULL; 1070 device_printf(ha->pci_dev, 1071 "%s: m_defrag() = NULL [%d]\n", 1072 __func__, ret); 1073 return (ENOBUFS); 1074 } 1075 m_head = m; 1076 1077 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1078 segs, &nsegs, BUS_DMA_NOWAIT))) { 1079 ha->err_tx_dmamap_load++; 1080 1081 device_printf(ha->pci_dev, 1082 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1083 __func__, ret, m_head->m_pkthdr.len); 1084 1085 bus_dmamap_destroy(ha->tx_tag, map); 1086 if (ret != ENOMEM) { 1087 m_freem(m_head); 1088 *m_headp = NULL; 1089 } 1090 return (ret); 1091 } 1092 } else if (ret) { 1093 ha->err_tx_dmamap_load++; 1094 1095 device_printf(ha->pci_dev, 1096 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1097 __func__, ret, m_head->m_pkthdr.len); 1098 1099 bus_dmamap_destroy(ha->tx_tag, map); 1100 1101 if (ret != ENOMEM) { 1102 m_freem(m_head); 1103 *m_headp = NULL; 1104 } 1105 return (ret); 1106 } 1107 1108 QL_ASSERT((nsegs != 0), ("qla_send: empty packet")); 1109 1110 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1111 1112 if (!(ret = qla_hw_send(ha, segs, nsegs, &tx_idx, m_head))) { 1113 ha->tx_buf[tx_idx].m_head = m_head; 1114 ha->tx_buf[tx_idx].map = map; 1115 } else { 1116 if (ret == EINVAL) { 1117 m_freem(m_head); 1118 *m_headp = NULL; 1119 } 1120 } 1121 1122 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1123 return (ret); 1124 } 1125 1126 static void 1127 qla_stop(qla_host_t *ha) 1128 { 1129 struct ifnet *ifp = ha->ifp; 1130 1131 ha->flags.qla_watchdog_pause = 1; 1132 qla_mdelay(__func__, 100); 1133 1134 ha->flags.stop_rcv = 1; 1135 qla_hw_stop_rcv(ha); 1136 1137 qla_del_hw_if(ha); 1138 1139 qla_free_lro(ha); 1140 1141 qla_free_xmt_bufs(ha); 1142 qla_free_rcv_bufs(ha); 1143 1144 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1145 1146 return; 1147 } 1148 1149 /* 1150 * Buffer Management Functions for Transmit and Receive Rings 1151 */ 1152 static int 1153 qla_alloc_xmt_bufs(qla_host_t *ha) 1154 { 1155 if (bus_dma_tag_create(NULL, /* parent */ 1156 1, 0, /* alignment, bounds */ 1157 BUS_SPACE_MAXADDR, /* lowaddr */ 1158 BUS_SPACE_MAXADDR, /* highaddr */ 1159 NULL, NULL, /* filter, filterarg */ 1160 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1161 QLA_MAX_SEGMENTS, /* nsegments */ 1162 PAGE_SIZE, /* maxsegsize */ 1163 BUS_DMA_ALLOCNOW, /* flags */ 1164 NULL, /* lockfunc */ 1165 NULL, /* lockfuncarg */ 1166 &ha->tx_tag)) { 1167 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1168 __func__); 1169 return (ENOMEM); 1170 } 1171 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1172 1173 return 0; 1174 } 1175 1176 /* 1177 * Release mbuf after it sent on the wire 1178 */ 1179 static void 1180 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1181 { 1182 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1183 1184 if (txb->m_head) { 1185 bus_dmamap_unload(ha->tx_tag, txb->map); 1186 bus_dmamap_destroy(ha->tx_tag, txb->map); 1187 1188 m_freem(txb->m_head); 1189 txb->m_head = NULL; 1190 } 1191 1192 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1193 } 1194 1195 static void 1196 qla_free_xmt_bufs(qla_host_t *ha) 1197 { 1198 int i; 1199 1200 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1201 qla_clear_tx_buf(ha, &ha->tx_buf[i]); 1202 1203 if (ha->tx_tag != NULL) { 1204 bus_dma_tag_destroy(ha->tx_tag); 1205 ha->tx_tag = NULL; 1206 } 1207 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1208 1209 return; 1210 } 1211 1212 static int 1213 qla_alloc_rcv_bufs(qla_host_t *ha) 1214 { 1215 int i, j, ret = 0; 1216 qla_rx_buf_t *rxb; 1217 1218 if (bus_dma_tag_create(NULL, /* parent */ 1219 1, 0, /* alignment, bounds */ 1220 BUS_SPACE_MAXADDR, /* lowaddr */ 1221 BUS_SPACE_MAXADDR, /* highaddr */ 1222 NULL, NULL, /* filter, filterarg */ 1223 MJUM9BYTES, /* maxsize */ 1224 1, /* nsegments */ 1225 MJUM9BYTES, /* maxsegsize */ 1226 BUS_DMA_ALLOCNOW, /* flags */ 1227 NULL, /* lockfunc */ 1228 NULL, /* lockfuncarg */ 1229 &ha->rx_tag)) { 1230 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1231 __func__); 1232 1233 return (ENOMEM); 1234 } 1235 1236 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1237 bzero((void *)ha->rx_jbuf, 1238 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1239 1240 for (i = 0; i < MAX_SDS_RINGS; i++) { 1241 ha->hw.sds[i].sdsr_next = 0; 1242 ha->hw.sds[i].rxb_free = NULL; 1243 ha->hw.sds[i].rx_free = 0; 1244 ha->hw.sds[i].rxjb_free = NULL; 1245 ha->hw.sds[i].rxj_free = 0; 1246 } 1247 1248 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1249 rxb = &ha->rx_buf[i]; 1250 1251 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1252 1253 if (ret) { 1254 device_printf(ha->pci_dev, 1255 "%s: dmamap[%d] failed\n", __func__, i); 1256 1257 for (j = 0; j < i; j++) { 1258 bus_dmamap_destroy(ha->rx_tag, 1259 ha->rx_buf[j].map); 1260 } 1261 goto qla_alloc_rcv_bufs_failed; 1262 } 1263 } 1264 1265 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_NORMAL); 1266 1267 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1268 rxb = &ha->rx_buf[i]; 1269 rxb->handle = i; 1270 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 0))) { 1271 /* 1272 * set the physical address in the corresponding 1273 * descriptor entry in the receive ring/queue for the 1274 * hba 1275 */ 1276 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_NORMAL, i, 1277 rxb->handle, rxb->paddr, 1278 (rxb->m_head)->m_pkthdr.len); 1279 } else { 1280 device_printf(ha->pci_dev, 1281 "%s: qla_get_mbuf [standard(%d)] failed\n", 1282 __func__, i); 1283 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1284 goto qla_alloc_rcv_bufs_failed; 1285 } 1286 } 1287 1288 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1289 rxb = &ha->rx_jbuf[i]; 1290 1291 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1292 1293 if (ret) { 1294 device_printf(ha->pci_dev, 1295 "%s: dmamap[%d] failed\n", __func__, i); 1296 1297 for (j = 0; j < i; j++) { 1298 bus_dmamap_destroy(ha->rx_tag, 1299 ha->rx_jbuf[j].map); 1300 } 1301 goto qla_alloc_rcv_bufs_failed; 1302 } 1303 } 1304 1305 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_JUMBO); 1306 1307 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1308 rxb = &ha->rx_jbuf[i]; 1309 rxb->handle = i; 1310 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 1))) { 1311 /* 1312 * set the physical address in the corresponding 1313 * descriptor entry in the receive ring/queue for the 1314 * hba 1315 */ 1316 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_JUMBO, i, 1317 rxb->handle, rxb->paddr, 1318 (rxb->m_head)->m_pkthdr.len); 1319 } else { 1320 device_printf(ha->pci_dev, 1321 "%s: qla_get_mbuf [jumbo(%d)] failed\n", 1322 __func__, i); 1323 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1324 goto qla_alloc_rcv_bufs_failed; 1325 } 1326 } 1327 1328 return (0); 1329 1330 qla_alloc_rcv_bufs_failed: 1331 qla_free_rcv_bufs(ha); 1332 return (ret); 1333 } 1334 1335 static void 1336 qla_free_rcv_bufs(qla_host_t *ha) 1337 { 1338 int i; 1339 qla_rx_buf_t *rxb; 1340 1341 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1342 rxb = &ha->rx_buf[i]; 1343 if (rxb->m_head != NULL) { 1344 bus_dmamap_unload(ha->rx_tag, rxb->map); 1345 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1346 m_freem(rxb->m_head); 1347 rxb->m_head = NULL; 1348 } 1349 } 1350 1351 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1352 rxb = &ha->rx_jbuf[i]; 1353 if (rxb->m_head != NULL) { 1354 bus_dmamap_unload(ha->rx_tag, rxb->map); 1355 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1356 m_freem(rxb->m_head); 1357 rxb->m_head = NULL; 1358 } 1359 } 1360 1361 if (ha->rx_tag != NULL) { 1362 bus_dma_tag_destroy(ha->rx_tag); 1363 ha->rx_tag = NULL; 1364 } 1365 1366 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1367 bzero((void *)ha->rx_jbuf, 1368 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1369 1370 for (i = 0; i < MAX_SDS_RINGS; i++) { 1371 ha->hw.sds[i].sdsr_next = 0; 1372 ha->hw.sds[i].rxb_free = NULL; 1373 ha->hw.sds[i].rx_free = 0; 1374 ha->hw.sds[i].rxjb_free = NULL; 1375 ha->hw.sds[i].rxj_free = 0; 1376 } 1377 1378 return; 1379 } 1380 1381 int 1382 qla_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp, 1383 uint32_t jumbo) 1384 { 1385 struct mbuf *mp = nmp; 1386 int ret = 0; 1387 uint32_t offset; 1388 1389 QL_DPRINT2((ha->pci_dev, "%s: jumbo(0x%x) enter\n", __func__, jumbo)); 1390 1391 if (mp == NULL) { 1392 if (!jumbo) { 1393 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1394 1395 if (mp == NULL) { 1396 ha->err_m_getcl++; 1397 ret = ENOBUFS; 1398 device_printf(ha->pci_dev, 1399 "%s: m_getcl failed\n", __func__); 1400 goto exit_qla_get_mbuf; 1401 } 1402 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1403 } else { 1404 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, 1405 MJUM9BYTES); 1406 if (mp == NULL) { 1407 ha->err_m_getjcl++; 1408 ret = ENOBUFS; 1409 device_printf(ha->pci_dev, 1410 "%s: m_getjcl failed\n", __func__); 1411 goto exit_qla_get_mbuf; 1412 } 1413 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1414 } 1415 } else { 1416 if (!jumbo) 1417 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1418 else 1419 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1420 1421 mp->m_data = mp->m_ext.ext_buf; 1422 mp->m_next = NULL; 1423 } 1424 1425 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1426 if (offset) { 1427 offset = 8 - offset; 1428 m_adj(mp, offset); 1429 } 1430 1431 /* 1432 * Using memory from the mbuf cluster pool, invoke the bus_dma 1433 * machinery to arrange the memory mapping. 1434 */ 1435 ret = bus_dmamap_load(ha->rx_tag, rxb->map, 1436 mtod(mp, void *), mp->m_len, 1437 qla_dmamap_callback, &rxb->paddr, 1438 BUS_DMA_NOWAIT); 1439 if (ret || !rxb->paddr) { 1440 m_free(mp); 1441 rxb->m_head = NULL; 1442 device_printf(ha->pci_dev, 1443 "%s: bus_dmamap_load failed\n", __func__); 1444 ret = -1; 1445 goto exit_qla_get_mbuf; 1446 } 1447 rxb->m_head = mp; 1448 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1449 1450 exit_qla_get_mbuf: 1451 QL_DPRINT2((ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1452 return (ret); 1453 } 1454 1455 static void 1456 qla_tx_done(void *context, int pending) 1457 { 1458 qla_host_t *ha = context; 1459 1460 qla_hw_tx_done(ha); 1461 qla_start(ha->ifp); 1462 } 1463