1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011-2013 Qlogic Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * File: qla_os.c 32 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 #include "qla_os.h" 39 #include "qla_reg.h" 40 #include "qla_hw.h" 41 #include "qla_def.h" 42 #include "qla_inline.h" 43 #include "qla_ver.h" 44 #include "qla_glbl.h" 45 #include "qla_dbg.h" 46 47 /* 48 * Some PCI Configuration Space Related Defines 49 */ 50 51 #ifndef PCI_VENDOR_QLOGIC 52 #define PCI_VENDOR_QLOGIC 0x1077 53 #endif 54 55 #ifndef PCI_PRODUCT_QLOGIC_ISP8020 56 #define PCI_PRODUCT_QLOGIC_ISP8020 0x8020 57 #endif 58 59 #define PCI_QLOGIC_ISP8020 \ 60 ((PCI_PRODUCT_QLOGIC_ISP8020 << 16) | PCI_VENDOR_QLOGIC) 61 62 /* 63 * static functions 64 */ 65 static int qla_alloc_parent_dma_tag(qla_host_t *ha); 66 static void qla_free_parent_dma_tag(qla_host_t *ha); 67 static int qla_alloc_xmt_bufs(qla_host_t *ha); 68 static void qla_free_xmt_bufs(qla_host_t *ha); 69 static int qla_alloc_rcv_bufs(qla_host_t *ha); 70 static void qla_free_rcv_bufs(qla_host_t *ha); 71 72 static void qla_init_ifnet(device_t dev, qla_host_t *ha); 73 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 74 static void qla_release(qla_host_t *ha); 75 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 76 int error); 77 static void qla_stop(qla_host_t *ha); 78 static int qla_send(qla_host_t *ha, struct mbuf **m_headp); 79 static void qla_tx_done(void *context, int pending); 80 81 /* 82 * Hooks to the Operating Systems 83 */ 84 static int qla_pci_probe (device_t); 85 static int qla_pci_attach (device_t); 86 static int qla_pci_detach (device_t); 87 88 static void qla_init(void *arg); 89 static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 90 static int qla_media_change(struct ifnet *ifp); 91 static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr); 92 93 static device_method_t qla_pci_methods[] = { 94 /* Device interface */ 95 DEVMETHOD(device_probe, qla_pci_probe), 96 DEVMETHOD(device_attach, qla_pci_attach), 97 DEVMETHOD(device_detach, qla_pci_detach), 98 { 0, 0 } 99 }; 100 101 static driver_t qla_pci_driver = { 102 "ql", qla_pci_methods, sizeof (qla_host_t), 103 }; 104 105 static devclass_t qla80xx_devclass; 106 107 DRIVER_MODULE(qla80xx, pci, qla_pci_driver, qla80xx_devclass, 0, 0); 108 109 MODULE_DEPEND(qla80xx, pci, 1, 1, 1); 110 MODULE_DEPEND(qla80xx, ether, 1, 1, 1); 111 112 MALLOC_DEFINE(M_QLA8XXXBUF, "qla80xxbuf", "Buffers for qla80xx driver"); 113 114 uint32_t std_replenish = 8; 115 uint32_t jumbo_replenish = 2; 116 uint32_t rcv_pkt_thres = 128; 117 uint32_t rcv_pkt_thres_d = 32; 118 uint32_t snd_pkt_thres = 16; 119 uint32_t free_pkt_thres = (NUM_TX_DESCRIPTORS / 2); 120 121 static char dev_str[64]; 122 123 /* 124 * Name: qla_pci_probe 125 * Function: Validate the PCI device to be a QLA80XX device 126 */ 127 static int 128 qla_pci_probe(device_t dev) 129 { 130 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 131 case PCI_QLOGIC_ISP8020: 132 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 133 "Qlogic ISP 80xx PCI CNA Adapter-Ethernet Function", 134 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 135 QLA_VERSION_BUILD); 136 device_set_desc(dev, dev_str); 137 break; 138 default: 139 return (ENXIO); 140 } 141 142 if (bootverbose) 143 printf("%s: %s\n ", __func__, dev_str); 144 145 return (BUS_PROBE_DEFAULT); 146 } 147 148 static void 149 qla_add_sysctls(qla_host_t *ha) 150 { 151 device_t dev = ha->pci_dev; 152 153 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 154 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 155 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RD, 156 (void *)ha, 0, 157 qla_sysctl_get_stats, "I", "Statistics"); 158 159 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 160 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 161 OID_AUTO, "fw_version", CTLFLAG_RD, 162 ha->fw_ver_str, 0, "firmware version"); 163 164 dbg_level = 0; 165 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 166 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 167 OID_AUTO, "debug", CTLFLAG_RW, 168 &dbg_level, dbg_level, "Debug Level"); 169 170 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 171 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 172 OID_AUTO, "std_replenish", CTLFLAG_RW, 173 &std_replenish, std_replenish, 174 "Threshold for Replenishing Standard Frames"); 175 176 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 177 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 178 OID_AUTO, "jumbo_replenish", CTLFLAG_RW, 179 &jumbo_replenish, jumbo_replenish, 180 "Threshold for Replenishing Jumbo Frames"); 181 182 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 183 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 184 OID_AUTO, "rcv_pkt_thres", CTLFLAG_RW, 185 &rcv_pkt_thres, rcv_pkt_thres, 186 "Threshold for # of rcv pkts to trigger indication isr"); 187 188 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 189 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 190 OID_AUTO, "rcv_pkt_thres_d", CTLFLAG_RW, 191 &rcv_pkt_thres_d, rcv_pkt_thres_d, 192 "Threshold for # of rcv pkts to trigger indication defered"); 193 194 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 195 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 196 OID_AUTO, "snd_pkt_thres", CTLFLAG_RW, 197 &snd_pkt_thres, snd_pkt_thres, 198 "Threshold for # of snd packets"); 199 200 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 201 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 202 OID_AUTO, "free_pkt_thres", CTLFLAG_RW, 203 &free_pkt_thres, free_pkt_thres, 204 "Threshold for # of packets to free at a time"); 205 206 return; 207 } 208 209 static void 210 qla_watchdog(void *arg) 211 { 212 qla_host_t *ha = arg; 213 qla_hw_t *hw; 214 struct ifnet *ifp; 215 216 hw = &ha->hw; 217 ifp = ha->ifp; 218 219 if (ha->flags.qla_watchdog_exit) 220 return; 221 222 if (!ha->flags.qla_watchdog_pause) { 223 if (qla_le32_to_host(*(hw->tx_cons)) != hw->txr_comp) { 224 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 225 } else if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) { 226 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 227 } 228 } 229 ha->watchdog_ticks = (ha->watchdog_ticks + 1) % 1000; 230 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 231 qla_watchdog, ha); 232 } 233 234 /* 235 * Name: qla_pci_attach 236 * Function: attaches the device to the operating system 237 */ 238 static int 239 qla_pci_attach(device_t dev) 240 { 241 qla_host_t *ha = NULL; 242 uint32_t rsrc_len, i; 243 244 QL_DPRINT2((dev, "%s: enter\n", __func__)); 245 246 if ((ha = device_get_softc(dev)) == NULL) { 247 device_printf(dev, "cannot get softc\n"); 248 return (ENOMEM); 249 } 250 251 memset(ha, 0, sizeof (qla_host_t)); 252 253 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8020) { 254 device_printf(dev, "device is not ISP8020\n"); 255 return (ENXIO); 256 } 257 258 ha->pci_func = pci_get_function(dev); 259 260 ha->pci_dev = dev; 261 262 pci_enable_busmaster(dev); 263 264 ha->reg_rid = PCIR_BAR(0); 265 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 266 RF_ACTIVE); 267 268 if (ha->pci_reg == NULL) { 269 device_printf(dev, "unable to map any ports\n"); 270 goto qla_pci_attach_err; 271 } 272 273 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 274 ha->reg_rid); 275 276 mtx_init(&ha->hw_lock, "qla80xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 277 mtx_init(&ha->tx_lock, "qla80xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 278 mtx_init(&ha->rx_lock, "qla80xx_rx_lock", MTX_NETWORK_LOCK, MTX_DEF); 279 mtx_init(&ha->rxj_lock, "qla80xx_rxj_lock", MTX_NETWORK_LOCK, MTX_DEF); 280 ha->flags.lock_init = 1; 281 282 ha->msix_count = pci_msix_count(dev); 283 284 if (ha->msix_count < qla_get_msix_count(ha)) { 285 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 286 ha->msix_count); 287 goto qla_pci_attach_err; 288 } 289 290 QL_DPRINT2((dev, "%s: ha %p irq %p pci_func 0x%x rsrc_count 0x%08x" 291 " msix_count 0x%x pci_reg %p\n", __func__, ha, 292 ha->irq, ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg)); 293 294 ha->msix_count = qla_get_msix_count(ha); 295 296 if (pci_alloc_msix(dev, &ha->msix_count)) { 297 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 298 ha->msix_count); 299 ha->msix_count = 0; 300 goto qla_pci_attach_err; 301 } 302 303 TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha); 304 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 305 taskqueue_thread_enqueue, &ha->tx_tq); 306 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 307 device_get_nameunit(ha->pci_dev)); 308 309 for (i = 0; i < ha->msix_count; i++) { 310 ha->irq_vec[i].irq_rid = i+1; 311 ha->irq_vec[i].ha = ha; 312 313 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 314 &ha->irq_vec[i].irq_rid, 315 (RF_ACTIVE | RF_SHAREABLE)); 316 317 if (ha->irq_vec[i].irq == NULL) { 318 device_printf(dev, "could not allocate interrupt\n"); 319 goto qla_pci_attach_err; 320 } 321 322 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 323 (INTR_TYPE_NET | INTR_MPSAFE), 324 NULL, qla_isr, &ha->irq_vec[i], 325 &ha->irq_vec[i].handle)) { 326 device_printf(dev, "could not setup interrupt\n"); 327 goto qla_pci_attach_err; 328 } 329 330 TASK_INIT(&ha->irq_vec[i].rcv_task, 0, qla_rcv,\ 331 &ha->irq_vec[i]); 332 333 ha->irq_vec[i].rcv_tq = taskqueue_create_fast("qla_rcvq", 334 M_NOWAIT, taskqueue_thread_enqueue, 335 &ha->irq_vec[i].rcv_tq); 336 337 taskqueue_start_threads(&ha->irq_vec[i].rcv_tq, 1, PI_NET, 338 "%s rcvq", 339 device_get_nameunit(ha->pci_dev)); 340 } 341 342 qla_add_sysctls(ha); 343 344 /* add hardware specific sysctls */ 345 qla_hw_add_sysctls(ha); 346 347 /* initialize hardware */ 348 if (qla_init_hw(ha)) { 349 device_printf(dev, "%s: qla_init_hw failed\n", __func__); 350 goto qla_pci_attach_err; 351 } 352 353 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 354 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 355 ha->fw_ver_build); 356 357 snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d", 358 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 359 ha->fw_ver_build); 360 361 //qla_get_hw_caps(ha); 362 qla_read_mac_addr(ha); 363 364 /* allocate parent dma tag */ 365 if (qla_alloc_parent_dma_tag(ha)) { 366 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 367 __func__); 368 goto qla_pci_attach_err; 369 } 370 371 /* alloc all dma buffers */ 372 if (qla_alloc_dma(ha)) { 373 device_printf(dev, "%s: qla_alloc_dma failed\n", __func__); 374 goto qla_pci_attach_err; 375 } 376 377 /* create the o.s ethernet interface */ 378 qla_init_ifnet(dev, ha); 379 380 ha->flags.qla_watchdog_active = 1; 381 ha->flags.qla_watchdog_pause = 1; 382 383 callout_init(&ha->tx_callout, 1); 384 385 /* create ioctl device interface */ 386 if (qla_make_cdev(ha)) { 387 device_printf(dev, "%s: qla_make_cdev failed\n", __func__); 388 goto qla_pci_attach_err; 389 } 390 391 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 392 qla_watchdog, ha); 393 394 QL_DPRINT2((dev, "%s: exit 0\n", __func__)); 395 return (0); 396 397 qla_pci_attach_err: 398 399 qla_release(ha); 400 401 QL_DPRINT2((dev, "%s: exit ENXIO\n", __func__)); 402 return (ENXIO); 403 } 404 405 /* 406 * Name: qla_pci_detach 407 * Function: Unhooks the device from the operating system 408 */ 409 static int 410 qla_pci_detach(device_t dev) 411 { 412 qla_host_t *ha = NULL; 413 struct ifnet *ifp; 414 int i; 415 416 QL_DPRINT2((dev, "%s: enter\n", __func__)); 417 418 if ((ha = device_get_softc(dev)) == NULL) { 419 device_printf(dev, "cannot get softc\n"); 420 return (ENOMEM); 421 } 422 423 ifp = ha->ifp; 424 425 QLA_LOCK(ha, __func__); 426 qla_stop(ha); 427 QLA_UNLOCK(ha, __func__); 428 429 if (ha->tx_tq) { 430 taskqueue_drain(ha->tx_tq, &ha->tx_task); 431 taskqueue_free(ha->tx_tq); 432 } 433 434 for (i = 0; i < ha->msix_count; i++) { 435 taskqueue_drain(ha->irq_vec[i].rcv_tq, 436 &ha->irq_vec[i].rcv_task); 437 taskqueue_free(ha->irq_vec[i].rcv_tq); 438 } 439 440 qla_release(ha); 441 442 QL_DPRINT2((dev, "%s: exit\n", __func__)); 443 444 return (0); 445 } 446 447 /* 448 * SYSCTL Related Callbacks 449 */ 450 static int 451 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 452 { 453 int err, ret = 0; 454 qla_host_t *ha; 455 456 err = sysctl_handle_int(oidp, &ret, 0, req); 457 458 if (err) 459 return (err); 460 461 ha = (qla_host_t *)arg1; 462 //qla_get_stats(ha); 463 QL_DPRINT2((ha->pci_dev, "%s: called ret %d\n", __func__, ret)); 464 return (err); 465 } 466 467 468 /* 469 * Name: qla_release 470 * Function: Releases the resources allocated for the device 471 */ 472 static void 473 qla_release(qla_host_t *ha) 474 { 475 device_t dev; 476 int i; 477 478 dev = ha->pci_dev; 479 480 qla_del_cdev(ha); 481 482 if (ha->flags.qla_watchdog_active) 483 ha->flags.qla_watchdog_exit = 1; 484 485 callout_stop(&ha->tx_callout); 486 qla_mdelay(__func__, 100); 487 488 if (ha->ifp != NULL) 489 ether_ifdetach(ha->ifp); 490 491 qla_free_dma(ha); 492 qla_free_parent_dma_tag(ha); 493 494 for (i = 0; i < ha->msix_count; i++) { 495 if (ha->irq_vec[i].handle) 496 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 497 ha->irq_vec[i].handle); 498 if (ha->irq_vec[i].irq) 499 (void) bus_release_resource(dev, SYS_RES_IRQ, 500 ha->irq_vec[i].irq_rid, 501 ha->irq_vec[i].irq); 502 } 503 if (ha->msix_count) 504 pci_release_msi(dev); 505 506 if (ha->flags.lock_init) { 507 mtx_destroy(&ha->tx_lock); 508 mtx_destroy(&ha->rx_lock); 509 mtx_destroy(&ha->rxj_lock); 510 mtx_destroy(&ha->hw_lock); 511 } 512 513 if (ha->pci_reg) 514 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 515 ha->pci_reg); 516 } 517 518 /* 519 * DMA Related Functions 520 */ 521 522 static void 523 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 524 { 525 *((bus_addr_t *)arg) = 0; 526 527 if (error) { 528 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 529 return; 530 } 531 532 QL_ASSERT((nsegs == 1), ("%s: %d segments returned!", __func__, nsegs)); 533 534 *((bus_addr_t *)arg) = segs[0].ds_addr; 535 536 return; 537 } 538 539 int 540 qla_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 541 { 542 int ret = 0; 543 device_t dev; 544 bus_addr_t b_addr; 545 546 dev = ha->pci_dev; 547 548 QL_DPRINT2((dev, "%s: enter\n", __func__)); 549 550 ret = bus_dma_tag_create( 551 ha->parent_tag,/* parent */ 552 dma_buf->alignment, 553 ((bus_size_t)(1ULL << 32)),/* boundary */ 554 BUS_SPACE_MAXADDR, /* lowaddr */ 555 BUS_SPACE_MAXADDR, /* highaddr */ 556 NULL, NULL, /* filter, filterarg */ 557 dma_buf->size, /* maxsize */ 558 1, /* nsegments */ 559 dma_buf->size, /* maxsegsize */ 560 0, /* flags */ 561 NULL, NULL, /* lockfunc, lockarg */ 562 &dma_buf->dma_tag); 563 564 if (ret) { 565 device_printf(dev, "%s: could not create dma tag\n", __func__); 566 goto qla_alloc_dmabuf_exit; 567 } 568 ret = bus_dmamem_alloc(dma_buf->dma_tag, 569 (void **)&dma_buf->dma_b, 570 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 571 &dma_buf->dma_map); 572 if (ret) { 573 bus_dma_tag_destroy(dma_buf->dma_tag); 574 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 575 goto qla_alloc_dmabuf_exit; 576 } 577 578 ret = bus_dmamap_load(dma_buf->dma_tag, 579 dma_buf->dma_map, 580 dma_buf->dma_b, 581 dma_buf->size, 582 qla_dmamap_callback, 583 &b_addr, BUS_DMA_NOWAIT); 584 585 if (ret || !b_addr) { 586 bus_dma_tag_destroy(dma_buf->dma_tag); 587 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 588 dma_buf->dma_map); 589 ret = -1; 590 goto qla_alloc_dmabuf_exit; 591 } 592 593 dma_buf->dma_addr = b_addr; 594 595 qla_alloc_dmabuf_exit: 596 QL_DPRINT2((dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 597 __func__, ret, (void *)dma_buf->dma_tag, 598 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 599 dma_buf->size)); 600 601 return ret; 602 } 603 604 void 605 qla_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 606 { 607 bus_dmamap_unload(dma_buf->dma_tag, dma_buf->dma_map); 608 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 609 bus_dma_tag_destroy(dma_buf->dma_tag); 610 } 611 612 static int 613 qla_alloc_parent_dma_tag(qla_host_t *ha) 614 { 615 int ret; 616 device_t dev; 617 618 dev = ha->pci_dev; 619 620 /* 621 * Allocate parent DMA Tag 622 */ 623 ret = bus_dma_tag_create( 624 bus_get_dma_tag(dev), /* parent */ 625 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 626 BUS_SPACE_MAXADDR, /* lowaddr */ 627 BUS_SPACE_MAXADDR, /* highaddr */ 628 NULL, NULL, /* filter, filterarg */ 629 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 630 0, /* nsegments */ 631 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 632 0, /* flags */ 633 NULL, NULL, /* lockfunc, lockarg */ 634 &ha->parent_tag); 635 636 if (ret) { 637 device_printf(dev, "%s: could not create parent dma tag\n", 638 __func__); 639 return (-1); 640 } 641 642 ha->flags.parent_tag = 1; 643 644 return (0); 645 } 646 647 static void 648 qla_free_parent_dma_tag(qla_host_t *ha) 649 { 650 if (ha->flags.parent_tag) { 651 bus_dma_tag_destroy(ha->parent_tag); 652 ha->flags.parent_tag = 0; 653 } 654 } 655 656 /* 657 * Name: qla_init_ifnet 658 * Function: Creates the Network Device Interface and Registers it with the O.S 659 */ 660 661 static void 662 qla_init_ifnet(device_t dev, qla_host_t *ha) 663 { 664 struct ifnet *ifp; 665 666 QL_DPRINT2((dev, "%s: enter\n", __func__)); 667 668 ifp = ha->ifp = if_alloc(IFT_ETHER); 669 670 if (ifp == NULL) 671 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 672 673 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 674 675 ifp->if_baudrate = IF_Gbps(10); 676 ifp->if_init = qla_init; 677 ifp->if_softc = ha; 678 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 679 ifp->if_ioctl = qla_ioctl; 680 ifp->if_start = qla_start; 681 682 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha)); 683 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha); 684 IFQ_SET_READY(&ifp->if_snd); 685 686 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 687 688 ether_ifattach(ifp, qla_get_mac_addr(ha)); 689 690 ifp->if_capabilities = IFCAP_HWCSUM | 691 IFCAP_TSO4 | 692 IFCAP_JUMBO_MTU; 693 694 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU; 695 ifp->if_capabilities |= IFCAP_LINKSTATE; 696 697 #if defined(__FreeBSD_version) && (__FreeBSD_version < 900002) 698 ifp->if_timer = 0; 699 ifp->if_watchdog = NULL; 700 #endif /* #if defined(__FreeBSD_version) && (__FreeBSD_version < 900002) */ 701 702 ifp->if_capenable = ifp->if_capabilities; 703 704 ifp->if_hdrlen = sizeof(struct ether_vlan_header); 705 706 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 707 708 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 709 NULL); 710 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 711 712 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 713 714 QL_DPRINT2((dev, "%s: exit\n", __func__)); 715 716 return; 717 } 718 719 static void 720 qla_init_locked(qla_host_t *ha) 721 { 722 struct ifnet *ifp = ha->ifp; 723 724 qla_stop(ha); 725 726 if (qla_alloc_xmt_bufs(ha) != 0) 727 return; 728 729 if (qla_alloc_rcv_bufs(ha) != 0) 730 return; 731 732 if (qla_config_lro(ha)) 733 return; 734 735 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 736 737 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO; 738 739 ha->flags.stop_rcv = 0; 740 if (qla_init_hw_if(ha) == 0) { 741 ifp = ha->ifp; 742 ifp->if_drv_flags |= IFF_DRV_RUNNING; 743 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 744 ha->flags.qla_watchdog_pause = 0; 745 } 746 747 return; 748 } 749 750 static void 751 qla_init(void *arg) 752 { 753 qla_host_t *ha; 754 755 ha = (qla_host_t *)arg; 756 757 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 758 759 QLA_LOCK(ha, __func__); 760 qla_init_locked(ha); 761 QLA_UNLOCK(ha, __func__); 762 763 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 764 } 765 766 static u_int 767 qla_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int mcnt) 768 { 769 uint8_t *mta = arg; 770 771 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 772 return (0); 773 bcopy(LLADDR(sdl), &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 774 775 return (1); 776 } 777 778 static void 779 qla_set_multi(qla_host_t *ha, uint32_t add_multi) 780 { 781 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 782 struct ifnet *ifp = ha->ifp; 783 int mcnt; 784 785 mcnt = if_foreach_llmaddr(ifp, qla_copy_maddr, mta); 786 qla_hw_set_multi(ha, mta, mcnt, add_multi); 787 788 return; 789 } 790 791 static int 792 qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 793 { 794 int ret = 0; 795 struct ifreq *ifr = (struct ifreq *)data; 796 struct ifaddr *ifa = (struct ifaddr *)data; 797 qla_host_t *ha; 798 799 ha = (qla_host_t *)ifp->if_softc; 800 801 switch (cmd) { 802 case SIOCSIFADDR: 803 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 804 __func__, cmd)); 805 806 if (ifa->ifa_addr->sa_family == AF_INET) { 807 ifp->if_flags |= IFF_UP; 808 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 809 QLA_LOCK(ha, __func__); 810 qla_init_locked(ha); 811 QLA_UNLOCK(ha, __func__); 812 } 813 QL_DPRINT4((ha->pci_dev, 814 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 815 __func__, cmd, ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 816 817 arp_ifinit(ifp, ifa); 818 if (ntohl(IA_SIN(ifa)->sin_addr.s_addr) != INADDR_ANY) { 819 qla_config_ipv4_addr(ha, 820 (IA_SIN(ifa)->sin_addr.s_addr)); 821 } 822 } else { 823 ether_ioctl(ifp, cmd, data); 824 } 825 break; 826 827 case SIOCSIFMTU: 828 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 829 __func__, cmd)); 830 831 if (ifr->ifr_mtu > QLA_MAX_FRAME_SIZE - ETHER_HDR_LEN) { 832 ret = EINVAL; 833 } else { 834 QLA_LOCK(ha, __func__); 835 ifp->if_mtu = ifr->ifr_mtu; 836 ha->max_frame_size = 837 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN; 838 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 839 ret = qla_set_max_mtu(ha, ha->max_frame_size, 840 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 841 } 842 QLA_UNLOCK(ha, __func__); 843 844 if (ret) 845 ret = EINVAL; 846 } 847 848 break; 849 850 case SIOCSIFFLAGS: 851 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 852 __func__, cmd)); 853 854 if (ifp->if_flags & IFF_UP) { 855 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) { 856 if ((ifp->if_flags ^ ha->if_flags) & 857 IFF_PROMISC) { 858 qla_set_promisc(ha); 859 } else if ((ifp->if_flags ^ ha->if_flags) & 860 IFF_ALLMULTI) { 861 qla_set_allmulti(ha); 862 } 863 } else { 864 QLA_LOCK(ha, __func__); 865 qla_init_locked(ha); 866 ha->max_frame_size = ifp->if_mtu + 867 ETHER_HDR_LEN + ETHER_CRC_LEN; 868 ret = qla_set_max_mtu(ha, ha->max_frame_size, 869 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 870 QLA_UNLOCK(ha, __func__); 871 } 872 } else { 873 QLA_LOCK(ha, __func__); 874 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 875 qla_stop(ha); 876 ha->if_flags = ifp->if_flags; 877 QLA_UNLOCK(ha, __func__); 878 } 879 break; 880 881 case SIOCADDMULTI: 882 QL_DPRINT4((ha->pci_dev, 883 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 884 885 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 886 qla_set_multi(ha, 1); 887 } 888 break; 889 890 case SIOCDELMULTI: 891 QL_DPRINT4((ha->pci_dev, 892 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 893 894 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 895 qla_set_multi(ha, 0); 896 } 897 break; 898 899 case SIOCSIFMEDIA: 900 case SIOCGIFMEDIA: 901 QL_DPRINT4((ha->pci_dev, 902 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 903 __func__, cmd)); 904 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 905 break; 906 907 case SIOCSIFCAP: 908 { 909 int mask = ifr->ifr_reqcap ^ ifp->if_capenable; 910 911 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 912 __func__, cmd)); 913 914 if (mask & IFCAP_HWCSUM) 915 ifp->if_capenable ^= IFCAP_HWCSUM; 916 if (mask & IFCAP_TSO4) 917 ifp->if_capenable ^= IFCAP_TSO4; 918 if (mask & IFCAP_TSO6) 919 ifp->if_capenable ^= IFCAP_TSO6; 920 if (mask & IFCAP_VLAN_HWTAGGING) 921 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 922 923 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 924 qla_init(ha); 925 926 VLAN_CAPABILITIES(ifp); 927 break; 928 } 929 930 default: 931 QL_DPRINT4((ha->pci_dev, "%s: default (0x%lx)\n", 932 __func__, cmd)); 933 ret = ether_ioctl(ifp, cmd, data); 934 break; 935 } 936 937 return (ret); 938 } 939 940 static int 941 qla_media_change(struct ifnet *ifp) 942 { 943 qla_host_t *ha; 944 struct ifmedia *ifm; 945 int ret = 0; 946 947 ha = (qla_host_t *)ifp->if_softc; 948 949 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 950 951 ifm = &ha->media; 952 953 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 954 ret = EINVAL; 955 956 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 957 958 return (ret); 959 } 960 961 static void 962 qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 963 { 964 qla_host_t *ha; 965 966 ha = (qla_host_t *)ifp->if_softc; 967 968 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 969 970 ifmr->ifm_status = IFM_AVALID; 971 ifmr->ifm_active = IFM_ETHER; 972 973 qla_update_link_state(ha); 974 if (ha->hw.flags.link_up) { 975 ifmr->ifm_status |= IFM_ACTIVE; 976 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 977 } 978 979 QL_DPRINT2((ha->pci_dev, "%s: exit (%s)\n", __func__,\ 980 (ha->hw.flags.link_up ? "link_up" : "link_down"))); 981 982 return; 983 } 984 985 void 986 qla_start(struct ifnet *ifp) 987 { 988 struct mbuf *m_head; 989 qla_host_t *ha = (qla_host_t *)ifp->if_softc; 990 991 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 992 993 if (!mtx_trylock(&ha->tx_lock)) { 994 QL_DPRINT8((ha->pci_dev, 995 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 996 return; 997 } 998 999 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 1000 IFF_DRV_RUNNING) { 1001 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 1002 QLA_TX_UNLOCK(ha); 1003 return; 1004 } 1005 1006 if (!ha->watchdog_ticks) 1007 qla_update_link_state(ha); 1008 1009 if (!ha->hw.flags.link_up) { 1010 QL_DPRINT8((ha->pci_dev, "%s: link down\n", __func__)); 1011 QLA_TX_UNLOCK(ha); 1012 return; 1013 } 1014 1015 while (ifp->if_snd.ifq_head != NULL) { 1016 IF_DEQUEUE(&ifp->if_snd, m_head); 1017 1018 if (m_head == NULL) { 1019 QL_DPRINT8((ha->pci_dev, "%s: m_head == NULL\n", 1020 __func__)); 1021 break; 1022 } 1023 1024 if (qla_send(ha, &m_head)) { 1025 if (m_head == NULL) 1026 break; 1027 QL_DPRINT8((ha->pci_dev, "%s: PREPEND\n", __func__)); 1028 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1029 IF_PREPEND(&ifp->if_snd, m_head); 1030 break; 1031 } 1032 /* Send a copy of the frame to the BPF listener */ 1033 ETHER_BPF_MTAP(ifp, m_head); 1034 } 1035 QLA_TX_UNLOCK(ha); 1036 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1037 return; 1038 } 1039 1040 static int 1041 qla_send(qla_host_t *ha, struct mbuf **m_headp) 1042 { 1043 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1044 bus_dmamap_t map; 1045 int nsegs; 1046 int ret = -1; 1047 uint32_t tx_idx; 1048 struct mbuf *m_head = *m_headp; 1049 1050 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1051 1052 if ((ret = bus_dmamap_create(ha->tx_tag, BUS_DMA_NOWAIT, &map))) { 1053 ha->err_tx_dmamap_create++; 1054 device_printf(ha->pci_dev, 1055 "%s: bus_dmamap_create failed[%d, %d]\n", 1056 __func__, ret, m_head->m_pkthdr.len); 1057 return (ret); 1058 } 1059 1060 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1061 BUS_DMA_NOWAIT); 1062 1063 if (ret == EFBIG) { 1064 1065 struct mbuf *m; 1066 1067 QL_DPRINT8((ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1068 m_head->m_pkthdr.len)); 1069 1070 m = m_defrag(m_head, M_NOWAIT); 1071 if (m == NULL) { 1072 ha->err_tx_defrag++; 1073 m_freem(m_head); 1074 *m_headp = NULL; 1075 device_printf(ha->pci_dev, 1076 "%s: m_defrag() = NULL [%d]\n", 1077 __func__, ret); 1078 return (ENOBUFS); 1079 } 1080 m_head = m; 1081 1082 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1083 segs, &nsegs, BUS_DMA_NOWAIT))) { 1084 1085 ha->err_tx_dmamap_load++; 1086 1087 device_printf(ha->pci_dev, 1088 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1089 __func__, ret, m_head->m_pkthdr.len); 1090 1091 bus_dmamap_destroy(ha->tx_tag, map); 1092 if (ret != ENOMEM) { 1093 m_freem(m_head); 1094 *m_headp = NULL; 1095 } 1096 return (ret); 1097 } 1098 } else if (ret) { 1099 ha->err_tx_dmamap_load++; 1100 1101 device_printf(ha->pci_dev, 1102 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1103 __func__, ret, m_head->m_pkthdr.len); 1104 1105 bus_dmamap_destroy(ha->tx_tag, map); 1106 1107 if (ret != ENOMEM) { 1108 m_freem(m_head); 1109 *m_headp = NULL; 1110 } 1111 return (ret); 1112 } 1113 1114 QL_ASSERT((nsegs != 0), ("qla_send: empty packet")); 1115 1116 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1117 1118 if (!(ret = qla_hw_send(ha, segs, nsegs, &tx_idx, m_head))) { 1119 ha->tx_buf[tx_idx].m_head = m_head; 1120 ha->tx_buf[tx_idx].map = map; 1121 } else { 1122 if (ret == EINVAL) { 1123 m_freem(m_head); 1124 *m_headp = NULL; 1125 } 1126 } 1127 1128 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1129 return (ret); 1130 } 1131 1132 static void 1133 qla_stop(qla_host_t *ha) 1134 { 1135 struct ifnet *ifp = ha->ifp; 1136 device_t dev; 1137 1138 dev = ha->pci_dev; 1139 1140 ha->flags.qla_watchdog_pause = 1; 1141 qla_mdelay(__func__, 100); 1142 1143 ha->flags.stop_rcv = 1; 1144 qla_hw_stop_rcv(ha); 1145 1146 qla_del_hw_if(ha); 1147 1148 qla_free_lro(ha); 1149 1150 qla_free_xmt_bufs(ha); 1151 qla_free_rcv_bufs(ha); 1152 1153 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING); 1154 1155 return; 1156 } 1157 1158 /* 1159 * Buffer Management Functions for Transmit and Receive Rings 1160 */ 1161 static int 1162 qla_alloc_xmt_bufs(qla_host_t *ha) 1163 { 1164 if (bus_dma_tag_create(NULL, /* parent */ 1165 1, 0, /* alignment, bounds */ 1166 BUS_SPACE_MAXADDR, /* lowaddr */ 1167 BUS_SPACE_MAXADDR, /* highaddr */ 1168 NULL, NULL, /* filter, filterarg */ 1169 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1170 QLA_MAX_SEGMENTS, /* nsegments */ 1171 PAGE_SIZE, /* maxsegsize */ 1172 BUS_DMA_ALLOCNOW, /* flags */ 1173 NULL, /* lockfunc */ 1174 NULL, /* lockfuncarg */ 1175 &ha->tx_tag)) { 1176 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1177 __func__); 1178 return (ENOMEM); 1179 } 1180 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1181 1182 return 0; 1183 } 1184 1185 /* 1186 * Release mbuf after it sent on the wire 1187 */ 1188 static void 1189 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1190 { 1191 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1192 1193 if (txb->m_head) { 1194 1195 bus_dmamap_unload(ha->tx_tag, txb->map); 1196 bus_dmamap_destroy(ha->tx_tag, txb->map); 1197 1198 m_freem(txb->m_head); 1199 txb->m_head = NULL; 1200 } 1201 1202 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1203 } 1204 1205 static void 1206 qla_free_xmt_bufs(qla_host_t *ha) 1207 { 1208 int i; 1209 1210 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1211 qla_clear_tx_buf(ha, &ha->tx_buf[i]); 1212 1213 if (ha->tx_tag != NULL) { 1214 bus_dma_tag_destroy(ha->tx_tag); 1215 ha->tx_tag = NULL; 1216 } 1217 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1218 1219 return; 1220 } 1221 1222 1223 static int 1224 qla_alloc_rcv_bufs(qla_host_t *ha) 1225 { 1226 int i, j, ret = 0; 1227 qla_rx_buf_t *rxb; 1228 1229 if (bus_dma_tag_create(NULL, /* parent */ 1230 1, 0, /* alignment, bounds */ 1231 BUS_SPACE_MAXADDR, /* lowaddr */ 1232 BUS_SPACE_MAXADDR, /* highaddr */ 1233 NULL, NULL, /* filter, filterarg */ 1234 MJUM9BYTES, /* maxsize */ 1235 1, /* nsegments */ 1236 MJUM9BYTES, /* maxsegsize */ 1237 BUS_DMA_ALLOCNOW, /* flags */ 1238 NULL, /* lockfunc */ 1239 NULL, /* lockfuncarg */ 1240 &ha->rx_tag)) { 1241 1242 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1243 __func__); 1244 1245 return (ENOMEM); 1246 } 1247 1248 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1249 bzero((void *)ha->rx_jbuf, 1250 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1251 1252 for (i = 0; i < MAX_SDS_RINGS; i++) { 1253 ha->hw.sds[i].sdsr_next = 0; 1254 ha->hw.sds[i].rxb_free = NULL; 1255 ha->hw.sds[i].rx_free = 0; 1256 ha->hw.sds[i].rxjb_free = NULL; 1257 ha->hw.sds[i].rxj_free = 0; 1258 } 1259 1260 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1261 1262 rxb = &ha->rx_buf[i]; 1263 1264 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1265 1266 if (ret) { 1267 device_printf(ha->pci_dev, 1268 "%s: dmamap[%d] failed\n", __func__, i); 1269 1270 for (j = 0; j < i; j++) { 1271 bus_dmamap_destroy(ha->rx_tag, 1272 ha->rx_buf[j].map); 1273 } 1274 goto qla_alloc_rcv_bufs_failed; 1275 } 1276 } 1277 1278 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_NORMAL); 1279 1280 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1281 rxb = &ha->rx_buf[i]; 1282 rxb->handle = i; 1283 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 0))) { 1284 /* 1285 * set the physical address in the corresponding 1286 * descriptor entry in the receive ring/queue for the 1287 * hba 1288 */ 1289 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_NORMAL, i, 1290 rxb->handle, rxb->paddr, 1291 (rxb->m_head)->m_pkthdr.len); 1292 } else { 1293 device_printf(ha->pci_dev, 1294 "%s: qla_get_mbuf [standard(%d)] failed\n", 1295 __func__, i); 1296 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1297 goto qla_alloc_rcv_bufs_failed; 1298 } 1299 } 1300 1301 1302 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1303 1304 rxb = &ha->rx_jbuf[i]; 1305 1306 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1307 1308 if (ret) { 1309 device_printf(ha->pci_dev, 1310 "%s: dmamap[%d] failed\n", __func__, i); 1311 1312 for (j = 0; j < i; j++) { 1313 bus_dmamap_destroy(ha->rx_tag, 1314 ha->rx_jbuf[j].map); 1315 } 1316 goto qla_alloc_rcv_bufs_failed; 1317 } 1318 } 1319 1320 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_JUMBO); 1321 1322 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1323 rxb = &ha->rx_jbuf[i]; 1324 rxb->handle = i; 1325 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 1))) { 1326 /* 1327 * set the physical address in the corresponding 1328 * descriptor entry in the receive ring/queue for the 1329 * hba 1330 */ 1331 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_JUMBO, i, 1332 rxb->handle, rxb->paddr, 1333 (rxb->m_head)->m_pkthdr.len); 1334 } else { 1335 device_printf(ha->pci_dev, 1336 "%s: qla_get_mbuf [jumbo(%d)] failed\n", 1337 __func__, i); 1338 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1339 goto qla_alloc_rcv_bufs_failed; 1340 } 1341 } 1342 1343 return (0); 1344 1345 qla_alloc_rcv_bufs_failed: 1346 qla_free_rcv_bufs(ha); 1347 return (ret); 1348 } 1349 1350 static void 1351 qla_free_rcv_bufs(qla_host_t *ha) 1352 { 1353 int i; 1354 qla_rx_buf_t *rxb; 1355 1356 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1357 rxb = &ha->rx_buf[i]; 1358 if (rxb->m_head != NULL) { 1359 bus_dmamap_unload(ha->rx_tag, rxb->map); 1360 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1361 m_freem(rxb->m_head); 1362 rxb->m_head = NULL; 1363 } 1364 } 1365 1366 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1367 rxb = &ha->rx_jbuf[i]; 1368 if (rxb->m_head != NULL) { 1369 bus_dmamap_unload(ha->rx_tag, rxb->map); 1370 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1371 m_freem(rxb->m_head); 1372 rxb->m_head = NULL; 1373 } 1374 } 1375 1376 if (ha->rx_tag != NULL) { 1377 bus_dma_tag_destroy(ha->rx_tag); 1378 ha->rx_tag = NULL; 1379 } 1380 1381 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1382 bzero((void *)ha->rx_jbuf, 1383 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1384 1385 for (i = 0; i < MAX_SDS_RINGS; i++) { 1386 ha->hw.sds[i].sdsr_next = 0; 1387 ha->hw.sds[i].rxb_free = NULL; 1388 ha->hw.sds[i].rx_free = 0; 1389 ha->hw.sds[i].rxjb_free = NULL; 1390 ha->hw.sds[i].rxj_free = 0; 1391 } 1392 1393 return; 1394 } 1395 1396 int 1397 qla_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp, 1398 uint32_t jumbo) 1399 { 1400 struct mbuf *mp = nmp; 1401 struct ifnet *ifp; 1402 int ret = 0; 1403 uint32_t offset; 1404 1405 QL_DPRINT2((ha->pci_dev, "%s: jumbo(0x%x) enter\n", __func__, jumbo)); 1406 1407 ifp = ha->ifp; 1408 1409 if (mp == NULL) { 1410 1411 if (!jumbo) { 1412 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1413 1414 if (mp == NULL) { 1415 ha->err_m_getcl++; 1416 ret = ENOBUFS; 1417 device_printf(ha->pci_dev, 1418 "%s: m_getcl failed\n", __func__); 1419 goto exit_qla_get_mbuf; 1420 } 1421 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1422 } else { 1423 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, 1424 MJUM9BYTES); 1425 if (mp == NULL) { 1426 ha->err_m_getjcl++; 1427 ret = ENOBUFS; 1428 device_printf(ha->pci_dev, 1429 "%s: m_getjcl failed\n", __func__); 1430 goto exit_qla_get_mbuf; 1431 } 1432 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1433 } 1434 } else { 1435 if (!jumbo) 1436 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1437 else 1438 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1439 1440 mp->m_data = mp->m_ext.ext_buf; 1441 mp->m_next = NULL; 1442 } 1443 1444 1445 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1446 if (offset) { 1447 offset = 8 - offset; 1448 m_adj(mp, offset); 1449 } 1450 1451 /* 1452 * Using memory from the mbuf cluster pool, invoke the bus_dma 1453 * machinery to arrange the memory mapping. 1454 */ 1455 ret = bus_dmamap_load(ha->rx_tag, rxb->map, 1456 mtod(mp, void *), mp->m_len, 1457 qla_dmamap_callback, &rxb->paddr, 1458 BUS_DMA_NOWAIT); 1459 if (ret || !rxb->paddr) { 1460 m_free(mp); 1461 rxb->m_head = NULL; 1462 device_printf(ha->pci_dev, 1463 "%s: bus_dmamap_load failed\n", __func__); 1464 ret = -1; 1465 goto exit_qla_get_mbuf; 1466 } 1467 rxb->m_head = mp; 1468 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1469 1470 exit_qla_get_mbuf: 1471 QL_DPRINT2((ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1472 return (ret); 1473 } 1474 1475 static void 1476 qla_tx_done(void *context, int pending) 1477 { 1478 qla_host_t *ha = context; 1479 1480 qla_hw_tx_done(ha); 1481 qla_start(ha->ifp); 1482 } 1483 1484