1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011-2013 Qlogic Corporation 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * File: qla_os.c 32 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656. 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 #include "qla_os.h" 39 #include "qla_reg.h" 40 #include "qla_hw.h" 41 #include "qla_def.h" 42 #include "qla_inline.h" 43 #include "qla_ver.h" 44 #include "qla_glbl.h" 45 #include "qla_dbg.h" 46 47 /* 48 * Some PCI Configuration Space Related Defines 49 */ 50 51 #ifndef PCI_VENDOR_QLOGIC 52 #define PCI_VENDOR_QLOGIC 0x1077 53 #endif 54 55 #ifndef PCI_PRODUCT_QLOGIC_ISP8020 56 #define PCI_PRODUCT_QLOGIC_ISP8020 0x8020 57 #endif 58 59 #define PCI_QLOGIC_ISP8020 \ 60 ((PCI_PRODUCT_QLOGIC_ISP8020 << 16) | PCI_VENDOR_QLOGIC) 61 62 /* 63 * static functions 64 */ 65 static int qla_alloc_parent_dma_tag(qla_host_t *ha); 66 static void qla_free_parent_dma_tag(qla_host_t *ha); 67 static int qla_alloc_xmt_bufs(qla_host_t *ha); 68 static void qla_free_xmt_bufs(qla_host_t *ha); 69 static int qla_alloc_rcv_bufs(qla_host_t *ha); 70 static void qla_free_rcv_bufs(qla_host_t *ha); 71 72 static void qla_init_ifnet(device_t dev, qla_host_t *ha); 73 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS); 74 static void qla_release(qla_host_t *ha); 75 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, 76 int error); 77 static void qla_stop(qla_host_t *ha); 78 static int qla_send(qla_host_t *ha, struct mbuf **m_headp); 79 static void qla_tx_done(void *context, int pending); 80 81 /* 82 * Hooks to the Operating Systems 83 */ 84 static int qla_pci_probe (device_t); 85 static int qla_pci_attach (device_t); 86 static int qla_pci_detach (device_t); 87 88 static void qla_init(void *arg); 89 static int qla_ioctl(if_t ifp, u_long cmd, caddr_t data); 90 static int qla_media_change(if_t ifp); 91 static void qla_media_status(if_t ifp, struct ifmediareq *ifmr); 92 93 static device_method_t qla_pci_methods[] = { 94 /* Device interface */ 95 DEVMETHOD(device_probe, qla_pci_probe), 96 DEVMETHOD(device_attach, qla_pci_attach), 97 DEVMETHOD(device_detach, qla_pci_detach), 98 { 0, 0 } 99 }; 100 101 static driver_t qla_pci_driver = { 102 "ql", qla_pci_methods, sizeof (qla_host_t), 103 }; 104 105 DRIVER_MODULE(qla80xx, pci, qla_pci_driver, 0, 0); 106 107 MODULE_DEPEND(qla80xx, pci, 1, 1, 1); 108 MODULE_DEPEND(qla80xx, ether, 1, 1, 1); 109 110 MALLOC_DEFINE(M_QLA8XXXBUF, "qla80xxbuf", "Buffers for qla80xx driver"); 111 112 uint32_t std_replenish = 8; 113 uint32_t jumbo_replenish = 2; 114 uint32_t rcv_pkt_thres = 128; 115 uint32_t rcv_pkt_thres_d = 32; 116 uint32_t snd_pkt_thres = 16; 117 uint32_t free_pkt_thres = (NUM_TX_DESCRIPTORS / 2); 118 119 static char dev_str[64]; 120 121 /* 122 * Name: qla_pci_probe 123 * Function: Validate the PCI device to be a QLA80XX device 124 */ 125 static int 126 qla_pci_probe(device_t dev) 127 { 128 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) { 129 case PCI_QLOGIC_ISP8020: 130 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d", 131 "Qlogic ISP 80xx PCI CNA Adapter-Ethernet Function", 132 QLA_VERSION_MAJOR, QLA_VERSION_MINOR, 133 QLA_VERSION_BUILD); 134 device_set_desc(dev, dev_str); 135 break; 136 default: 137 return (ENXIO); 138 } 139 140 if (bootverbose) 141 printf("%s: %s\n ", __func__, dev_str); 142 143 return (BUS_PROBE_DEFAULT); 144 } 145 146 static void 147 qla_add_sysctls(qla_host_t *ha) 148 { 149 device_t dev = ha->pci_dev; 150 151 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), 152 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 153 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_NEEDGIANT, 154 (void *)ha, 0, qla_sysctl_get_stats, "I", "Statistics"); 155 156 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev), 157 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 158 OID_AUTO, "fw_version", CTLFLAG_RD, 159 ha->fw_ver_str, 0, "firmware version"); 160 161 dbg_level = 0; 162 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 163 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 164 OID_AUTO, "debug", CTLFLAG_RW, 165 &dbg_level, dbg_level, "Debug Level"); 166 167 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 168 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 169 OID_AUTO, "std_replenish", CTLFLAG_RW, 170 &std_replenish, std_replenish, 171 "Threshold for Replenishing Standard Frames"); 172 173 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 174 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 175 OID_AUTO, "jumbo_replenish", CTLFLAG_RW, 176 &jumbo_replenish, jumbo_replenish, 177 "Threshold for Replenishing Jumbo Frames"); 178 179 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 180 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 181 OID_AUTO, "rcv_pkt_thres", CTLFLAG_RW, 182 &rcv_pkt_thres, rcv_pkt_thres, 183 "Threshold for # of rcv pkts to trigger indication isr"); 184 185 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 186 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 187 OID_AUTO, "rcv_pkt_thres_d", CTLFLAG_RW, 188 &rcv_pkt_thres_d, rcv_pkt_thres_d, 189 "Threshold for # of rcv pkts to trigger indication defered"); 190 191 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 192 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 193 OID_AUTO, "snd_pkt_thres", CTLFLAG_RW, 194 &snd_pkt_thres, snd_pkt_thres, 195 "Threshold for # of snd packets"); 196 197 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), 198 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), 199 OID_AUTO, "free_pkt_thres", CTLFLAG_RW, 200 &free_pkt_thres, free_pkt_thres, 201 "Threshold for # of packets to free at a time"); 202 203 return; 204 } 205 206 static void 207 qla_watchdog(void *arg) 208 { 209 qla_host_t *ha = arg; 210 qla_hw_t *hw; 211 if_t ifp; 212 213 hw = &ha->hw; 214 ifp = ha->ifp; 215 216 if (ha->flags.qla_watchdog_exit) 217 return; 218 219 if (!ha->flags.qla_watchdog_pause) { 220 if (qla_le32_to_host(*(hw->tx_cons)) != hw->txr_comp) { 221 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 222 } else if (!if_sendq_empty(ifp) && QL_RUNNING(ifp)) { 223 taskqueue_enqueue(ha->tx_tq, &ha->tx_task); 224 } 225 } 226 ha->watchdog_ticks = (ha->watchdog_ticks + 1) % 1000; 227 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 228 qla_watchdog, ha); 229 } 230 231 /* 232 * Name: qla_pci_attach 233 * Function: attaches the device to the operating system 234 */ 235 static int 236 qla_pci_attach(device_t dev) 237 { 238 qla_host_t *ha = NULL; 239 uint32_t rsrc_len, i; 240 241 QL_DPRINT2((dev, "%s: enter\n", __func__)); 242 243 if ((ha = device_get_softc(dev)) == NULL) { 244 device_printf(dev, "cannot get softc\n"); 245 return (ENOMEM); 246 } 247 248 memset(ha, 0, sizeof (qla_host_t)); 249 250 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8020) { 251 device_printf(dev, "device is not ISP8020\n"); 252 return (ENXIO); 253 } 254 255 ha->pci_func = pci_get_function(dev); 256 257 ha->pci_dev = dev; 258 259 pci_enable_busmaster(dev); 260 261 ha->reg_rid = PCIR_BAR(0); 262 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid, 263 RF_ACTIVE); 264 265 if (ha->pci_reg == NULL) { 266 device_printf(dev, "unable to map any ports\n"); 267 goto qla_pci_attach_err; 268 } 269 270 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY, 271 ha->reg_rid); 272 273 mtx_init(&ha->hw_lock, "qla80xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF); 274 mtx_init(&ha->tx_lock, "qla80xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF); 275 mtx_init(&ha->rx_lock, "qla80xx_rx_lock", MTX_NETWORK_LOCK, MTX_DEF); 276 mtx_init(&ha->rxj_lock, "qla80xx_rxj_lock", MTX_NETWORK_LOCK, MTX_DEF); 277 ha->flags.lock_init = 1; 278 279 ha->msix_count = pci_msix_count(dev); 280 281 if (ha->msix_count < qla_get_msix_count(ha)) { 282 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__, 283 ha->msix_count); 284 goto qla_pci_attach_err; 285 } 286 287 QL_DPRINT2((dev, "%s: ha %p irq %p pci_func 0x%x rsrc_count 0x%08x" 288 " msix_count 0x%x pci_reg %p\n", __func__, ha, 289 ha->irq, ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg)); 290 291 ha->msix_count = qla_get_msix_count(ha); 292 293 if (pci_alloc_msix(dev, &ha->msix_count)) { 294 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__, 295 ha->msix_count); 296 ha->msix_count = 0; 297 goto qla_pci_attach_err; 298 } 299 300 TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha); 301 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT, 302 taskqueue_thread_enqueue, &ha->tx_tq); 303 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq", 304 device_get_nameunit(ha->pci_dev)); 305 306 for (i = 0; i < ha->msix_count; i++) { 307 ha->irq_vec[i].irq_rid = i+1; 308 ha->irq_vec[i].ha = ha; 309 310 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 311 &ha->irq_vec[i].irq_rid, 312 (RF_ACTIVE | RF_SHAREABLE)); 313 314 if (ha->irq_vec[i].irq == NULL) { 315 device_printf(dev, "could not allocate interrupt\n"); 316 goto qla_pci_attach_err; 317 } 318 319 if (bus_setup_intr(dev, ha->irq_vec[i].irq, 320 (INTR_TYPE_NET | INTR_MPSAFE), 321 NULL, qla_isr, &ha->irq_vec[i], 322 &ha->irq_vec[i].handle)) { 323 device_printf(dev, "could not setup interrupt\n"); 324 goto qla_pci_attach_err; 325 } 326 327 TASK_INIT(&ha->irq_vec[i].rcv_task, 0, qla_rcv,\ 328 &ha->irq_vec[i]); 329 330 ha->irq_vec[i].rcv_tq = taskqueue_create_fast("qla_rcvq", 331 M_NOWAIT, taskqueue_thread_enqueue, 332 &ha->irq_vec[i].rcv_tq); 333 334 taskqueue_start_threads(&ha->irq_vec[i].rcv_tq, 1, PI_NET, 335 "%s rcvq", 336 device_get_nameunit(ha->pci_dev)); 337 } 338 339 qla_add_sysctls(ha); 340 341 /* add hardware specific sysctls */ 342 qla_hw_add_sysctls(ha); 343 344 /* initialize hardware */ 345 if (qla_init_hw(ha)) { 346 device_printf(dev, "%s: qla_init_hw failed\n", __func__); 347 goto qla_pci_attach_err; 348 } 349 350 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__, 351 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 352 ha->fw_ver_build); 353 354 snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d", 355 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub, 356 ha->fw_ver_build); 357 358 //qla_get_hw_caps(ha); 359 qla_read_mac_addr(ha); 360 361 /* allocate parent dma tag */ 362 if (qla_alloc_parent_dma_tag(ha)) { 363 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n", 364 __func__); 365 goto qla_pci_attach_err; 366 } 367 368 /* alloc all dma buffers */ 369 if (qla_alloc_dma(ha)) { 370 device_printf(dev, "%s: qla_alloc_dma failed\n", __func__); 371 goto qla_pci_attach_err; 372 } 373 374 /* create the o.s ethernet interface */ 375 qla_init_ifnet(dev, ha); 376 377 ha->flags.qla_watchdog_active = 1; 378 ha->flags.qla_watchdog_pause = 1; 379 380 callout_init(&ha->tx_callout, 1); 381 382 /* create ioctl device interface */ 383 if (qla_make_cdev(ha)) { 384 device_printf(dev, "%s: qla_make_cdev failed\n", __func__); 385 goto qla_pci_attach_err; 386 } 387 388 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS, 389 qla_watchdog, ha); 390 391 QL_DPRINT2((dev, "%s: exit 0\n", __func__)); 392 return (0); 393 394 qla_pci_attach_err: 395 396 qla_release(ha); 397 398 QL_DPRINT2((dev, "%s: exit ENXIO\n", __func__)); 399 return (ENXIO); 400 } 401 402 /* 403 * Name: qla_pci_detach 404 * Function: Unhooks the device from the operating system 405 */ 406 static int 407 qla_pci_detach(device_t dev) 408 { 409 qla_host_t *ha = NULL; 410 int i; 411 412 QL_DPRINT2((dev, "%s: enter\n", __func__)); 413 414 if ((ha = device_get_softc(dev)) == NULL) { 415 device_printf(dev, "cannot get softc\n"); 416 return (ENOMEM); 417 } 418 419 QLA_LOCK(ha, __func__); 420 qla_stop(ha); 421 QLA_UNLOCK(ha, __func__); 422 423 if (ha->tx_tq) { 424 taskqueue_drain(ha->tx_tq, &ha->tx_task); 425 taskqueue_free(ha->tx_tq); 426 } 427 428 for (i = 0; i < ha->msix_count; i++) { 429 taskqueue_drain(ha->irq_vec[i].rcv_tq, 430 &ha->irq_vec[i].rcv_task); 431 taskqueue_free(ha->irq_vec[i].rcv_tq); 432 } 433 434 qla_release(ha); 435 436 QL_DPRINT2((dev, "%s: exit\n", __func__)); 437 438 return (0); 439 } 440 441 /* 442 * SYSCTL Related Callbacks 443 */ 444 static int 445 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS) 446 { 447 int err, ret = 0; 448 qla_host_t *ha; 449 450 err = sysctl_handle_int(oidp, &ret, 0, req); 451 452 if (err) 453 return (err); 454 455 ha = (qla_host_t *)arg1; 456 //qla_get_stats(ha); 457 QL_DPRINT2((ha->pci_dev, "%s: called ret %d\n", __func__, ret)); 458 return (err); 459 } 460 461 /* 462 * Name: qla_release 463 * Function: Releases the resources allocated for the device 464 */ 465 static void 466 qla_release(qla_host_t *ha) 467 { 468 device_t dev; 469 int i; 470 471 dev = ha->pci_dev; 472 473 qla_del_cdev(ha); 474 475 if (ha->flags.qla_watchdog_active) 476 ha->flags.qla_watchdog_exit = 1; 477 478 callout_stop(&ha->tx_callout); 479 qla_mdelay(__func__, 100); 480 481 if (ha->ifp != NULL) 482 ether_ifdetach(ha->ifp); 483 484 qla_free_dma(ha); 485 qla_free_parent_dma_tag(ha); 486 487 for (i = 0; i < ha->msix_count; i++) { 488 if (ha->irq_vec[i].handle) 489 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq, 490 ha->irq_vec[i].handle); 491 if (ha->irq_vec[i].irq) 492 (void) bus_release_resource(dev, SYS_RES_IRQ, 493 ha->irq_vec[i].irq_rid, 494 ha->irq_vec[i].irq); 495 } 496 if (ha->msix_count) 497 pci_release_msi(dev); 498 499 if (ha->flags.lock_init) { 500 mtx_destroy(&ha->tx_lock); 501 mtx_destroy(&ha->rx_lock); 502 mtx_destroy(&ha->rxj_lock); 503 mtx_destroy(&ha->hw_lock); 504 } 505 506 if (ha->pci_reg) 507 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid, 508 ha->pci_reg); 509 } 510 511 /* 512 * DMA Related Functions 513 */ 514 515 static void 516 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 517 { 518 *((bus_addr_t *)arg) = 0; 519 520 if (error) { 521 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error); 522 return; 523 } 524 525 QL_ASSERT((nsegs == 1), ("%s: %d segments returned!", __func__, nsegs)); 526 527 *((bus_addr_t *)arg) = segs[0].ds_addr; 528 529 return; 530 } 531 532 int 533 qla_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 534 { 535 int ret = 0; 536 device_t dev; 537 bus_addr_t b_addr; 538 539 dev = ha->pci_dev; 540 541 QL_DPRINT2((dev, "%s: enter\n", __func__)); 542 543 ret = bus_dma_tag_create( 544 ha->parent_tag,/* parent */ 545 dma_buf->alignment, 546 ((bus_size_t)(1ULL << 32)),/* boundary */ 547 BUS_SPACE_MAXADDR, /* lowaddr */ 548 BUS_SPACE_MAXADDR, /* highaddr */ 549 NULL, NULL, /* filter, filterarg */ 550 dma_buf->size, /* maxsize */ 551 1, /* nsegments */ 552 dma_buf->size, /* maxsegsize */ 553 0, /* flags */ 554 NULL, NULL, /* lockfunc, lockarg */ 555 &dma_buf->dma_tag); 556 557 if (ret) { 558 device_printf(dev, "%s: could not create dma tag\n", __func__); 559 goto qla_alloc_dmabuf_exit; 560 } 561 ret = bus_dmamem_alloc(dma_buf->dma_tag, 562 (void **)&dma_buf->dma_b, 563 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT), 564 &dma_buf->dma_map); 565 if (ret) { 566 bus_dma_tag_destroy(dma_buf->dma_tag); 567 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__); 568 goto qla_alloc_dmabuf_exit; 569 } 570 571 ret = bus_dmamap_load(dma_buf->dma_tag, 572 dma_buf->dma_map, 573 dma_buf->dma_b, 574 dma_buf->size, 575 qla_dmamap_callback, 576 &b_addr, BUS_DMA_NOWAIT); 577 578 if (ret || !b_addr) { 579 bus_dma_tag_destroy(dma_buf->dma_tag); 580 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, 581 dma_buf->dma_map); 582 ret = -1; 583 goto qla_alloc_dmabuf_exit; 584 } 585 586 dma_buf->dma_addr = b_addr; 587 588 qla_alloc_dmabuf_exit: 589 QL_DPRINT2((dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n", 590 __func__, ret, (void *)dma_buf->dma_tag, 591 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b, 592 dma_buf->size)); 593 594 return ret; 595 } 596 597 void 598 qla_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf) 599 { 600 bus_dmamap_unload(dma_buf->dma_tag, dma_buf->dma_map); 601 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map); 602 bus_dma_tag_destroy(dma_buf->dma_tag); 603 } 604 605 static int 606 qla_alloc_parent_dma_tag(qla_host_t *ha) 607 { 608 int ret; 609 device_t dev; 610 611 dev = ha->pci_dev; 612 613 /* 614 * Allocate parent DMA Tag 615 */ 616 ret = bus_dma_tag_create( 617 bus_get_dma_tag(dev), /* parent */ 618 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */ 619 BUS_SPACE_MAXADDR, /* lowaddr */ 620 BUS_SPACE_MAXADDR, /* highaddr */ 621 NULL, NULL, /* filter, filterarg */ 622 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 623 0, /* nsegments */ 624 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 625 0, /* flags */ 626 NULL, NULL, /* lockfunc, lockarg */ 627 &ha->parent_tag); 628 629 if (ret) { 630 device_printf(dev, "%s: could not create parent dma tag\n", 631 __func__); 632 return (-1); 633 } 634 635 ha->flags.parent_tag = 1; 636 637 return (0); 638 } 639 640 static void 641 qla_free_parent_dma_tag(qla_host_t *ha) 642 { 643 if (ha->flags.parent_tag) { 644 bus_dma_tag_destroy(ha->parent_tag); 645 ha->flags.parent_tag = 0; 646 } 647 } 648 649 /* 650 * Name: qla_init_ifnet 651 * Function: Creates the Network Device Interface and Registers it with the O.S 652 */ 653 654 static void 655 qla_init_ifnet(device_t dev, qla_host_t *ha) 656 { 657 if_t ifp; 658 659 QL_DPRINT2((dev, "%s: enter\n", __func__)); 660 661 ifp = ha->ifp = if_alloc(IFT_ETHER); 662 663 if (ifp == NULL) 664 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev)); 665 666 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 667 668 if_setmtu(ifp, ETHERMTU); 669 if_setbaudrate(ifp, IF_Gbps(10)); 670 if_setinitfn(ifp, qla_init); 671 if_setsoftc(ifp, ha); 672 if_setflags(ifp, IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST); 673 if_setioctlfn(ifp, qla_ioctl); 674 if_setstartfn(ifp, qla_start); 675 676 if_setsendqlen(ifp, qla_get_ifq_snd_maxlen(ha)); 677 if_setsendqready(ifp); 678 679 ha->max_frame_size = if_getmtu(ifp) + ETHER_HDR_LEN + ETHER_CRC_LEN; 680 681 ether_ifattach(ifp, qla_get_mac_addr(ha)); 682 683 if_setcapabilities(ifp, IFCAP_HWCSUM | 684 IFCAP_TSO4 | 685 IFCAP_JUMBO_MTU); 686 687 if_setcapabilitiesbit(ifp, IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU, 0); 688 if_setcapabilitiesbit(ifp, IFCAP_LINKSTATE, 0); 689 690 if_setcapenable(ifp, if_getcapabilities(ifp)); 691 692 if_setifheaderlen(ifp, sizeof(struct ether_vlan_header)); 693 694 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status); 695 696 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0, 697 NULL); 698 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL); 699 700 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO)); 701 702 QL_DPRINT2((dev, "%s: exit\n", __func__)); 703 704 return; 705 } 706 707 static void 708 qla_init_locked(qla_host_t *ha) 709 { 710 if_t ifp = ha->ifp; 711 712 qla_stop(ha); 713 714 if (qla_alloc_xmt_bufs(ha) != 0) 715 return; 716 717 if (qla_alloc_rcv_bufs(ha) != 0) 718 return; 719 720 if (qla_config_lro(ha)) 721 return; 722 723 bcopy(if_getlladdr(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN); 724 725 if_sethwassist(ifp, CSUM_TCP | CSUM_UDP | CSUM_TSO); 726 727 ha->flags.stop_rcv = 0; 728 if (qla_init_hw_if(ha) == 0) { 729 ifp = ha->ifp; 730 if_setdrvflagbits(ifp, IFF_DRV_RUNNING, 0); 731 if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE); 732 ha->flags.qla_watchdog_pause = 0; 733 } 734 735 return; 736 } 737 738 static void 739 qla_init(void *arg) 740 { 741 qla_host_t *ha; 742 743 ha = (qla_host_t *)arg; 744 745 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 746 747 QLA_LOCK(ha, __func__); 748 qla_init_locked(ha); 749 QLA_UNLOCK(ha, __func__); 750 751 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 752 } 753 754 static u_int 755 qla_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int mcnt) 756 { 757 uint8_t *mta = arg; 758 759 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS) 760 return (0); 761 bcopy(LLADDR(sdl), &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN); 762 763 return (1); 764 } 765 766 static void 767 qla_set_multi(qla_host_t *ha, uint32_t add_multi) 768 { 769 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN]; 770 if_t ifp = ha->ifp; 771 int mcnt; 772 773 mcnt = if_foreach_llmaddr(ifp, qla_copy_maddr, mta); 774 qla_hw_set_multi(ha, mta, mcnt, add_multi); 775 776 return; 777 } 778 779 static int 780 qla_ioctl(if_t ifp, u_long cmd, caddr_t data) 781 { 782 int ret = 0; 783 struct ifreq *ifr = (struct ifreq *)data; 784 #ifdef INET 785 struct ifaddr *ifa = (struct ifaddr *)data; 786 #endif 787 qla_host_t *ha; 788 789 ha = (qla_host_t *)if_getsoftc(ifp); 790 791 switch (cmd) { 792 case SIOCSIFADDR: 793 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n", 794 __func__, cmd)); 795 796 #ifdef INET 797 if (ifa->ifa_addr->sa_family == AF_INET) { 798 if_setflagbits(ifp, IFF_UP, 0); 799 if (!(if_getdrvflags(ifp) & IFF_DRV_RUNNING)) { 800 QLA_LOCK(ha, __func__); 801 qla_init_locked(ha); 802 QLA_UNLOCK(ha, __func__); 803 } 804 QL_DPRINT4((ha->pci_dev, 805 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n", 806 __func__, cmd, ntohl(IA_SIN(ifa)->sin_addr.s_addr))); 807 808 arp_ifinit(ifp, ifa); 809 if (ntohl(IA_SIN(ifa)->sin_addr.s_addr) != INADDR_ANY) { 810 qla_config_ipv4_addr(ha, 811 (IA_SIN(ifa)->sin_addr.s_addr)); 812 } 813 break; 814 } 815 #endif 816 ether_ioctl(ifp, cmd, data); 817 break; 818 819 case SIOCSIFMTU: 820 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n", 821 __func__, cmd)); 822 823 if (ifr->ifr_mtu > QLA_MAX_FRAME_SIZE - ETHER_HDR_LEN) { 824 ret = EINVAL; 825 } else { 826 QLA_LOCK(ha, __func__); 827 if_setmtu(ifp, ifr->ifr_mtu); 828 ha->max_frame_size = 829 if_getmtu(ifp) + ETHER_HDR_LEN + ETHER_CRC_LEN; 830 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING)) { 831 ret = qla_set_max_mtu(ha, ha->max_frame_size, 832 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 833 } 834 QLA_UNLOCK(ha, __func__); 835 836 if (ret) 837 ret = EINVAL; 838 } 839 840 break; 841 842 case SIOCSIFFLAGS: 843 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n", 844 __func__, cmd)); 845 846 if (if_getflags(ifp) & IFF_UP) { 847 if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING)) { 848 if ((if_getflags(ifp) ^ ha->if_flags) & 849 IFF_PROMISC) { 850 qla_set_promisc(ha); 851 } else if ((if_getflags(ifp) ^ ha->if_flags) & 852 IFF_ALLMULTI) { 853 qla_set_allmulti(ha); 854 } 855 } else { 856 QLA_LOCK(ha, __func__); 857 qla_init_locked(ha); 858 ha->max_frame_size = if_getmtu(ifp) + 859 ETHER_HDR_LEN + ETHER_CRC_LEN; 860 ret = qla_set_max_mtu(ha, ha->max_frame_size, 861 (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id); 862 QLA_UNLOCK(ha, __func__); 863 } 864 } else { 865 QLA_LOCK(ha, __func__); 866 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) 867 qla_stop(ha); 868 ha->if_flags = if_getflags(ifp); 869 QLA_UNLOCK(ha, __func__); 870 } 871 break; 872 873 case SIOCADDMULTI: 874 QL_DPRINT4((ha->pci_dev, 875 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd)); 876 877 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) { 878 qla_set_multi(ha, 1); 879 } 880 break; 881 882 case SIOCDELMULTI: 883 QL_DPRINT4((ha->pci_dev, 884 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd)); 885 886 if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) { 887 qla_set_multi(ha, 0); 888 } 889 break; 890 891 case SIOCSIFMEDIA: 892 case SIOCGIFMEDIA: 893 QL_DPRINT4((ha->pci_dev, 894 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n", 895 __func__, cmd)); 896 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd); 897 break; 898 899 case SIOCSIFCAP: 900 { 901 int mask = ifr->ifr_reqcap ^ if_getcapenable(ifp); 902 903 QL_DPRINT4((ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n", 904 __func__, cmd)); 905 906 if (mask & IFCAP_HWCSUM) 907 if_togglecapenable(ifp, IFCAP_HWCSUM); 908 if (mask & IFCAP_TSO4) 909 if_togglecapenable(ifp, IFCAP_TSO4); 910 if (mask & IFCAP_TSO6) 911 if_togglecapenable(ifp, IFCAP_TSO6); 912 if (mask & IFCAP_VLAN_HWTAGGING) 913 if_togglecapenable(ifp, IFCAP_VLAN_HWTAGGING); 914 915 if (!(if_getdrvflags(ifp) & IFF_DRV_RUNNING)) 916 qla_init(ha); 917 918 VLAN_CAPABILITIES(ifp); 919 break; 920 } 921 922 default: 923 QL_DPRINT4((ha->pci_dev, "%s: default (0x%lx)\n", 924 __func__, cmd)); 925 ret = ether_ioctl(ifp, cmd, data); 926 break; 927 } 928 929 return (ret); 930 } 931 932 static int 933 qla_media_change(if_t ifp) 934 { 935 qla_host_t *ha; 936 struct ifmedia *ifm; 937 int ret = 0; 938 939 ha = (qla_host_t *)if_getsoftc(ifp); 940 941 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 942 943 ifm = &ha->media; 944 945 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 946 ret = EINVAL; 947 948 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 949 950 return (ret); 951 } 952 953 static void 954 qla_media_status(if_t ifp, struct ifmediareq *ifmr) 955 { 956 qla_host_t *ha; 957 958 ha = (qla_host_t *)if_getsoftc(ifp); 959 960 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 961 962 ifmr->ifm_status = IFM_AVALID; 963 ifmr->ifm_active = IFM_ETHER; 964 965 qla_update_link_state(ha); 966 if (ha->hw.flags.link_up) { 967 ifmr->ifm_status |= IFM_ACTIVE; 968 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha)); 969 } 970 971 QL_DPRINT2((ha->pci_dev, "%s: exit (%s)\n", __func__,\ 972 (ha->hw.flags.link_up ? "link_up" : "link_down"))); 973 974 return; 975 } 976 977 void 978 qla_start(if_t ifp) 979 { 980 struct mbuf *m_head; 981 qla_host_t *ha = (qla_host_t *)if_getsoftc(ifp); 982 983 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 984 985 if (!mtx_trylock(&ha->tx_lock)) { 986 QL_DPRINT8((ha->pci_dev, 987 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__)); 988 return; 989 } 990 991 if ((if_getdrvflags(ifp) & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != 992 IFF_DRV_RUNNING) { 993 QL_DPRINT8((ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__)); 994 QLA_TX_UNLOCK(ha); 995 return; 996 } 997 998 if (!ha->watchdog_ticks) 999 qla_update_link_state(ha); 1000 1001 if (!ha->hw.flags.link_up) { 1002 QL_DPRINT8((ha->pci_dev, "%s: link down\n", __func__)); 1003 QLA_TX_UNLOCK(ha); 1004 return; 1005 } 1006 1007 while (!if_sendq_empty(ifp)) { 1008 m_head = if_dequeue(ifp); 1009 1010 if (m_head == NULL) { 1011 QL_DPRINT8((ha->pci_dev, "%s: m_head == NULL\n", 1012 __func__)); 1013 break; 1014 } 1015 1016 if (qla_send(ha, &m_head)) { 1017 if (m_head == NULL) 1018 break; 1019 QL_DPRINT8((ha->pci_dev, "%s: PREPEND\n", __func__)); 1020 if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, 0); 1021 if_sendq_prepend(ifp, m_head); 1022 break; 1023 } 1024 /* Send a copy of the frame to the BPF listener */ 1025 ETHER_BPF_MTAP(ifp, m_head); 1026 } 1027 QLA_TX_UNLOCK(ha); 1028 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1029 return; 1030 } 1031 1032 static int 1033 qla_send(qla_host_t *ha, struct mbuf **m_headp) 1034 { 1035 bus_dma_segment_t segs[QLA_MAX_SEGMENTS]; 1036 bus_dmamap_t map; 1037 int nsegs; 1038 int ret = -1; 1039 uint32_t tx_idx; 1040 struct mbuf *m_head = *m_headp; 1041 1042 QL_DPRINT8((ha->pci_dev, "%s: enter\n", __func__)); 1043 1044 if ((ret = bus_dmamap_create(ha->tx_tag, BUS_DMA_NOWAIT, &map))) { 1045 ha->err_tx_dmamap_create++; 1046 device_printf(ha->pci_dev, 1047 "%s: bus_dmamap_create failed[%d, %d]\n", 1048 __func__, ret, m_head->m_pkthdr.len); 1049 return (ret); 1050 } 1051 1052 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs, 1053 BUS_DMA_NOWAIT); 1054 1055 if (ret == EFBIG) { 1056 struct mbuf *m; 1057 1058 QL_DPRINT8((ha->pci_dev, "%s: EFBIG [%d]\n", __func__, 1059 m_head->m_pkthdr.len)); 1060 1061 m = m_defrag(m_head, M_NOWAIT); 1062 if (m == NULL) { 1063 ha->err_tx_defrag++; 1064 m_freem(m_head); 1065 *m_headp = NULL; 1066 device_printf(ha->pci_dev, 1067 "%s: m_defrag() = NULL [%d]\n", 1068 __func__, ret); 1069 return (ENOBUFS); 1070 } 1071 m_head = m; 1072 1073 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, 1074 segs, &nsegs, BUS_DMA_NOWAIT))) { 1075 ha->err_tx_dmamap_load++; 1076 1077 device_printf(ha->pci_dev, 1078 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n", 1079 __func__, ret, m_head->m_pkthdr.len); 1080 1081 bus_dmamap_destroy(ha->tx_tag, map); 1082 if (ret != ENOMEM) { 1083 m_freem(m_head); 1084 *m_headp = NULL; 1085 } 1086 return (ret); 1087 } 1088 } else if (ret) { 1089 ha->err_tx_dmamap_load++; 1090 1091 device_printf(ha->pci_dev, 1092 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n", 1093 __func__, ret, m_head->m_pkthdr.len); 1094 1095 bus_dmamap_destroy(ha->tx_tag, map); 1096 1097 if (ret != ENOMEM) { 1098 m_freem(m_head); 1099 *m_headp = NULL; 1100 } 1101 return (ret); 1102 } 1103 1104 QL_ASSERT((nsegs != 0), ("qla_send: empty packet")); 1105 1106 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE); 1107 1108 if (!(ret = qla_hw_send(ha, segs, nsegs, &tx_idx, m_head))) { 1109 ha->tx_buf[tx_idx].m_head = m_head; 1110 ha->tx_buf[tx_idx].map = map; 1111 } else { 1112 if (ret == EINVAL) { 1113 m_freem(m_head); 1114 *m_headp = NULL; 1115 } 1116 } 1117 1118 QL_DPRINT8((ha->pci_dev, "%s: exit\n", __func__)); 1119 return (ret); 1120 } 1121 1122 static void 1123 qla_stop(qla_host_t *ha) 1124 { 1125 if_t ifp = ha->ifp; 1126 1127 ha->flags.qla_watchdog_pause = 1; 1128 qla_mdelay(__func__, 100); 1129 1130 ha->flags.stop_rcv = 1; 1131 qla_hw_stop_rcv(ha); 1132 1133 qla_del_hw_if(ha); 1134 1135 qla_free_lro(ha); 1136 1137 qla_free_xmt_bufs(ha); 1138 qla_free_rcv_bufs(ha); 1139 1140 if_setdrvflagbits(ifp, 0, (IFF_DRV_OACTIVE | IFF_DRV_RUNNING)); 1141 1142 return; 1143 } 1144 1145 /* 1146 * Buffer Management Functions for Transmit and Receive Rings 1147 */ 1148 static int 1149 qla_alloc_xmt_bufs(qla_host_t *ha) 1150 { 1151 if (bus_dma_tag_create(NULL, /* parent */ 1152 1, 0, /* alignment, bounds */ 1153 BUS_SPACE_MAXADDR, /* lowaddr */ 1154 BUS_SPACE_MAXADDR, /* highaddr */ 1155 NULL, NULL, /* filter, filterarg */ 1156 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */ 1157 QLA_MAX_SEGMENTS, /* nsegments */ 1158 PAGE_SIZE, /* maxsegsize */ 1159 BUS_DMA_ALLOCNOW, /* flags */ 1160 NULL, /* lockfunc */ 1161 NULL, /* lockfuncarg */ 1162 &ha->tx_tag)) { 1163 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n", 1164 __func__); 1165 return (ENOMEM); 1166 } 1167 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1168 1169 return 0; 1170 } 1171 1172 /* 1173 * Release mbuf after it sent on the wire 1174 */ 1175 static void 1176 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb) 1177 { 1178 QL_DPRINT2((ha->pci_dev, "%s: enter\n", __func__)); 1179 1180 if (txb->m_head) { 1181 bus_dmamap_unload(ha->tx_tag, txb->map); 1182 bus_dmamap_destroy(ha->tx_tag, txb->map); 1183 1184 m_freem(txb->m_head); 1185 txb->m_head = NULL; 1186 } 1187 1188 QL_DPRINT2((ha->pci_dev, "%s: exit\n", __func__)); 1189 } 1190 1191 static void 1192 qla_free_xmt_bufs(qla_host_t *ha) 1193 { 1194 int i; 1195 1196 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) 1197 qla_clear_tx_buf(ha, &ha->tx_buf[i]); 1198 1199 if (ha->tx_tag != NULL) { 1200 bus_dma_tag_destroy(ha->tx_tag); 1201 ha->tx_tag = NULL; 1202 } 1203 bzero((void *)ha->tx_buf, (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS)); 1204 1205 return; 1206 } 1207 1208 static int 1209 qla_alloc_rcv_bufs(qla_host_t *ha) 1210 { 1211 int i, j, ret = 0; 1212 qla_rx_buf_t *rxb; 1213 1214 if (bus_dma_tag_create(NULL, /* parent */ 1215 1, 0, /* alignment, bounds */ 1216 BUS_SPACE_MAXADDR, /* lowaddr */ 1217 BUS_SPACE_MAXADDR, /* highaddr */ 1218 NULL, NULL, /* filter, filterarg */ 1219 MJUM9BYTES, /* maxsize */ 1220 1, /* nsegments */ 1221 MJUM9BYTES, /* maxsegsize */ 1222 BUS_DMA_ALLOCNOW, /* flags */ 1223 NULL, /* lockfunc */ 1224 NULL, /* lockfuncarg */ 1225 &ha->rx_tag)) { 1226 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n", 1227 __func__); 1228 1229 return (ENOMEM); 1230 } 1231 1232 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1233 bzero((void *)ha->rx_jbuf, 1234 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1235 1236 for (i = 0; i < MAX_SDS_RINGS; i++) { 1237 ha->hw.sds[i].sdsr_next = 0; 1238 ha->hw.sds[i].rxb_free = NULL; 1239 ha->hw.sds[i].rx_free = 0; 1240 ha->hw.sds[i].rxjb_free = NULL; 1241 ha->hw.sds[i].rxj_free = 0; 1242 } 1243 1244 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1245 rxb = &ha->rx_buf[i]; 1246 1247 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1248 1249 if (ret) { 1250 device_printf(ha->pci_dev, 1251 "%s: dmamap[%d] failed\n", __func__, i); 1252 1253 for (j = 0; j < i; j++) { 1254 bus_dmamap_destroy(ha->rx_tag, 1255 ha->rx_buf[j].map); 1256 } 1257 goto qla_alloc_rcv_bufs_failed; 1258 } 1259 } 1260 1261 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_NORMAL); 1262 1263 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1264 rxb = &ha->rx_buf[i]; 1265 rxb->handle = i; 1266 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 0))) { 1267 /* 1268 * set the physical address in the corresponding 1269 * descriptor entry in the receive ring/queue for the 1270 * hba 1271 */ 1272 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_NORMAL, i, 1273 rxb->handle, rxb->paddr, 1274 (rxb->m_head)->m_pkthdr.len); 1275 } else { 1276 device_printf(ha->pci_dev, 1277 "%s: qla_get_mbuf [standard(%d)] failed\n", 1278 __func__, i); 1279 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1280 goto qla_alloc_rcv_bufs_failed; 1281 } 1282 } 1283 1284 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1285 rxb = &ha->rx_jbuf[i]; 1286 1287 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT, &rxb->map); 1288 1289 if (ret) { 1290 device_printf(ha->pci_dev, 1291 "%s: dmamap[%d] failed\n", __func__, i); 1292 1293 for (j = 0; j < i; j++) { 1294 bus_dmamap_destroy(ha->rx_tag, 1295 ha->rx_jbuf[j].map); 1296 } 1297 goto qla_alloc_rcv_bufs_failed; 1298 } 1299 } 1300 1301 qla_init_hw_rcv_descriptors(ha, RDS_RING_INDEX_JUMBO); 1302 1303 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1304 rxb = &ha->rx_jbuf[i]; 1305 rxb->handle = i; 1306 if (!(ret = qla_get_mbuf(ha, rxb, NULL, 1))) { 1307 /* 1308 * set the physical address in the corresponding 1309 * descriptor entry in the receive ring/queue for the 1310 * hba 1311 */ 1312 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_JUMBO, i, 1313 rxb->handle, rxb->paddr, 1314 (rxb->m_head)->m_pkthdr.len); 1315 } else { 1316 device_printf(ha->pci_dev, 1317 "%s: qla_get_mbuf [jumbo(%d)] failed\n", 1318 __func__, i); 1319 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1320 goto qla_alloc_rcv_bufs_failed; 1321 } 1322 } 1323 1324 return (0); 1325 1326 qla_alloc_rcv_bufs_failed: 1327 qla_free_rcv_bufs(ha); 1328 return (ret); 1329 } 1330 1331 static void 1332 qla_free_rcv_bufs(qla_host_t *ha) 1333 { 1334 int i; 1335 qla_rx_buf_t *rxb; 1336 1337 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) { 1338 rxb = &ha->rx_buf[i]; 1339 if (rxb->m_head != NULL) { 1340 bus_dmamap_unload(ha->rx_tag, rxb->map); 1341 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1342 m_freem(rxb->m_head); 1343 rxb->m_head = NULL; 1344 } 1345 } 1346 1347 for (i = 0; i < NUM_RX_JUMBO_DESCRIPTORS; i++) { 1348 rxb = &ha->rx_jbuf[i]; 1349 if (rxb->m_head != NULL) { 1350 bus_dmamap_unload(ha->rx_tag, rxb->map); 1351 bus_dmamap_destroy(ha->rx_tag, rxb->map); 1352 m_freem(rxb->m_head); 1353 rxb->m_head = NULL; 1354 } 1355 } 1356 1357 if (ha->rx_tag != NULL) { 1358 bus_dma_tag_destroy(ha->rx_tag); 1359 ha->rx_tag = NULL; 1360 } 1361 1362 bzero((void *)ha->rx_buf, (sizeof(qla_rx_buf_t) * NUM_RX_DESCRIPTORS)); 1363 bzero((void *)ha->rx_jbuf, 1364 (sizeof(qla_rx_buf_t) * NUM_RX_JUMBO_DESCRIPTORS)); 1365 1366 for (i = 0; i < MAX_SDS_RINGS; i++) { 1367 ha->hw.sds[i].sdsr_next = 0; 1368 ha->hw.sds[i].rxb_free = NULL; 1369 ha->hw.sds[i].rx_free = 0; 1370 ha->hw.sds[i].rxjb_free = NULL; 1371 ha->hw.sds[i].rxj_free = 0; 1372 } 1373 1374 return; 1375 } 1376 1377 int 1378 qla_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp, 1379 uint32_t jumbo) 1380 { 1381 struct mbuf *mp = nmp; 1382 int ret = 0; 1383 uint32_t offset; 1384 1385 QL_DPRINT2((ha->pci_dev, "%s: jumbo(0x%x) enter\n", __func__, jumbo)); 1386 1387 if (mp == NULL) { 1388 if (!jumbo) { 1389 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1390 1391 if (mp == NULL) { 1392 ha->err_m_getcl++; 1393 ret = ENOBUFS; 1394 device_printf(ha->pci_dev, 1395 "%s: m_getcl failed\n", __func__); 1396 goto exit_qla_get_mbuf; 1397 } 1398 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1399 } else { 1400 mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, 1401 MJUM9BYTES); 1402 if (mp == NULL) { 1403 ha->err_m_getjcl++; 1404 ret = ENOBUFS; 1405 device_printf(ha->pci_dev, 1406 "%s: m_getjcl failed\n", __func__); 1407 goto exit_qla_get_mbuf; 1408 } 1409 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1410 } 1411 } else { 1412 if (!jumbo) 1413 mp->m_len = mp->m_pkthdr.len = MCLBYTES; 1414 else 1415 mp->m_len = mp->m_pkthdr.len = MJUM9BYTES; 1416 1417 mp->m_data = mp->m_ext.ext_buf; 1418 mp->m_next = NULL; 1419 } 1420 1421 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL); 1422 if (offset) { 1423 offset = 8 - offset; 1424 m_adj(mp, offset); 1425 } 1426 1427 /* 1428 * Using memory from the mbuf cluster pool, invoke the bus_dma 1429 * machinery to arrange the memory mapping. 1430 */ 1431 ret = bus_dmamap_load(ha->rx_tag, rxb->map, 1432 mtod(mp, void *), mp->m_len, 1433 qla_dmamap_callback, &rxb->paddr, 1434 BUS_DMA_NOWAIT); 1435 if (ret || !rxb->paddr) { 1436 m_free(mp); 1437 rxb->m_head = NULL; 1438 device_printf(ha->pci_dev, 1439 "%s: bus_dmamap_load failed\n", __func__); 1440 ret = -1; 1441 goto exit_qla_get_mbuf; 1442 } 1443 rxb->m_head = mp; 1444 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD); 1445 1446 exit_qla_get_mbuf: 1447 QL_DPRINT2((ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret)); 1448 return (ret); 1449 } 1450 1451 static void 1452 qla_tx_done(void *context, int pending) 1453 { 1454 qla_host_t *ha = context; 1455 1456 qla_hw_tx_done(ha); 1457 qla_start(ha->ifp); 1458 } 1459