xref: /freebsd/sys/dev/qlxgb/qla_inline.h (revision 62cfcf62f627e5093fb37026a6d8c98e4d2ef04c)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2011-2013 Qlogic Corporation
5  * All rights reserved.
6  *
7  *  Redistribution and use in source and binary forms, with or without
8  *  modification, are permitted provided that the following conditions
9  *  are met:
10  *
11  *  1. Redistributions of source code must retain the above copyright
12  *     notice, this list of conditions and the following disclaimer.
13  *  2. Redistributions in binary form must reproduce the above copyright
14  *     notice, this list of conditions and the following disclaimer in the
15  *     documentation and/or other materials provided with the distribution.
16  *
17  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  *  POSSIBILITY OF SUCH DAMAGE.
28  *
29  * $FreeBSD$
30  */
31 /*
32  * File: qla_inline.h
33  * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
34  */
35 #ifndef _QLA_INLINE_H_
36 #define _QLA_INLINE_H_
37 
38 /*
39  * Function: qla_hw_reset
40  */
41 static __inline void qla_hw_reset(qla_host_t *ha)
42 {
43         WRITE_OFFSET32(ha, Q8_ASIC_RESET, 0xFFFFFFFF);
44 }
45 
46 #define QL8_SEMLOCK_TIMEOUT	1000/* QLA8020 Semaphore Lock Timeout 10ms */
47 
48 
49 /*
50  * Inline functions for hardware semaphores
51  */
52 
53 /*
54  * Name:	qla_sem_lock
55  * Function:	Locks one of the semaphore registers (semaphore 2,3,5 & 7)
56  *		If the id_reg is valid, then id_val is written into it.
57  *		This is for debugging purpose
58  * Returns:	0 on success; otherwise its failed.
59  */
60 static __inline int
61 qla_sem_lock(qla_host_t *ha, uint32_t sem_reg, uint32_t id_reg, uint32_t id_val)
62 {
63 	int count = QL8_SEMLOCK_TIMEOUT;
64 
65 	while (count) {
66 		if ((READ_REG32(ha, sem_reg) & SEM_LOCK_BIT))
67 			break;
68 		count--;
69 
70 		if (!count)
71 			return(-1);
72 		qla_mdelay(__func__, 10);
73 	}
74 	if (id_reg)
75 		WRITE_OFFSET32(ha, id_reg, id_val);
76 
77 	return(0);
78 }
79 
80 /*
81  * Name:	qla_sem_unlock
82  * Function:	Unlocks the semaphore registers (semaphore 2,3,5 & 7)
83  *		previously locked by qla_sem_lock()
84  */
85 static __inline void
86 qla_sem_unlock(qla_host_t *ha, uint32_t sem_reg)
87 {
88 	READ_REG32(ha, sem_reg);
89 }
90 
91 static __inline int
92 qla_get_ifq_snd_maxlen(qla_host_t *ha)
93 {
94 	return((NUM_TX_DESCRIPTORS - 1));
95 }
96 
97 static __inline uint32_t
98 qla_get_optics(qla_host_t *ha)
99 {
100 	uint32_t link_speed;
101 
102 	link_speed = READ_REG32(ha, Q8_LINK_SPEED_0);
103 	if (ha->pci_func == 0)
104 		link_speed = link_speed & 0xFF;
105 	else
106 		link_speed = (link_speed >> 8) & 0xFF;
107 
108 	switch (link_speed) {
109 	case 0x1:
110 		link_speed = IFM_100_FX;
111 		break;
112 
113 	case 0x10:
114 		link_speed = IFM_1000_SX;
115 		break;
116 
117 	default:
118 		link_speed = (IFM_10G_LR | IFM_10G_SR);
119 		break;
120 	}
121 
122 	return(link_speed);
123 }
124 
125 static __inline uint8_t *
126 qla_get_mac_addr(qla_host_t *ha)
127 {
128 	return (ha->hw.mac_addr);
129 }
130 
131 static __inline void
132 qla_read_mac_addr(qla_host_t *ha)
133 {
134 	uint32_t mac_crb_addr;
135 	uint32_t mac_lo;
136 	uint32_t mac_hi;
137 	uint8_t	*macp;
138 
139 	mac_crb_addr = Q8_CRB_MAC_BLOCK_START +
140 		(((ha->pci_func >> 1) * 3) << 2) + ((ha->pci_func & 0x01) << 2);
141 
142 	mac_lo = READ_REG32(ha, mac_crb_addr);
143 	mac_hi = READ_REG32(ha, (mac_crb_addr + 0x4));
144 
145 	if (ha->pci_func & 0x01) {
146 		mac_lo = mac_lo >> 16;
147 
148 		macp = (uint8_t *)&mac_lo;
149 
150 		ha->hw.mac_addr[5] = macp[0];
151 		ha->hw.mac_addr[4] = macp[1];
152 
153 		macp = (uint8_t *)&mac_hi;
154 
155 		ha->hw.mac_addr[3] = macp[0];
156 		ha->hw.mac_addr[2] = macp[1];
157 		ha->hw.mac_addr[1] = macp[2];
158 		ha->hw.mac_addr[0] = macp[3];
159 	} else {
160 		macp = (uint8_t *)&mac_lo;
161 
162 		ha->hw.mac_addr[5] = macp[0];
163 		ha->hw.mac_addr[4] = macp[1];
164 		ha->hw.mac_addr[3] = macp[2];
165 		ha->hw.mac_addr[2] = macp[3];
166 
167 		macp = (uint8_t *)&mac_hi;
168 
169 		ha->hw.mac_addr[1] = macp[0];
170 		ha->hw.mac_addr[0] = macp[1];
171 	}
172 	return;
173 }
174 
175 static __inline void
176 qla_set_hw_rcv_desc(qla_host_t *ha, uint32_t ridx, uint32_t index,
177 	uint32_t handle, bus_addr_t paddr, uint32_t buf_size)
178 {
179 	q80_recv_desc_t *rcv_desc;
180 
181 	rcv_desc = (q80_recv_desc_t *)ha->hw.dma_buf.rds_ring[ridx].dma_b;
182 
183 	rcv_desc += index;
184 
185 	rcv_desc->handle = (uint16_t)handle;
186 	rcv_desc->buf_size = buf_size;
187 	rcv_desc->buf_addr = paddr;
188 
189 	return;
190 }
191 
192 static __inline void
193 qla_init_hw_rcv_descriptors(qla_host_t *ha, uint32_t ridx)
194 {
195 	if (ridx == RDS_RING_INDEX_NORMAL)
196 		bzero((void *)ha->hw.dma_buf.rds_ring[ridx].dma_b,
197 			(sizeof(q80_recv_desc_t) * NUM_RX_DESCRIPTORS));
198 	else if (ridx == RDS_RING_INDEX_JUMBO)
199 		bzero((void *)ha->hw.dma_buf.rds_ring[ridx].dma_b,
200 			(sizeof(q80_recv_desc_t) * NUM_RX_JUMBO_DESCRIPTORS));
201 	else
202 		QL_ASSERT(0, ("%s: invalid rds index [%d]\n", __func__, ridx));
203 }
204 
205 static __inline void
206 qla_lock(qla_host_t *ha, const char *str)
207 {
208 	while (1) {
209 		mtx_lock(&ha->hw_lock);
210 		if (!ha->hw_lock_held) {
211 			ha->hw_lock_held = 1;
212 			ha->qla_lock = str;
213 			mtx_unlock(&ha->hw_lock);
214 			break;
215 		}
216 		mtx_unlock(&ha->hw_lock);
217 		qla_mdelay(__func__, 1);
218 	}
219 	return;
220 }
221 
222 static __inline void
223 qla_unlock(qla_host_t *ha, const char *str)
224 {
225 	mtx_lock(&ha->hw_lock);
226 	ha->hw_lock_held = 0;
227 	ha->qla_unlock = str;
228 	mtx_unlock(&ha->hw_lock);
229 }
230 
231 #endif /* #ifndef _QLA_INLINE_H_ */
232