1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 * 29 */ 30 31 #ifndef __ROCE_COMMON__ 32 #define __ROCE_COMMON__ 33 /************************************************************************/ 34 /* Add include to common rdma target for both eCore and protocol rdma driver */ 35 /************************************************************************/ 36 #include "rdma_common.h" 37 /************************/ 38 /* ROCE FW CONSTANTS */ 39 /************************/ 40 41 #define ROCE_REQ_MAX_INLINE_DATA_SIZE (256) //max size of inline data in single request 42 #define ROCE_REQ_MAX_SINGLE_SQ_WQE_SIZE (288) //Maximum size of single SQ WQE (rdma wqe and inline data) 43 44 #define ROCE_MAX_QPS (32*1024) 45 #define ROCE_DCQCN_NP_MAX_QPS (64) /* notification point max QPs*/ 46 #define ROCE_DCQCN_RP_MAX_QPS (64) /* reaction point max QPs*/ 47 48 49 /* 50 * Affiliated asynchronous events / errors enumeration 51 */ 52 enum roce_async_events_type 53 { 54 ROCE_ASYNC_EVENT_NONE=0, 55 ROCE_ASYNC_EVENT_COMM_EST=1, 56 ROCE_ASYNC_EVENT_SQ_DRAINED, 57 ROCE_ASYNC_EVENT_SRQ_LIMIT, 58 ROCE_ASYNC_EVENT_LAST_WQE_REACHED, 59 ROCE_ASYNC_EVENT_CQ_ERR, 60 ROCE_ASYNC_EVENT_LOCAL_INVALID_REQUEST_ERR, 61 ROCE_ASYNC_EVENT_LOCAL_CATASTROPHIC_ERR, 62 ROCE_ASYNC_EVENT_LOCAL_ACCESS_ERR, 63 ROCE_ASYNC_EVENT_QP_CATASTROPHIC_ERR, 64 ROCE_ASYNC_EVENT_CQ_OVERFLOW_ERR, 65 ROCE_ASYNC_EVENT_SRQ_EMPTY, 66 ROCE_ASYNC_EVENT_DESTROY_QP_DONE, 67 MAX_ROCE_ASYNC_EVENTS_TYPE 68 }; 69 70 #endif /* __ROCE_COMMON__ */ 71