1 /* 2 * Copyright (c) 2018-2019 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include "bcm_osal.h" 33 #include "ecore.h" 34 #include "ecore_hsi_eth.h" 35 #include "ecore_sriov.h" 36 #include "ecore_l2_api.h" 37 #include "ecore_vf.h" 38 #include "ecore_vfpf_if.h" 39 #include "ecore_status.h" 40 #include "reg_addr.h" 41 #include "ecore_int.h" 42 #include "ecore_l2.h" 43 #include "ecore_mcp_api.h" 44 #include "ecore_vf_api.h" 45 46 #ifdef _NTDDK_ 47 #pragma warning(push) 48 #pragma warning(disable : 28167) 49 #pragma warning(disable : 28123) 50 #pragma warning(disable : 28121) 51 #endif 52 53 static void *ecore_vf_pf_prep(struct ecore_hwfn *p_hwfn, 54 u16 type, u16 length) 55 { 56 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 57 void *p_tlv; 58 59 /* This lock is released when we receive PF's response 60 * in ecore_send_msg2pf(). 61 * So, ecore_vf_pf_prep() and ecore_send_msg2pf() 62 * must come in sequence. 63 */ 64 OSAL_MUTEX_ACQUIRE(&(p_iov->mutex)); 65 66 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, "preparing to send %s tlv over vf pf channel\n", 67 ecore_channel_tlvs_string[type]); 68 69 /* Reset Requst offset */ 70 p_iov->offset = (u8 *)p_iov->vf2pf_request; 71 72 /* Clear mailbox - both request and reply */ 73 OSAL_MEMSET(p_iov->vf2pf_request, 0, 74 sizeof(union vfpf_tlvs)); 75 OSAL_MEMSET(p_iov->pf2vf_reply, 0, 76 sizeof(union pfvf_tlvs)); 77 78 /* Init type and length */ 79 p_tlv = ecore_add_tlv(&p_iov->offset, type, length); 80 81 /* Init first tlv header */ 82 ((struct vfpf_first_tlv *)p_tlv)->reply_address = 83 (u64)p_iov->pf2vf_reply_phys; 84 85 return p_tlv; 86 } 87 88 static void ecore_vf_pf_req_end(struct ecore_hwfn *p_hwfn, 89 enum _ecore_status_t req_status) 90 { 91 union pfvf_tlvs *resp = p_hwfn->vf_iov_info->pf2vf_reply; 92 93 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 94 "VF request status = 0x%x, PF reply status = 0x%x\n", 95 req_status, resp->default_resp.hdr.status); 96 97 OSAL_MUTEX_RELEASE(&(p_hwfn->vf_iov_info->mutex)); 98 } 99 100 #ifdef CONFIG_ECORE_SW_CHANNEL 101 /* The SW channel implementation of Windows needs to know the 'exact' 102 * response size of any given message. That means that for future 103 * messages we'd be unable to send TLVs to PF if he'll be unable to 104 * answer them if the |response| != |default response|. 105 * We'd need to handshake in acquire capabilities for any such. 106 */ 107 #endif 108 static enum _ecore_status_t 109 ecore_send_msg2pf(struct ecore_hwfn *p_hwfn, 110 u8 *done, u32 resp_size) 111 { 112 union vfpf_tlvs *p_req = p_hwfn->vf_iov_info->vf2pf_request; 113 struct ustorm_trigger_vf_zone trigger; 114 struct ustorm_vf_zone *zone_data; 115 enum _ecore_status_t rc = ECORE_SUCCESS; 116 int time = 100; 117 118 zone_data = (struct ustorm_vf_zone *)PXP_VF_BAR0_START_USDM_ZONE_B; 119 120 /* output tlvs list */ 121 ecore_dp_tlv_list(p_hwfn, p_req); 122 123 /* need to add the END TLV to the message size */ 124 resp_size += sizeof(struct channel_list_end_tlv); 125 126 #ifdef CONFIG_ECORE_SW_CHANNEL 127 if (!p_hwfn->vf_iov_info->b_hw_channel) { 128 rc = OSAL_VF_SEND_MSG2PF(p_hwfn->p_dev, 129 done, 130 p_req, 131 p_hwfn->vf_iov_info->pf2vf_reply, 132 sizeof(union vfpf_tlvs), 133 resp_size); 134 /* TODO - no prints about message ? */ 135 return rc; 136 } 137 #endif 138 139 /* Send TLVs over HW channel */ 140 OSAL_MEMSET(&trigger, 0, sizeof(struct ustorm_trigger_vf_zone)); 141 trigger.vf_pf_msg_valid = 1; 142 143 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 144 "VF -> PF [%02x] message: [%08x, %08x] --> %p, %08x --> %p\n", 145 GET_FIELD(p_hwfn->hw_info.concrete_fid, 146 PXP_CONCRETE_FID_PFID), 147 U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys), 148 U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys), 149 &zone_data->non_trigger.vf_pf_msg_addr, 150 *((u32 *)&trigger), 151 &zone_data->trigger); 152 153 REG_WR(p_hwfn, 154 (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.lo, 155 U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys)); 156 157 REG_WR(p_hwfn, 158 (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.hi, 159 U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys)); 160 161 /* The message data must be written first, to prevent trigger before 162 * data is written. 163 */ 164 OSAL_WMB(p_hwfn->p_dev); 165 166 REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger, *((u32 *)&trigger)); 167 168 /* When PF would be done with the response, it would write back to the 169 * `done' address. Poll until then. 170 */ 171 while ((!*done) && time) { 172 OSAL_MSLEEP(25); 173 time--; 174 } 175 176 if (!*done) { 177 DP_NOTICE(p_hwfn, true, 178 "VF <-- PF Timeout [Type %d]\n", 179 p_req->first_tlv.tl.type); 180 rc = ECORE_TIMEOUT; 181 } else { 182 if ((*done != PFVF_STATUS_SUCCESS) && 183 (*done != PFVF_STATUS_NO_RESOURCE)) 184 DP_NOTICE(p_hwfn, false, 185 "PF response: %d [Type %d]\n", 186 *done, p_req->first_tlv.tl.type); 187 else 188 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 189 "PF response: %d [Type %d]\n", 190 *done, p_req->first_tlv.tl.type); 191 } 192 193 return rc; 194 } 195 196 static void ecore_vf_pf_add_qid(struct ecore_hwfn *p_hwfn, 197 struct ecore_queue_cid *p_cid) 198 { 199 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 200 struct vfpf_qid_tlv *p_qid_tlv; 201 202 /* Only add QIDs for the queue if it was negotiated with PF */ 203 if (!(p_iov->acquire_resp.pfdev_info.capabilities & 204 PFVF_ACQUIRE_CAP_QUEUE_QIDS)) 205 return; 206 207 p_qid_tlv = ecore_add_tlv(&p_iov->offset, 208 CHANNEL_TLV_QID, sizeof(*p_qid_tlv)); 209 p_qid_tlv->qid = p_cid->qid_usage_idx; 210 } 211 212 static enum _ecore_status_t _ecore_vf_pf_release(struct ecore_hwfn *p_hwfn, 213 bool b_final) 214 { 215 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 216 struct pfvf_def_resp_tlv *resp; 217 struct vfpf_first_tlv *req; 218 u32 size; 219 enum _ecore_status_t rc; 220 221 /* clear mailbox and prep first tlv */ 222 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_RELEASE, sizeof(*req)); 223 224 /* add list termination tlv */ 225 ecore_add_tlv(&p_iov->offset, 226 CHANNEL_TLV_LIST_END, 227 sizeof(struct channel_list_end_tlv)); 228 229 resp = &p_iov->pf2vf_reply->default_resp; 230 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 231 232 if (rc == ECORE_SUCCESS && resp->hdr.status != PFVF_STATUS_SUCCESS) 233 rc = ECORE_AGAIN; 234 235 ecore_vf_pf_req_end(p_hwfn, rc); 236 if (!b_final) 237 return rc; 238 239 p_hwfn->b_int_enabled = 0; 240 241 if (p_iov->vf2pf_request) 242 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, 243 p_iov->vf2pf_request, 244 p_iov->vf2pf_request_phys, 245 sizeof(union vfpf_tlvs)); 246 if (p_iov->pf2vf_reply) 247 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, 248 p_iov->pf2vf_reply, 249 p_iov->pf2vf_reply_phys, 250 sizeof(union pfvf_tlvs)); 251 252 if (p_iov->bulletin.p_virt) { 253 size = sizeof(struct ecore_bulletin_content); 254 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, 255 p_iov->bulletin.p_virt, 256 p_iov->bulletin.phys, 257 size); 258 } 259 260 #ifdef CONFIG_ECORE_LOCK_ALLOC 261 OSAL_MUTEX_DEALLOC(&p_iov->mutex); 262 #endif 263 264 OSAL_FREE(p_hwfn->p_dev, p_hwfn->vf_iov_info); 265 p_hwfn->vf_iov_info = OSAL_NULL; 266 267 return rc; 268 } 269 270 enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn) 271 { 272 return _ecore_vf_pf_release(p_hwfn, true); 273 } 274 275 #define VF_ACQUIRE_THRESH 3 276 static void ecore_vf_pf_acquire_reduce_resc(struct ecore_hwfn *p_hwfn, 277 struct vf_pf_resc_request *p_req, 278 struct pf_vf_resc *p_resp) 279 { 280 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 281 "PF unwilling to fullill resource request: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x] cids [%02x/%02x]. Try PF recommended amount\n", 282 p_req->num_rxqs, p_resp->num_rxqs, 283 p_req->num_rxqs, p_resp->num_txqs, 284 p_req->num_sbs, p_resp->num_sbs, 285 p_req->num_mac_filters, p_resp->num_mac_filters, 286 p_req->num_vlan_filters, p_resp->num_vlan_filters, 287 p_req->num_mc_filters, p_resp->num_mc_filters, 288 p_req->num_cids, p_resp->num_cids); 289 290 /* humble our request */ 291 p_req->num_txqs = p_resp->num_txqs; 292 p_req->num_rxqs = p_resp->num_rxqs; 293 p_req->num_sbs = p_resp->num_sbs; 294 p_req->num_mac_filters = p_resp->num_mac_filters; 295 p_req->num_vlan_filters = p_resp->num_vlan_filters; 296 p_req->num_mc_filters = p_resp->num_mc_filters; 297 p_req->num_cids = p_resp->num_cids; 298 } 299 300 static enum _ecore_status_t ecore_vf_pf_acquire(struct ecore_hwfn *p_hwfn) 301 { 302 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 303 struct pfvf_acquire_resp_tlv *resp = &p_iov->pf2vf_reply->acquire_resp; 304 struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info; 305 struct ecore_vf_acquire_sw_info vf_sw_info; 306 struct vf_pf_resc_request *p_resc; 307 bool resources_acquired = false; 308 struct vfpf_acquire_tlv *req; 309 int attempts = 0; 310 enum _ecore_status_t rc = ECORE_SUCCESS; 311 int eth_hsi_minor_ver; 312 313 /* clear mailbox and prep first tlv */ 314 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_ACQUIRE, sizeof(*req)); 315 p_resc = &req->resc_request; 316 317 /* @@@ TBD: PF may not be ready bnx2x_get_vf_id... */ 318 req->vfdev_info.opaque_fid = p_hwfn->hw_info.opaque_fid; 319 320 p_resc->num_rxqs = ECORE_MAX_VF_CHAINS_PER_PF; 321 p_resc->num_txqs = ECORE_MAX_VF_CHAINS_PER_PF; 322 p_resc->num_sbs = ECORE_MAX_VF_CHAINS_PER_PF; 323 p_resc->num_mac_filters = ECORE_ETH_VF_NUM_MAC_FILTERS; 324 p_resc->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS; 325 p_resc->num_cids = ECORE_ETH_VF_DEFAULT_NUM_CIDS; 326 327 OSAL_MEMSET(&vf_sw_info, 0, sizeof(vf_sw_info)); 328 OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, &req->resc_request, &vf_sw_info); 329 330 req->vfdev_info.os_type = vf_sw_info.os_type; 331 req->vfdev_info.driver_version = vf_sw_info.driver_version; 332 req->vfdev_info.fw_major = FW_MAJOR_VERSION; 333 req->vfdev_info.fw_minor = FW_MINOR_VERSION; 334 req->vfdev_info.fw_revision = FW_REVISION_VERSION; 335 req->vfdev_info.fw_engineering = FW_ENGINEERING_VERSION; 336 req->vfdev_info.eth_fp_hsi_major = ETH_HSI_VER_MAJOR; 337 req->vfdev_info.eth_fp_hsi_minor = ETH_HSI_VER_MINOR; 338 339 /* Fill capability field with any non-deprecated config we support */ 340 req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_100G; 341 342 /* If we've mapped the doorbell bar, try using queue qids */ 343 if (p_iov->b_doorbell_bar) { 344 req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_PHYSICAL_BAR | 345 VFPF_ACQUIRE_CAP_QUEUE_QIDS; 346 p_resc->num_cids = ECORE_ETH_VF_MAX_NUM_CIDS; 347 } 348 349 /* pf 2 vf bulletin board address */ 350 req->bulletin_addr = p_iov->bulletin.phys; 351 req->bulletin_size = p_iov->bulletin.size; 352 353 /* add list termination tlv */ 354 ecore_add_tlv(&p_iov->offset, 355 CHANNEL_TLV_LIST_END, 356 sizeof(struct channel_list_end_tlv)); 357 358 while (!resources_acquired) { 359 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, "attempting to acquire resources\n"); 360 361 /* Clear response buffer, as this might be a re-send */ 362 OSAL_MEMSET(p_iov->pf2vf_reply, 0, 363 sizeof(union pfvf_tlvs)); 364 365 /* send acquire request */ 366 rc = ecore_send_msg2pf(p_hwfn, 367 &resp->hdr.status, 368 sizeof(*resp)); 369 if (rc != ECORE_SUCCESS) 370 goto exit; 371 372 /* copy acquire response from buffer to p_hwfn */ 373 OSAL_MEMCPY(&p_iov->acquire_resp, 374 resp, 375 sizeof(p_iov->acquire_resp)); 376 377 attempts++; 378 379 if (resp->hdr.status == PFVF_STATUS_SUCCESS) { 380 /* PF agrees to allocate our resources */ 381 if (!(resp->pfdev_info.capabilities & 382 PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE)) { 383 /* It's possible legacy PF mistakenly accepted; 384 * but we don't care - simply mark it as 385 * legacy and continue. 386 */ 387 req->vfdev_info.capabilities |= 388 VFPF_ACQUIRE_CAP_PRE_FP_HSI; 389 } 390 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, "resources acquired\n"); 391 resources_acquired = true; 392 } /* PF refuses to allocate our resources */ 393 else if (resp->hdr.status == PFVF_STATUS_NO_RESOURCE && 394 attempts < VF_ACQUIRE_THRESH) { 395 ecore_vf_pf_acquire_reduce_resc(p_hwfn, p_resc, 396 &resp->resc); 397 398 } else if (resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED) { 399 if (pfdev_info->major_fp_hsi && 400 (pfdev_info->major_fp_hsi != ETH_HSI_VER_MAJOR)) { 401 DP_NOTICE(p_hwfn, false, 402 "PF uses an incompatible fastpath HSI %02x.%02x [VF requires %02x.%02x]. Please change to a VF driver using %02x.xx.\n", 403 pfdev_info->major_fp_hsi, 404 pfdev_info->minor_fp_hsi, 405 ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR, 406 pfdev_info->major_fp_hsi); 407 rc = ECORE_INVAL; 408 goto exit; 409 } 410 411 if (!pfdev_info->major_fp_hsi) { 412 if (req->vfdev_info.capabilities & 413 VFPF_ACQUIRE_CAP_PRE_FP_HSI) { 414 DP_NOTICE(p_hwfn, false, 415 "PF uses very old drivers. Please change to a VF driver using no later than 8.8.x.x.\n"); 416 rc = ECORE_INVAL; 417 goto exit; 418 } else { 419 DP_INFO(p_hwfn, 420 "PF is old - try re-acquire to see if it supports FW-version override\n"); 421 req->vfdev_info.capabilities |= 422 VFPF_ACQUIRE_CAP_PRE_FP_HSI; 423 continue; 424 } 425 } 426 427 /* If PF/VF are using same Major, PF must have had 428 * it's reasons. Simply fail. 429 */ 430 DP_NOTICE(p_hwfn, false, 431 "PF rejected acquisition by VF\n"); 432 rc = ECORE_INVAL; 433 goto exit; 434 } else { 435 DP_ERR(p_hwfn, "PF returned error %d to VF acquisition request\n", 436 resp->hdr.status); 437 rc = ECORE_AGAIN; 438 goto exit; 439 } 440 } 441 442 /* Mark the PF as legacy, if needed */ 443 if (req->vfdev_info.capabilities & 444 VFPF_ACQUIRE_CAP_PRE_FP_HSI) 445 p_iov->b_pre_fp_hsi = true; 446 447 /* In case PF doesn't support multi-queue Tx, update the number of 448 * CIDs to reflect the number of queues [older PFs didn't fill that 449 * field]. 450 */ 451 if (!(resp->pfdev_info.capabilities & 452 PFVF_ACQUIRE_CAP_QUEUE_QIDS)) 453 resp->resc.num_cids = resp->resc.num_rxqs + 454 resp->resc.num_txqs; 455 456 #ifndef LINUX_REMOVE 457 rc = OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, &resp->resc); 458 if (rc) { 459 DP_NOTICE(p_hwfn, true, 460 "VF_UPDATE_ACQUIRE_RESC_RESP Failed: status = 0x%x.\n", 461 rc); 462 rc = ECORE_AGAIN; 463 goto exit; 464 } 465 #endif 466 467 /* Update bulletin board size with response from PF */ 468 p_iov->bulletin.size = resp->bulletin_size; 469 470 /* get HW info */ 471 p_hwfn->p_dev->type = resp->pfdev_info.dev_type; 472 p_hwfn->p_dev->chip_rev = (u8) resp->pfdev_info.chip_rev; 473 474 DP_INFO(p_hwfn, "Chip details - %s%d\n", 475 ECORE_IS_BB(p_hwfn->p_dev) ? "BB" : "AH", 476 CHIP_REV_IS_A0(p_hwfn->p_dev) ? 0 : 1); 477 478 p_hwfn->p_dev->chip_num = pfdev_info->chip_num & 0xffff; 479 480 /* Learn of the possibility of CMT */ 481 if (IS_LEAD_HWFN(p_hwfn)) { 482 if (resp->pfdev_info.capabilities & PFVF_ACQUIRE_CAP_100G) { 483 DP_NOTICE(p_hwfn, false, "100g VF\n"); 484 p_hwfn->p_dev->num_hwfns = 2; 485 } 486 } 487 488 eth_hsi_minor_ver = ETH_HSI_VER_MINOR; 489 490 if (!p_iov->b_pre_fp_hsi && 491 (eth_hsi_minor_ver) && 492 (resp->pfdev_info.minor_fp_hsi < ETH_HSI_VER_MINOR)) { 493 DP_INFO(p_hwfn, 494 "PF is using older fastpath HSI; %02x.%02x is configured\n", 495 ETH_HSI_VER_MAJOR, 496 resp->pfdev_info.minor_fp_hsi); 497 } 498 499 exit: 500 ecore_vf_pf_req_end(p_hwfn, rc); 501 502 return rc; 503 } 504 505 u32 ecore_vf_hw_bar_size(struct ecore_hwfn *p_hwfn, 506 enum BAR_ID bar_id) 507 { 508 u32 bar_size; 509 510 /* Regview size is fixed */ 511 if (bar_id == BAR_ID_0) 512 return 1 << 17; 513 514 /* Doorbell is received from PF */ 515 bar_size = p_hwfn->vf_iov_info->acquire_resp.pfdev_info.bar_size; 516 if (bar_size) 517 return 1 << bar_size; 518 return 0; 519 } 520 521 enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_hwfn *p_hwfn) 522 { 523 struct ecore_hwfn *p_lead = ECORE_LEADING_HWFN(p_hwfn->p_dev); 524 struct ecore_vf_iov *p_iov; 525 u32 reg; 526 enum _ecore_status_t rc; 527 528 /* Set number of hwfns - might be overriden once leading hwfn learns 529 * actual configuration from PF. 530 */ 531 if (IS_LEAD_HWFN(p_hwfn)) 532 p_hwfn->p_dev->num_hwfns = 1; 533 534 reg = PXP_VF_BAR0_ME_OPAQUE_ADDRESS; 535 p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn, reg); 536 537 reg = PXP_VF_BAR0_ME_CONCRETE_ADDRESS; 538 p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, reg); 539 540 /* Allocate vf sriov info */ 541 p_iov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_iov)); 542 if (!p_iov) { 543 DP_NOTICE(p_hwfn, true, "Failed to allocate `struct ecore_sriov'\n"); 544 return ECORE_NOMEM; 545 } 546 547 /* Doorbells are tricky; Upper-layer has alreday set the hwfn doorbell 548 * value, but there are several incompatibily scenarios where that 549 * would be incorrect and we'd need to override it. 550 */ 551 if (p_hwfn->doorbells == OSAL_NULL) { 552 p_hwfn->doorbells = (u8 OSAL_IOMEM*)p_hwfn->regview + 553 PXP_VF_BAR0_START_DQ; 554 #ifndef LINUX_REMOVE 555 p_hwfn->db_offset = (u8 *)p_hwfn->doorbells - 556 (u8 *)p_hwfn->p_dev->doorbells; 557 #endif 558 559 } else if (p_hwfn == p_lead) { 560 /* For leading hw-function, value is always correct, but need 561 * to handle scenario where legacy PF would not support 100g 562 * mapped bars later. 563 */ 564 p_iov->b_doorbell_bar = true; 565 } else { 566 /* here, value would be correct ONLY if the leading hwfn 567 * received indication that mapped-bars are supported. 568 */ 569 if (p_lead->vf_iov_info->b_doorbell_bar) 570 p_iov->b_doorbell_bar = true; 571 #ifdef LINUX_REMOVE 572 else 573 p_hwfn->doorbells = (u8 OSAL_IOMEM*) 574 p_hwfn->regview + 575 PXP_VF_BAR0_START_DQ; 576 #else 577 else { 578 p_hwfn->doorbells = (u8 OSAL_IOMEM*)p_hwfn->regview + 579 PXP_VF_BAR0_START_DQ; 580 p_hwfn->db_offset = (u8 *)p_hwfn->doorbells - 581 (u8 *)p_hwfn->p_dev->doorbells; 582 } 583 #endif 584 585 } 586 587 /* Allocate vf2pf msg */ 588 p_iov->vf2pf_request = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, 589 &p_iov->vf2pf_request_phys, 590 sizeof(union vfpf_tlvs)); 591 if (!p_iov->vf2pf_request) { 592 DP_NOTICE(p_hwfn, true, "Failed to allocate `vf2pf_request' DMA memory\n"); 593 goto free_p_iov; 594 } 595 596 p_iov->pf2vf_reply = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, 597 &p_iov->pf2vf_reply_phys, 598 sizeof(union pfvf_tlvs)); 599 if (!p_iov->pf2vf_reply) { 600 DP_NOTICE(p_hwfn, true, "Failed to allocate `pf2vf_reply' DMA memory\n"); 601 goto free_vf2pf_request; 602 } 603 604 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 605 "VF's Request mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys]\n", 606 p_iov->vf2pf_request, 607 (unsigned long long)p_iov->vf2pf_request_phys, 608 p_iov->pf2vf_reply, 609 (unsigned long long)p_iov->pf2vf_reply_phys); 610 611 /* Allocate Bulletin board */ 612 p_iov->bulletin.size = sizeof(struct ecore_bulletin_content); 613 p_iov->bulletin.p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, 614 &p_iov->bulletin.phys, 615 p_iov->bulletin.size); 616 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 617 "VF's bulletin Board [%p virt 0x%llx phys 0x%08x bytes]\n", 618 p_iov->bulletin.p_virt, 619 (unsigned long long)p_iov->bulletin.phys, 620 p_iov->bulletin.size); 621 622 #ifdef CONFIG_ECORE_LOCK_ALLOC 623 OSAL_MUTEX_ALLOC(p_hwfn, &p_iov->mutex); 624 #endif 625 OSAL_MUTEX_INIT(&p_iov->mutex); 626 627 p_hwfn->vf_iov_info = p_iov; 628 629 p_hwfn->hw_info.personality = ECORE_PCI_ETH; 630 631 rc = ecore_vf_pf_acquire(p_hwfn); 632 633 /* If VF is 100g using a mapped bar and PF is too old to support that, 634 * acquisition would succeed - but the VF would have no way knowing 635 * the size of the doorbell bar configured in HW and thus will not 636 * know how to split it for 2nd hw-function. 637 * In this case we re-try without the indication of the mapped 638 * doorbell. 639 */ 640 if (rc == ECORE_SUCCESS && 641 p_iov->b_doorbell_bar && 642 !ecore_vf_hw_bar_size(p_hwfn, BAR_ID_1) && 643 ECORE_IS_CMT(p_hwfn->p_dev)) { 644 rc = _ecore_vf_pf_release(p_hwfn, false); 645 if (rc != ECORE_SUCCESS) 646 return rc; 647 648 p_iov->b_doorbell_bar = false; 649 p_hwfn->doorbells = (u8 OSAL_IOMEM*)p_hwfn->regview + 650 PXP_VF_BAR0_START_DQ; 651 #ifndef LINUX_REMOVE 652 p_hwfn->db_offset = (u8 *)p_hwfn->doorbells - 653 (u8 *)p_hwfn->p_dev->doorbells; 654 #endif 655 rc = ecore_vf_pf_acquire(p_hwfn); 656 } 657 658 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 659 "Regview [%p], Doorbell [%p], Device-doorbell [%p]\n", 660 p_hwfn->regview, p_hwfn->doorbells, 661 p_hwfn->p_dev->doorbells); 662 663 return rc; 664 665 free_vf2pf_request: 666 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->vf2pf_request, 667 p_iov->vf2pf_request_phys, 668 sizeof(union vfpf_tlvs)); 669 free_p_iov: 670 OSAL_FREE(p_hwfn->p_dev, p_iov); 671 672 return ECORE_NOMEM; 673 } 674 675 #define TSTORM_QZONE_START PXP_VF_BAR0_START_SDM_ZONE_A 676 #define MSTORM_QZONE_START(dev) (TSTORM_QZONE_START + \ 677 (TSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev))) 678 679 static void 680 __ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req, 681 struct ecore_tunn_update_type *p_src, 682 enum ecore_tunn_clss mask, u8 *p_cls) 683 { 684 if (p_src->b_update_mode) { 685 p_req->tun_mode_update_mask |= (1 << mask); 686 687 if (p_src->b_mode_enabled) 688 p_req->tunn_mode |= (1 << mask); 689 } 690 691 *p_cls = p_src->tun_cls; 692 } 693 694 static void 695 ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req, 696 struct ecore_tunn_update_type *p_src, 697 enum ecore_tunn_clss mask, u8 *p_cls, 698 struct ecore_tunn_update_udp_port *p_port, 699 u8 *p_update_port, u16 *p_udp_port) 700 { 701 if (p_port->b_update_port) { 702 *p_update_port = 1; 703 *p_udp_port = p_port->port; 704 } 705 706 __ecore_vf_prep_tunn_req_tlv(p_req, p_src, mask, p_cls); 707 } 708 709 void ecore_vf_set_vf_start_tunn_update_param(struct ecore_tunnel_info *p_tun) 710 { 711 if (p_tun->vxlan.b_mode_enabled) 712 p_tun->vxlan.b_update_mode = true; 713 if (p_tun->l2_geneve.b_mode_enabled) 714 p_tun->l2_geneve.b_update_mode = true; 715 if (p_tun->ip_geneve.b_mode_enabled) 716 p_tun->ip_geneve.b_update_mode = true; 717 if (p_tun->l2_gre.b_mode_enabled) 718 p_tun->l2_gre.b_update_mode = true; 719 if (p_tun->ip_gre.b_mode_enabled) 720 p_tun->ip_gre.b_update_mode = true; 721 722 p_tun->b_update_rx_cls = true; 723 p_tun->b_update_tx_cls = true; 724 } 725 726 static void 727 __ecore_vf_update_tunn_param(struct ecore_tunn_update_type *p_tun, 728 u16 feature_mask, u8 tunn_mode, u8 tunn_cls, 729 enum ecore_tunn_mode val) 730 { 731 if (feature_mask & (1 << val)) { 732 p_tun->b_mode_enabled = tunn_mode; 733 p_tun->tun_cls = tunn_cls; 734 } else { 735 p_tun->b_mode_enabled = false; 736 } 737 } 738 739 static void 740 ecore_vf_update_tunn_param(struct ecore_hwfn *p_hwfn, 741 struct ecore_tunnel_info *p_tun, 742 struct pfvf_update_tunn_param_tlv *p_resp) 743 { 744 /* Update mode and classes provided by PF */ 745 u16 feat_mask = p_resp->tunn_feature_mask; 746 747 __ecore_vf_update_tunn_param(&p_tun->vxlan, feat_mask, 748 p_resp->vxlan_mode, p_resp->vxlan_clss, 749 ECORE_MODE_VXLAN_TUNN); 750 __ecore_vf_update_tunn_param(&p_tun->l2_geneve, feat_mask, 751 p_resp->l2geneve_mode, 752 p_resp->l2geneve_clss, 753 ECORE_MODE_L2GENEVE_TUNN); 754 __ecore_vf_update_tunn_param(&p_tun->ip_geneve, feat_mask, 755 p_resp->ipgeneve_mode, 756 p_resp->ipgeneve_clss, 757 ECORE_MODE_IPGENEVE_TUNN); 758 __ecore_vf_update_tunn_param(&p_tun->l2_gre, feat_mask, 759 p_resp->l2gre_mode, p_resp->l2gre_clss, 760 ECORE_MODE_L2GRE_TUNN); 761 __ecore_vf_update_tunn_param(&p_tun->ip_gre, feat_mask, 762 p_resp->ipgre_mode, p_resp->ipgre_clss, 763 ECORE_MODE_IPGRE_TUNN); 764 p_tun->geneve_port.port = p_resp->geneve_udp_port; 765 p_tun->vxlan_port.port = p_resp->vxlan_udp_port; 766 767 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 768 "tunn mode: vxlan=0x%x, l2geneve=0x%x, ipgeneve=0x%x, l2gre=0x%x, ipgre=0x%x", 769 p_tun->vxlan.b_mode_enabled, p_tun->l2_geneve.b_mode_enabled, 770 p_tun->ip_geneve.b_mode_enabled, 771 p_tun->l2_gre.b_mode_enabled, 772 p_tun->ip_gre.b_mode_enabled); 773 } 774 775 enum _ecore_status_t 776 ecore_vf_pf_tunnel_param_update(struct ecore_hwfn *p_hwfn, 777 struct ecore_tunnel_info *p_src) 778 { 779 struct ecore_tunnel_info *p_tun = &p_hwfn->p_dev->tunnel; 780 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 781 struct pfvf_update_tunn_param_tlv *p_resp; 782 struct vfpf_update_tunn_param_tlv *p_req; 783 enum _ecore_status_t rc; 784 785 p_req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_TUNN_PARAM, 786 sizeof(*p_req)); 787 788 if (p_src->b_update_rx_cls && p_src->b_update_tx_cls) 789 p_req->update_tun_cls = 1; 790 791 ecore_vf_prep_tunn_req_tlv(p_req, &p_src->vxlan, (enum ecore_tunn_clss)ECORE_MODE_VXLAN_TUNN, 792 &p_req->vxlan_clss, &p_src->vxlan_port, 793 &p_req->update_vxlan_port, 794 &p_req->vxlan_port); 795 ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_geneve, 796 (enum ecore_tunn_clss)ECORE_MODE_L2GENEVE_TUNN, 797 &p_req->l2geneve_clss, &p_src->geneve_port, 798 &p_req->update_geneve_port, 799 &p_req->geneve_port); 800 __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_geneve, 801 (enum ecore_tunn_clss)ECORE_MODE_IPGENEVE_TUNN, 802 &p_req->ipgeneve_clss); 803 __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_gre, 804 (enum ecore_tunn_clss)ECORE_MODE_L2GRE_TUNN, &p_req->l2gre_clss); 805 __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_gre, 806 (enum ecore_tunn_clss)ECORE_MODE_IPGRE_TUNN, &p_req->ipgre_clss); 807 808 /* add list termination tlv */ 809 ecore_add_tlv(&p_iov->offset, 810 CHANNEL_TLV_LIST_END, 811 sizeof(struct channel_list_end_tlv)); 812 813 p_resp = &p_iov->pf2vf_reply->tunn_param_resp; 814 rc = ecore_send_msg2pf(p_hwfn, &p_resp->hdr.status, sizeof(*p_resp)); 815 816 if (rc) 817 goto exit; 818 819 if (p_resp->hdr.status != PFVF_STATUS_SUCCESS) { 820 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 821 "Failed to update tunnel parameters\n"); 822 rc = ECORE_INVAL; 823 } 824 825 ecore_vf_update_tunn_param(p_hwfn, p_tun, p_resp); 826 exit: 827 ecore_vf_pf_req_end(p_hwfn, rc); 828 return rc; 829 } 830 831 enum _ecore_status_t 832 ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn, 833 struct ecore_queue_cid *p_cid, 834 u16 bd_max_bytes, 835 dma_addr_t bd_chain_phys_addr, 836 dma_addr_t cqe_pbl_addr, 837 u16 cqe_pbl_size, 838 void OSAL_IOMEM **pp_prod) 839 { 840 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 841 struct pfvf_start_queue_resp_tlv *resp; 842 struct vfpf_start_rxq_tlv *req; 843 u16 rx_qid = p_cid->rel.queue_id; 844 enum _ecore_status_t rc; 845 846 /* clear mailbox and prep first tlv */ 847 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_RXQ, sizeof(*req)); 848 849 req->rx_qid = rx_qid; 850 req->cqe_pbl_addr = cqe_pbl_addr; 851 req->cqe_pbl_size = cqe_pbl_size; 852 req->rxq_addr = bd_chain_phys_addr; 853 req->hw_sb = p_cid->sb_igu_id; 854 req->sb_index = p_cid->sb_idx; 855 req->bd_max_bytes = bd_max_bytes; 856 req->stat_id = -1; /* Keep initialized, for future compatibility */ 857 858 /* If PF is legacy, we'll need to calculate producers ourselves 859 * as well as clean them. 860 */ 861 if (p_iov->b_pre_fp_hsi) { 862 u8 hw_qid = p_iov->acquire_resp.resc.hw_qid[rx_qid]; 863 u32 init_prod_val = 0; 864 865 *pp_prod = (u8 OSAL_IOMEM*) 866 p_hwfn->regview + 867 MSTORM_QZONE_START(p_hwfn->p_dev) + 868 hw_qid * MSTORM_QZONE_SIZE; 869 870 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */ 871 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32), 872 (u32 *)(&init_prod_val)); 873 } 874 875 ecore_vf_pf_add_qid(p_hwfn, p_cid); 876 877 /* add list termination tlv */ 878 ecore_add_tlv(&p_iov->offset, 879 CHANNEL_TLV_LIST_END, 880 sizeof(struct channel_list_end_tlv)); 881 882 resp = &p_iov->pf2vf_reply->queue_start; 883 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 884 if (rc) 885 goto exit; 886 887 if (resp->hdr.status != PFVF_STATUS_SUCCESS) { 888 rc = ECORE_INVAL; 889 goto exit; 890 } 891 892 /* Learn the address of the producer from the response */ 893 if (!p_iov->b_pre_fp_hsi) { 894 u32 init_prod_val = 0; 895 896 *pp_prod = (u8 OSAL_IOMEM *)p_hwfn->regview + resp->offset; 897 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 898 "Rxq[0x%02x]: producer at %p [offset 0x%08x]\n", 899 rx_qid, *pp_prod, resp->offset); 900 901 /* Init the rcq, rx bd and rx sge (if valid) producers to 0. 902 * It was actually the PF's responsibility, but since some 903 * old PFs might fail to do so, we do this as well. 904 */ 905 OSAL_BUILD_BUG_ON(ETH_HSI_VER_MAJOR != 3); 906 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32), 907 (u32 *)&init_prod_val); 908 } 909 910 exit: 911 ecore_vf_pf_req_end(p_hwfn, rc); 912 913 return rc; 914 } 915 916 enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn, 917 struct ecore_queue_cid *p_cid, 918 bool cqe_completion) 919 { 920 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 921 struct vfpf_stop_rxqs_tlv *req; 922 struct pfvf_def_resp_tlv *resp; 923 enum _ecore_status_t rc; 924 925 /* clear mailbox and prep first tlv */ 926 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_RXQS, sizeof(*req)); 927 928 req->rx_qid = p_cid->rel.queue_id; 929 req->num_rxqs = 1; 930 req->cqe_completion = cqe_completion; 931 932 ecore_vf_pf_add_qid(p_hwfn, p_cid); 933 934 /* add list termination tlv */ 935 ecore_add_tlv(&p_iov->offset, 936 CHANNEL_TLV_LIST_END, 937 sizeof(struct channel_list_end_tlv)); 938 939 resp = &p_iov->pf2vf_reply->default_resp; 940 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 941 if (rc) 942 goto exit; 943 944 if (resp->hdr.status != PFVF_STATUS_SUCCESS) { 945 rc = ECORE_INVAL; 946 goto exit; 947 } 948 949 exit: 950 ecore_vf_pf_req_end(p_hwfn, rc); 951 952 return rc; 953 } 954 955 enum _ecore_status_t 956 ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn, 957 struct ecore_queue_cid *p_cid, 958 dma_addr_t pbl_addr, u16 pbl_size, 959 void OSAL_IOMEM **pp_doorbell) 960 { 961 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 962 struct pfvf_start_queue_resp_tlv *resp; 963 struct vfpf_start_txq_tlv *req; 964 u16 qid = p_cid->rel.queue_id; 965 enum _ecore_status_t rc; 966 967 /* clear mailbox and prep first tlv */ 968 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_TXQ, sizeof(*req)); 969 970 req->tx_qid = qid; 971 972 /* Tx */ 973 req->pbl_addr = pbl_addr; 974 req->pbl_size = pbl_size; 975 req->hw_sb = p_cid->sb_igu_id; 976 req->sb_index = p_cid->sb_idx; 977 978 ecore_vf_pf_add_qid(p_hwfn, p_cid); 979 980 /* add list termination tlv */ 981 ecore_add_tlv(&p_iov->offset, 982 CHANNEL_TLV_LIST_END, 983 sizeof(struct channel_list_end_tlv)); 984 985 resp = &p_iov->pf2vf_reply->queue_start; 986 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 987 if (rc) 988 goto exit; 989 990 if (resp->hdr.status != PFVF_STATUS_SUCCESS) { 991 rc = ECORE_INVAL; 992 goto exit; 993 } 994 995 /* Modern PFs provide the actual offsets, while legacy 996 * provided only the queue id. 997 */ 998 if (!p_iov->b_pre_fp_hsi) { 999 *pp_doorbell = (u8 OSAL_IOMEM*)p_hwfn->doorbells + 1000 resp->offset; 1001 } else { 1002 u8 cid = p_iov->acquire_resp.resc.cid[qid]; 1003 1004 *pp_doorbell = (u8 OSAL_IOMEM*)p_hwfn->doorbells + 1005 DB_ADDR_VF(cid, DQ_DEMS_LEGACY); 1006 } 1007 1008 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 1009 "Txq[0x%02x.%02x]: doorbell at %p [offset 0x%08x]\n", 1010 qid, p_cid->qid_usage_idx, *pp_doorbell, resp->offset); 1011 exit: 1012 ecore_vf_pf_req_end(p_hwfn, rc); 1013 1014 return rc; 1015 } 1016 1017 enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn, 1018 struct ecore_queue_cid *p_cid) 1019 { 1020 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1021 struct vfpf_stop_txqs_tlv *req; 1022 struct pfvf_def_resp_tlv *resp; 1023 enum _ecore_status_t rc; 1024 1025 /* clear mailbox and prep first tlv */ 1026 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_TXQS, sizeof(*req)); 1027 1028 req->tx_qid = p_cid->rel.queue_id; 1029 req->num_txqs = 1; 1030 1031 ecore_vf_pf_add_qid(p_hwfn, p_cid); 1032 1033 /* add list termination tlv */ 1034 ecore_add_tlv(&p_iov->offset, 1035 CHANNEL_TLV_LIST_END, 1036 sizeof(struct channel_list_end_tlv)); 1037 1038 resp = &p_iov->pf2vf_reply->default_resp; 1039 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 1040 if (rc) 1041 goto exit; 1042 1043 if (resp->hdr.status != PFVF_STATUS_SUCCESS) { 1044 rc = ECORE_INVAL; 1045 goto exit; 1046 } 1047 1048 exit: 1049 ecore_vf_pf_req_end(p_hwfn, rc); 1050 1051 return rc; 1052 } 1053 1054 #ifndef LINUX_REMOVE 1055 enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn, 1056 struct ecore_queue_cid **pp_cid, 1057 u8 num_rxqs, 1058 u8 comp_cqe_flg, 1059 u8 comp_event_flg) 1060 { 1061 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1062 struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp; 1063 struct vfpf_update_rxq_tlv *req; 1064 enum _ecore_status_t rc; 1065 1066 /* Starting with CHANNEL_TLV_QID and the need for additional queue 1067 * information, this API stopped supporting multiple rxqs. 1068 * TODO - remove this and change the API to accept a single queue-cid 1069 * in a follow-up patch. 1070 */ 1071 if (num_rxqs != 1) { 1072 DP_NOTICE(p_hwfn, true, 1073 "VFs can no longer update more than a single queue\n"); 1074 return ECORE_INVAL; 1075 } 1076 1077 /* clear mailbox and prep first tlv */ 1078 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_RXQ, sizeof(*req)); 1079 1080 req->rx_qid = (*pp_cid)->rel.queue_id; 1081 req->num_rxqs = 1; 1082 1083 if (comp_cqe_flg) 1084 req->flags |= VFPF_RXQ_UPD_COMPLETE_CQE_FLAG; 1085 if (comp_event_flg) 1086 req->flags |= VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG; 1087 1088 ecore_vf_pf_add_qid(p_hwfn, *pp_cid); 1089 1090 /* add list termination tlv */ 1091 ecore_add_tlv(&p_iov->offset, 1092 CHANNEL_TLV_LIST_END, 1093 sizeof(struct channel_list_end_tlv)); 1094 1095 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 1096 if (rc) 1097 goto exit; 1098 1099 if (resp->hdr.status != PFVF_STATUS_SUCCESS) { 1100 rc = ECORE_INVAL; 1101 goto exit; 1102 } 1103 1104 exit: 1105 ecore_vf_pf_req_end(p_hwfn, rc); 1106 return rc; 1107 } 1108 #endif 1109 1110 enum _ecore_status_t ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn, 1111 u8 vport_id, 1112 u16 mtu, 1113 u8 inner_vlan_removal, 1114 enum ecore_tpa_mode tpa_mode, 1115 u8 max_buffers_per_cqe, 1116 u8 only_untagged, 1117 u8 zero_placement_offset) 1118 { 1119 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1120 struct vfpf_vport_start_tlv *req; 1121 struct pfvf_def_resp_tlv *resp; 1122 enum _ecore_status_t rc; 1123 int i; 1124 1125 /* clear mailbox and prep first tlv */ 1126 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_START, sizeof(*req)); 1127 1128 req->mtu = mtu; 1129 req->vport_id = vport_id; 1130 req->inner_vlan_removal = inner_vlan_removal; 1131 req->tpa_mode = tpa_mode; 1132 req->max_buffers_per_cqe = max_buffers_per_cqe; 1133 req->only_untagged = only_untagged; 1134 req->zero_placement_offset = zero_placement_offset; 1135 1136 /* status blocks */ 1137 for (i = 0; i < p_hwfn->vf_iov_info->acquire_resp.resc.num_sbs; i++) { 1138 struct ecore_sb_info *p_sb = p_hwfn->vf_iov_info->sbs_info[i]; 1139 1140 if (p_sb) 1141 req->sb_addr[i] = p_sb->sb_phys; 1142 } 1143 1144 /* add list termination tlv */ 1145 ecore_add_tlv(&p_iov->offset, 1146 CHANNEL_TLV_LIST_END, 1147 sizeof(struct channel_list_end_tlv)); 1148 1149 resp = &p_iov->pf2vf_reply->default_resp; 1150 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 1151 if (rc) 1152 goto exit; 1153 1154 if (resp->hdr.status != PFVF_STATUS_SUCCESS) { 1155 rc = ECORE_INVAL; 1156 goto exit; 1157 } 1158 1159 exit: 1160 ecore_vf_pf_req_end(p_hwfn, rc); 1161 1162 return rc; 1163 } 1164 1165 enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn) 1166 { 1167 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1168 struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp; 1169 enum _ecore_status_t rc; 1170 1171 /* clear mailbox and prep first tlv */ 1172 ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_TEARDOWN, 1173 sizeof(struct vfpf_first_tlv)); 1174 1175 /* add list termination tlv */ 1176 ecore_add_tlv(&p_iov->offset, 1177 CHANNEL_TLV_LIST_END, 1178 sizeof(struct channel_list_end_tlv)); 1179 1180 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 1181 if (rc) 1182 goto exit; 1183 1184 if (resp->hdr.status != PFVF_STATUS_SUCCESS) { 1185 rc = ECORE_INVAL; 1186 goto exit; 1187 } 1188 1189 exit: 1190 ecore_vf_pf_req_end(p_hwfn, rc); 1191 1192 return rc; 1193 } 1194 1195 static bool 1196 ecore_vf_handle_vp_update_is_needed(struct ecore_hwfn *p_hwfn, 1197 struct ecore_sp_vport_update_params *p_data, 1198 u16 tlv) 1199 { 1200 switch (tlv) { 1201 case CHANNEL_TLV_VPORT_UPDATE_ACTIVATE: 1202 return !!(p_data->update_vport_active_rx_flg || 1203 p_data->update_vport_active_tx_flg); 1204 case CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH: 1205 #ifndef ASIC_ONLY 1206 /* FPGA doesn't have PVFC and so can't support tx-switching */ 1207 return !!(p_data->update_tx_switching_flg && 1208 !CHIP_REV_IS_FPGA(p_hwfn->p_dev)); 1209 #else 1210 return !!p_data->update_tx_switching_flg; 1211 #endif 1212 case CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP: 1213 return !!p_data->update_inner_vlan_removal_flg; 1214 case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN: 1215 return !!p_data->update_accept_any_vlan_flg; 1216 case CHANNEL_TLV_VPORT_UPDATE_MCAST: 1217 return !!p_data->update_approx_mcast_flg; 1218 case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM: 1219 return !!(p_data->accept_flags.update_rx_mode_config || 1220 p_data->accept_flags.update_tx_mode_config); 1221 case CHANNEL_TLV_VPORT_UPDATE_RSS: 1222 return !!p_data->rss_params; 1223 case CHANNEL_TLV_VPORT_UPDATE_SGE_TPA: 1224 return !!p_data->sge_tpa_params; 1225 default: 1226 DP_INFO(p_hwfn, "Unexpected vport-update TLV[%d] %s\n", 1227 tlv, ecore_channel_tlvs_string[tlv]); 1228 return false; 1229 } 1230 } 1231 1232 static void 1233 ecore_vf_handle_vp_update_tlvs_resp(struct ecore_hwfn *p_hwfn, 1234 struct ecore_sp_vport_update_params *p_data) 1235 { 1236 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1237 struct pfvf_def_resp_tlv *p_resp; 1238 u16 tlv; 1239 1240 for (tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE; 1241 tlv < CHANNEL_TLV_VPORT_UPDATE_MAX; 1242 tlv++) { 1243 if (!ecore_vf_handle_vp_update_is_needed(p_hwfn, p_data, tlv)) 1244 continue; 1245 1246 p_resp = (struct pfvf_def_resp_tlv *) 1247 ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, 1248 tlv); 1249 if (p_resp && p_resp->hdr.status) 1250 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 1251 "TLV[%d] type %s Configuration %s\n", 1252 tlv, ecore_channel_tlvs_string[tlv], 1253 (p_resp && p_resp->hdr.status) ? "succeeded" 1254 : "failed"); 1255 } 1256 } 1257 1258 enum _ecore_status_t ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn, 1259 struct ecore_sp_vport_update_params *p_params) 1260 { 1261 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1262 struct vfpf_vport_update_tlv *req; 1263 struct pfvf_def_resp_tlv *resp; 1264 u8 update_rx, update_tx; 1265 u32 resp_size = 0; 1266 u16 size, tlv; 1267 enum _ecore_status_t rc; 1268 1269 resp = &p_iov->pf2vf_reply->default_resp; 1270 resp_size = sizeof(*resp); 1271 1272 update_rx = p_params->update_vport_active_rx_flg; 1273 update_tx = p_params->update_vport_active_tx_flg; 1274 1275 /* clear mailbox and prep header tlv */ 1276 ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_UPDATE, sizeof(*req)); 1277 1278 /* Prepare extended tlvs */ 1279 if (update_rx || update_tx) { 1280 struct vfpf_vport_update_activate_tlv *p_act_tlv; 1281 1282 size = sizeof(struct vfpf_vport_update_activate_tlv); 1283 p_act_tlv = ecore_add_tlv(&p_iov->offset, 1284 CHANNEL_TLV_VPORT_UPDATE_ACTIVATE, 1285 size); 1286 resp_size += sizeof(struct pfvf_def_resp_tlv); 1287 1288 if (update_rx) { 1289 p_act_tlv->update_rx = update_rx; 1290 p_act_tlv->active_rx = p_params->vport_active_rx_flg; 1291 } 1292 1293 if (update_tx) { 1294 p_act_tlv->update_tx = update_tx; 1295 p_act_tlv->active_tx = p_params->vport_active_tx_flg; 1296 } 1297 } 1298 1299 #ifndef ECORE_UPSTREAM 1300 if (p_params->update_inner_vlan_removal_flg) { 1301 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv; 1302 1303 size = sizeof(struct vfpf_vport_update_vlan_strip_tlv); 1304 p_vlan_tlv = ecore_add_tlv(&p_iov->offset, 1305 CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP, 1306 size); 1307 resp_size += sizeof(struct pfvf_def_resp_tlv); 1308 1309 p_vlan_tlv->remove_vlan = p_params->inner_vlan_removal_flg; 1310 } 1311 #endif 1312 1313 if (p_params->update_tx_switching_flg) { 1314 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv; 1315 1316 size = sizeof(struct vfpf_vport_update_tx_switch_tlv); 1317 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH; 1318 p_tx_switch_tlv = ecore_add_tlv(&p_iov->offset, 1319 tlv, size); 1320 resp_size += sizeof(struct pfvf_def_resp_tlv); 1321 1322 p_tx_switch_tlv->tx_switching = p_params->tx_switching_flg; 1323 } 1324 1325 if (p_params->update_approx_mcast_flg) { 1326 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv; 1327 1328 size = sizeof(struct vfpf_vport_update_mcast_bin_tlv); 1329 p_mcast_tlv = ecore_add_tlv(&p_iov->offset, 1330 CHANNEL_TLV_VPORT_UPDATE_MCAST, 1331 size); 1332 resp_size += sizeof(struct pfvf_def_resp_tlv); 1333 1334 OSAL_MEMCPY(p_mcast_tlv->bins, p_params->bins, 1335 sizeof(u32) * ETH_MULTICAST_MAC_BINS_IN_REGS); 1336 } 1337 1338 update_rx = p_params->accept_flags.update_rx_mode_config; 1339 update_tx = p_params->accept_flags.update_tx_mode_config; 1340 1341 if (update_rx || update_tx) { 1342 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv; 1343 1344 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM; 1345 size = sizeof(struct vfpf_vport_update_accept_param_tlv); 1346 p_accept_tlv = ecore_add_tlv(&p_iov->offset, tlv, size); 1347 resp_size += sizeof(struct pfvf_def_resp_tlv); 1348 1349 if (update_rx) { 1350 p_accept_tlv->update_rx_mode = update_rx; 1351 p_accept_tlv->rx_accept_filter = 1352 p_params->accept_flags.rx_accept_filter; 1353 } 1354 1355 if (update_tx) { 1356 p_accept_tlv->update_tx_mode = update_tx; 1357 p_accept_tlv->tx_accept_filter = 1358 p_params->accept_flags.tx_accept_filter; 1359 } 1360 } 1361 1362 if (p_params->rss_params) { 1363 struct ecore_rss_params *rss_params = p_params->rss_params; 1364 struct vfpf_vport_update_rss_tlv *p_rss_tlv; 1365 int i, table_size; 1366 1367 size = sizeof(struct vfpf_vport_update_rss_tlv); 1368 p_rss_tlv = ecore_add_tlv(&p_iov->offset, 1369 CHANNEL_TLV_VPORT_UPDATE_RSS, size); 1370 resp_size += sizeof(struct pfvf_def_resp_tlv); 1371 1372 if (rss_params->update_rss_config) 1373 p_rss_tlv->update_rss_flags |= 1374 VFPF_UPDATE_RSS_CONFIG_FLAG; 1375 if (rss_params->update_rss_capabilities) 1376 p_rss_tlv->update_rss_flags |= 1377 VFPF_UPDATE_RSS_CAPS_FLAG; 1378 if (rss_params->update_rss_ind_table) 1379 p_rss_tlv->update_rss_flags |= 1380 VFPF_UPDATE_RSS_IND_TABLE_FLAG; 1381 if (rss_params->update_rss_key) 1382 p_rss_tlv->update_rss_flags |= 1383 VFPF_UPDATE_RSS_KEY_FLAG; 1384 1385 p_rss_tlv->rss_enable = rss_params->rss_enable; 1386 p_rss_tlv->rss_caps = rss_params->rss_caps; 1387 p_rss_tlv->rss_table_size_log = rss_params->rss_table_size_log; 1388 1389 table_size = OSAL_MIN_T(int, T_ETH_INDIRECTION_TABLE_SIZE, 1390 1 << p_rss_tlv->rss_table_size_log); 1391 for (i = 0; i < table_size; i++) { 1392 struct ecore_queue_cid *p_queue; 1393 1394 p_queue = rss_params->rss_ind_table[i]; 1395 p_rss_tlv->rss_ind_table[i] = p_queue->rel.queue_id; 1396 } 1397 1398 OSAL_MEMCPY(p_rss_tlv->rss_key, rss_params->rss_key, 1399 sizeof(rss_params->rss_key)); 1400 } 1401 1402 if (p_params->update_accept_any_vlan_flg) { 1403 struct vfpf_vport_update_accept_any_vlan_tlv *p_any_vlan_tlv; 1404 1405 size = sizeof(struct vfpf_vport_update_accept_any_vlan_tlv); 1406 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN; 1407 p_any_vlan_tlv = ecore_add_tlv(&p_iov->offset, tlv, size); 1408 1409 resp_size += sizeof(struct pfvf_def_resp_tlv); 1410 p_any_vlan_tlv->accept_any_vlan = p_params->accept_any_vlan; 1411 p_any_vlan_tlv->update_accept_any_vlan_flg = 1412 p_params->update_accept_any_vlan_flg; 1413 } 1414 1415 #ifndef LINUX_REMOVE 1416 if (p_params->sge_tpa_params) { 1417 struct ecore_sge_tpa_params *sge_tpa_params; 1418 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv; 1419 1420 sge_tpa_params = p_params->sge_tpa_params; 1421 size = sizeof(struct vfpf_vport_update_sge_tpa_tlv); 1422 p_sge_tpa_tlv = ecore_add_tlv(&p_iov->offset, 1423 CHANNEL_TLV_VPORT_UPDATE_SGE_TPA, 1424 size); 1425 resp_size += sizeof(struct pfvf_def_resp_tlv); 1426 1427 if (sge_tpa_params->update_tpa_en_flg) 1428 p_sge_tpa_tlv->update_sge_tpa_flags |= 1429 VFPF_UPDATE_TPA_EN_FLAG; 1430 if (sge_tpa_params->update_tpa_param_flg) 1431 p_sge_tpa_tlv->update_sge_tpa_flags |= 1432 VFPF_UPDATE_TPA_PARAM_FLAG; 1433 1434 if (sge_tpa_params->tpa_ipv4_en_flg) 1435 p_sge_tpa_tlv->sge_tpa_flags |= 1436 VFPF_TPA_IPV4_EN_FLAG; 1437 if (sge_tpa_params->tpa_ipv6_en_flg) 1438 p_sge_tpa_tlv->sge_tpa_flags |= 1439 VFPF_TPA_IPV6_EN_FLAG; 1440 if (sge_tpa_params->tpa_pkt_split_flg) 1441 p_sge_tpa_tlv->sge_tpa_flags |= 1442 VFPF_TPA_PKT_SPLIT_FLAG; 1443 if (sge_tpa_params->tpa_hdr_data_split_flg) 1444 p_sge_tpa_tlv->sge_tpa_flags |= 1445 VFPF_TPA_HDR_DATA_SPLIT_FLAG; 1446 if (sge_tpa_params->tpa_gro_consistent_flg) 1447 p_sge_tpa_tlv->sge_tpa_flags |= 1448 VFPF_TPA_GRO_CONSIST_FLAG; 1449 1450 p_sge_tpa_tlv->tpa_max_aggs_num = 1451 sge_tpa_params->tpa_max_aggs_num; 1452 p_sge_tpa_tlv->tpa_max_size = sge_tpa_params->tpa_max_size; 1453 p_sge_tpa_tlv->tpa_min_size_to_start = 1454 sge_tpa_params->tpa_min_size_to_start; 1455 p_sge_tpa_tlv->tpa_min_size_to_cont = 1456 sge_tpa_params->tpa_min_size_to_cont; 1457 1458 p_sge_tpa_tlv->max_buffers_per_cqe = 1459 sge_tpa_params->max_buffers_per_cqe; 1460 } 1461 #endif 1462 1463 /* add list termination tlv */ 1464 ecore_add_tlv(&p_iov->offset, 1465 CHANNEL_TLV_LIST_END, 1466 sizeof(struct channel_list_end_tlv)); 1467 1468 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, resp_size); 1469 if (rc) 1470 goto exit; 1471 1472 if (resp->hdr.status != PFVF_STATUS_SUCCESS) { 1473 rc = ECORE_INVAL; 1474 goto exit; 1475 } 1476 1477 ecore_vf_handle_vp_update_tlvs_resp(p_hwfn, p_params); 1478 1479 exit: 1480 ecore_vf_pf_req_end(p_hwfn, rc); 1481 1482 return rc; 1483 } 1484 1485 enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn) 1486 { 1487 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1488 struct pfvf_def_resp_tlv *resp; 1489 struct vfpf_first_tlv *req; 1490 enum _ecore_status_t rc; 1491 1492 /* clear mailbox and prep first tlv */ 1493 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_CLOSE, sizeof(*req)); 1494 1495 /* add list termination tlv */ 1496 ecore_add_tlv(&p_iov->offset, 1497 CHANNEL_TLV_LIST_END, 1498 sizeof(struct channel_list_end_tlv)); 1499 1500 resp = &p_iov->pf2vf_reply->default_resp; 1501 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 1502 if (rc) 1503 goto exit; 1504 1505 if (resp->hdr.status != PFVF_STATUS_SUCCESS) { 1506 rc = ECORE_AGAIN; 1507 goto exit; 1508 } 1509 1510 p_hwfn->b_int_enabled = 0; 1511 1512 exit: 1513 ecore_vf_pf_req_end(p_hwfn, rc); 1514 1515 return rc; 1516 } 1517 1518 void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn, 1519 struct ecore_filter_mcast *p_filter_cmd) 1520 { 1521 struct ecore_sp_vport_update_params sp_params; 1522 int i; 1523 1524 OSAL_MEMSET(&sp_params, 0, sizeof(sp_params)); 1525 sp_params.update_approx_mcast_flg = 1; 1526 1527 if (p_filter_cmd->opcode == ECORE_FILTER_ADD) { 1528 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) { 1529 u32 bit; 1530 1531 bit = ecore_mcast_bin_from_mac(p_filter_cmd->mac[i]); 1532 sp_params.bins[bit / 32] |= 1 << (bit % 32); 1533 } 1534 } 1535 1536 ecore_vf_pf_vport_update(p_hwfn, &sp_params); 1537 } 1538 1539 enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn, 1540 struct ecore_filter_ucast *p_ucast) 1541 { 1542 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1543 struct vfpf_ucast_filter_tlv *req; 1544 struct pfvf_def_resp_tlv *resp; 1545 enum _ecore_status_t rc; 1546 1547 #ifndef LINUX_REMOVE 1548 /* Sanitize */ 1549 if (p_ucast->opcode == ECORE_FILTER_MOVE) { 1550 DP_NOTICE(p_hwfn, true, "VFs don't support Moving of filters\n"); 1551 return ECORE_INVAL; 1552 } 1553 #endif 1554 1555 /* clear mailbox and prep first tlv */ 1556 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UCAST_FILTER, sizeof(*req)); 1557 req->opcode = (u8)p_ucast->opcode; 1558 req->type = (u8)p_ucast->type; 1559 OSAL_MEMCPY(req->mac, p_ucast->mac, ETH_ALEN); 1560 req->vlan = p_ucast->vlan; 1561 1562 /* add list termination tlv */ 1563 ecore_add_tlv(&p_iov->offset, 1564 CHANNEL_TLV_LIST_END, 1565 sizeof(struct channel_list_end_tlv)); 1566 1567 resp = &p_iov->pf2vf_reply->default_resp; 1568 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 1569 if (rc) 1570 goto exit; 1571 1572 if (resp->hdr.status != PFVF_STATUS_SUCCESS) { 1573 rc = ECORE_AGAIN; 1574 goto exit; 1575 } 1576 1577 exit: 1578 ecore_vf_pf_req_end(p_hwfn, rc); 1579 1580 return rc; 1581 } 1582 1583 enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn) 1584 { 1585 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1586 struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp; 1587 enum _ecore_status_t rc; 1588 1589 /* clear mailbox and prep first tlv */ 1590 ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_INT_CLEANUP, 1591 sizeof(struct vfpf_first_tlv)); 1592 1593 /* add list termination tlv */ 1594 ecore_add_tlv(&p_iov->offset, 1595 CHANNEL_TLV_LIST_END, 1596 sizeof(struct channel_list_end_tlv)); 1597 1598 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 1599 if (rc) 1600 goto exit; 1601 1602 if (resp->hdr.status != PFVF_STATUS_SUCCESS) { 1603 rc = ECORE_INVAL; 1604 goto exit; 1605 } 1606 1607 exit: 1608 ecore_vf_pf_req_end(p_hwfn, rc); 1609 1610 return rc; 1611 } 1612 1613 enum _ecore_status_t ecore_vf_pf_get_coalesce(struct ecore_hwfn *p_hwfn, 1614 u16 *p_coal, 1615 struct ecore_queue_cid *p_cid) 1616 { 1617 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1618 struct pfvf_read_coal_resp_tlv *resp; 1619 struct vfpf_read_coal_req_tlv *req; 1620 enum _ecore_status_t rc; 1621 1622 /* clear mailbox and prep header tlv */ 1623 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_READ, 1624 sizeof(*req)); 1625 req->qid = p_cid->rel.queue_id; 1626 req->is_rx = p_cid->b_is_rx ? 1 : 0; 1627 1628 ecore_add_tlv(&p_iov->offset, CHANNEL_TLV_LIST_END, 1629 sizeof(struct channel_list_end_tlv)); 1630 resp = &p_iov->pf2vf_reply->read_coal_resp; 1631 1632 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 1633 if (rc != ECORE_SUCCESS) 1634 goto exit; 1635 1636 if (resp->hdr.status != PFVF_STATUS_SUCCESS) 1637 goto exit; 1638 1639 *p_coal = resp->coal; 1640 exit: 1641 ecore_vf_pf_req_end(p_hwfn, rc); 1642 1643 return rc; 1644 } 1645 1646 enum _ecore_status_t 1647 ecore_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn, u16 rx_coal, u16 tx_coal, 1648 struct ecore_queue_cid *p_cid) 1649 { 1650 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1651 struct vfpf_update_coalesce *req; 1652 struct pfvf_def_resp_tlv *resp; 1653 enum _ecore_status_t rc; 1654 1655 /* clear mailbox and prep header tlv */ 1656 req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_UPDATE, 1657 sizeof(*req)); 1658 1659 req->rx_coal = rx_coal; 1660 req->tx_coal = tx_coal; 1661 req->qid = p_cid->rel.queue_id; 1662 1663 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 1664 "Setting coalesce rx_coal = %d, tx_coal = %d at queue = %d\n", 1665 rx_coal, tx_coal, req->qid); 1666 1667 /* add list termination tlv */ 1668 ecore_add_tlv(&p_iov->offset, CHANNEL_TLV_LIST_END, 1669 sizeof(struct channel_list_end_tlv)); 1670 1671 resp = &p_iov->pf2vf_reply->default_resp; 1672 rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp)); 1673 1674 if (rc != ECORE_SUCCESS) 1675 goto exit; 1676 1677 if (resp->hdr.status != PFVF_STATUS_SUCCESS) 1678 goto exit; 1679 1680 p_hwfn->p_dev->rx_coalesce_usecs = rx_coal; 1681 p_hwfn->p_dev->tx_coalesce_usecs = tx_coal; 1682 1683 exit: 1684 ecore_vf_pf_req_end(p_hwfn, rc); 1685 return rc; 1686 } 1687 1688 u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn, 1689 u16 sb_id) 1690 { 1691 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1692 1693 if (!p_iov) { 1694 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n"); 1695 return 0; 1696 } 1697 1698 return p_iov->acquire_resp.resc.hw_sbs[sb_id].hw_sb_id; 1699 } 1700 1701 void ecore_vf_set_sb_info(struct ecore_hwfn *p_hwfn, 1702 u16 sb_id, struct ecore_sb_info *p_sb) 1703 { 1704 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1705 1706 if (!p_iov) { 1707 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n"); 1708 return; 1709 } 1710 1711 if (sb_id >= PFVF_MAX_SBS_PER_VF) { 1712 DP_NOTICE(p_hwfn, true, "Can't configure SB %04x\n", sb_id); 1713 return; 1714 } 1715 1716 p_iov->sbs_info[sb_id] = p_sb; 1717 } 1718 1719 enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn *p_hwfn, 1720 u8 *p_change) 1721 { 1722 struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info; 1723 struct ecore_bulletin_content shadow; 1724 u32 crc, crc_size; 1725 1726 crc_size = sizeof(p_iov->bulletin.p_virt->crc); 1727 *p_change = 0; 1728 1729 /* Need to guarantee PF is not in the middle of writing it */ 1730 OSAL_MEMCPY(&shadow, p_iov->bulletin.p_virt, p_iov->bulletin.size); 1731 1732 /* If version did not update, no need to do anything */ 1733 if (shadow.version == p_iov->bulletin_shadow.version) 1734 return ECORE_SUCCESS; 1735 1736 /* Verify the bulletin we see is valid */ 1737 crc = OSAL_CRC32(0, (u8 *)&shadow + crc_size, 1738 p_iov->bulletin.size - crc_size); 1739 if (crc != shadow.crc) 1740 return ECORE_AGAIN; 1741 1742 /* Set the shadow bulletin and process it */ 1743 OSAL_MEMCPY(&p_iov->bulletin_shadow, &shadow, p_iov->bulletin.size); 1744 1745 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, 1746 "Read a bulletin update %08x\n", shadow.version); 1747 1748 *p_change = 1; 1749 1750 return ECORE_SUCCESS; 1751 } 1752 1753 void __ecore_vf_get_link_params(struct ecore_mcp_link_params *p_params, 1754 struct ecore_bulletin_content *p_bulletin) 1755 { 1756 OSAL_MEMSET(p_params, 0, sizeof(*p_params)); 1757 1758 p_params->speed.autoneg = p_bulletin->req_autoneg; 1759 p_params->speed.advertised_speeds = p_bulletin->req_adv_speed; 1760 p_params->speed.forced_speed = p_bulletin->req_forced_speed; 1761 p_params->pause.autoneg = p_bulletin->req_autoneg_pause; 1762 p_params->pause.forced_rx = p_bulletin->req_forced_rx; 1763 p_params->pause.forced_tx = p_bulletin->req_forced_tx; 1764 p_params->loopback_mode = p_bulletin->req_loopback; 1765 } 1766 1767 void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn, 1768 struct ecore_mcp_link_params *params) 1769 { 1770 __ecore_vf_get_link_params(params, 1771 &(p_hwfn->vf_iov_info->bulletin_shadow)); 1772 } 1773 1774 void __ecore_vf_get_link_state(struct ecore_mcp_link_state *p_link, 1775 struct ecore_bulletin_content *p_bulletin) 1776 { 1777 OSAL_MEMSET(p_link, 0, sizeof(*p_link)); 1778 1779 p_link->link_up = p_bulletin->link_up; 1780 p_link->speed = p_bulletin->speed; 1781 p_link->full_duplex = p_bulletin->full_duplex; 1782 p_link->an = p_bulletin->autoneg; 1783 p_link->an_complete = p_bulletin->autoneg_complete; 1784 p_link->parallel_detection = p_bulletin->parallel_detection; 1785 p_link->pfc_enabled = p_bulletin->pfc_enabled; 1786 p_link->partner_adv_speed = p_bulletin->partner_adv_speed; 1787 p_link->partner_tx_flow_ctrl_en = p_bulletin->partner_tx_flow_ctrl_en; 1788 p_link->partner_rx_flow_ctrl_en = p_bulletin->partner_rx_flow_ctrl_en; 1789 p_link->partner_adv_pause = p_bulletin->partner_adv_pause; 1790 p_link->sfp_tx_fault = p_bulletin->sfp_tx_fault; 1791 } 1792 1793 void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn, 1794 struct ecore_mcp_link_state *link) 1795 { 1796 __ecore_vf_get_link_state(link, 1797 &(p_hwfn->vf_iov_info->bulletin_shadow)); 1798 } 1799 1800 void __ecore_vf_get_link_caps(struct ecore_mcp_link_capabilities *p_link_caps, 1801 struct ecore_bulletin_content *p_bulletin) 1802 { 1803 OSAL_MEMSET(p_link_caps, 0, sizeof(*p_link_caps)); 1804 p_link_caps->speed_capabilities = p_bulletin->capability_speed; 1805 } 1806 1807 void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn, 1808 struct ecore_mcp_link_capabilities *p_link_caps) 1809 { 1810 __ecore_vf_get_link_caps(p_link_caps, 1811 &(p_hwfn->vf_iov_info->bulletin_shadow)); 1812 } 1813 1814 void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn, 1815 u8 *num_rxqs) 1816 { 1817 *num_rxqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_rxqs; 1818 } 1819 1820 void ecore_vf_get_num_txqs(struct ecore_hwfn *p_hwfn, 1821 u8 *num_txqs) 1822 { 1823 *num_txqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_txqs; 1824 } 1825 1826 void ecore_vf_get_num_cids(struct ecore_hwfn *p_hwfn, 1827 u8 *num_cids) 1828 { 1829 *num_cids = p_hwfn->vf_iov_info->acquire_resp.resc.num_cids; 1830 } 1831 1832 void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn, 1833 u8 *port_mac) 1834 { 1835 OSAL_MEMCPY(port_mac, 1836 p_hwfn->vf_iov_info->acquire_resp.pfdev_info.port_mac, 1837 ETH_ALEN); 1838 } 1839 1840 void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn, 1841 u8 *num_vlan_filters) 1842 { 1843 struct ecore_vf_iov *p_vf; 1844 1845 p_vf = p_hwfn->vf_iov_info; 1846 *num_vlan_filters = p_vf->acquire_resp.resc.num_vlan_filters; 1847 } 1848 1849 void ecore_vf_get_num_mac_filters(struct ecore_hwfn *p_hwfn, 1850 u8 *num_mac_filters) 1851 { 1852 struct ecore_vf_iov *p_vf = p_hwfn->vf_iov_info; 1853 1854 *num_mac_filters = p_vf->acquire_resp.resc.num_mac_filters; 1855 } 1856 1857 bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac) 1858 { 1859 struct ecore_bulletin_content *bulletin; 1860 1861 bulletin = &p_hwfn->vf_iov_info->bulletin_shadow; 1862 if (!(bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED))) 1863 return true; 1864 1865 /* Forbid VF from changing a MAC enforced by PF */ 1866 if (OSAL_MEMCMP(bulletin->mac, mac, ETH_ALEN)) 1867 return false; 1868 1869 return false; 1870 } 1871 1872 bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn *hwfn, u8 *dst_mac, 1873 u8 *p_is_forced) 1874 { 1875 struct ecore_bulletin_content *bulletin; 1876 1877 bulletin = &hwfn->vf_iov_info->bulletin_shadow; 1878 1879 if (bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) { 1880 if (p_is_forced) 1881 *p_is_forced = 1; 1882 } else if (bulletin->valid_bitmap & (1 << VFPF_BULLETIN_MAC_ADDR)) { 1883 if (p_is_forced) 1884 *p_is_forced = 0; 1885 } else { 1886 return false; 1887 } 1888 1889 OSAL_MEMCPY(dst_mac, bulletin->mac, ETH_ALEN); 1890 1891 return true; 1892 } 1893 1894 void ecore_vf_bulletin_get_udp_ports(struct ecore_hwfn *p_hwfn, 1895 u16 *p_vxlan_port, 1896 u16 *p_geneve_port) 1897 { 1898 struct ecore_bulletin_content *p_bulletin; 1899 1900 p_bulletin = &p_hwfn->vf_iov_info->bulletin_shadow; 1901 1902 *p_vxlan_port = p_bulletin->vxlan_udp_port; 1903 *p_geneve_port = p_bulletin->geneve_udp_port; 1904 } 1905 1906 #ifndef LINUX_REMOVE 1907 bool ecore_vf_bulletin_get_forced_vlan(struct ecore_hwfn *hwfn, u16 *dst_pvid) 1908 { 1909 struct ecore_bulletin_content *bulletin; 1910 1911 bulletin = &hwfn->vf_iov_info->bulletin_shadow; 1912 1913 if (!(bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED))) 1914 return false; 1915 1916 if (dst_pvid) 1917 *dst_pvid = bulletin->pvid; 1918 1919 return true; 1920 } 1921 1922 bool ecore_vf_get_pre_fp_hsi(struct ecore_hwfn *p_hwfn) 1923 { 1924 return p_hwfn->vf_iov_info->b_pre_fp_hsi; 1925 } 1926 #endif 1927 1928 void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn, 1929 u16 *fw_major, u16 *fw_minor, u16 *fw_rev, 1930 u16 *fw_eng) 1931 { 1932 struct pf_vf_pfdev_info *info; 1933 1934 info = &p_hwfn->vf_iov_info->acquire_resp.pfdev_info; 1935 1936 *fw_major = info->fw_major; 1937 *fw_minor = info->fw_minor; 1938 *fw_rev = info->fw_rev; 1939 *fw_eng = info->fw_eng; 1940 } 1941 1942 #ifdef CONFIG_ECORE_SW_CHANNEL 1943 void ecore_vf_set_hw_channel(struct ecore_hwfn *p_hwfn, bool b_is_hw) 1944 { 1945 p_hwfn->vf_iov_info->b_hw_channel = b_is_hw; 1946 } 1947 #endif 1948 1949 #ifdef _NTDDK_ 1950 #pragma warning(pop) 1951 #endif 1952