1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 */ 28 29 #ifndef __ECORE_INT_H__ 30 #define __ECORE_INT_H__ 31 32 #include "ecore.h" 33 #include "ecore_int_api.h" 34 35 #define ECORE_CAU_DEF_RX_TIMER_RES 0 36 #define ECORE_CAU_DEF_TX_TIMER_RES 0 37 38 #define ECORE_SB_ATT_IDX 0x0001 39 #define ECORE_SB_EVENT_MASK 0x0003 40 41 #define SB_ALIGNED_SIZE(p_hwfn) \ 42 ALIGNED_TYPE_SIZE(struct status_block_e4, p_hwfn) 43 44 #define ECORE_SB_INVALID_IDX 0xffff 45 46 struct ecore_igu_block 47 { 48 u8 status; 49 #define ECORE_IGU_STATUS_FREE 0x01 50 #define ECORE_IGU_STATUS_VALID 0x02 51 #define ECORE_IGU_STATUS_PF 0x04 52 #define ECORE_IGU_STATUS_DSB 0x08 53 54 u8 vector_number; 55 u8 function_id; 56 u8 is_pf; 57 58 /* Index inside IGU [meant for back reference] */ 59 u16 igu_sb_id; 60 61 struct ecore_sb_info *sb_info; 62 }; 63 64 struct ecore_igu_info 65 { 66 struct ecore_igu_block entry[MAX_TOT_SB_PER_PATH]; 67 u16 igu_dsb_id; 68 69 /* The numbers can shift when using APIs to switch SBs between PF and 70 * VF. 71 */ 72 struct ecore_sb_cnt_info usage; 73 74 /* Determine whether we can shift SBs between VFs and PFs */ 75 bool b_allow_pf_vf_change; 76 }; 77 78 /** 79 * @brief - Make sure the IGU CAM reflects the resources provided by MFW 80 * 81 * @param p_hwfn 82 * @param p_ptt 83 */ 84 int ecore_int_igu_reset_cam(struct ecore_hwfn *p_hwfn, 85 struct ecore_ptt *p_ptt); 86 87 /** 88 * @brief - Make sure IGU CAM reflects the default resources once again, 89 * starting with a 'dirty' SW database. 90 * @param p_hwfn 91 * @param p_ptt 92 */ 93 int ecore_int_igu_reset_cam_default(struct ecore_hwfn *p_hwfn, 94 struct ecore_ptt *p_ptt); 95 96 /** 97 * @brief Translate the weakly-defined client sb-id into an IGU sb-id 98 * 99 * @param p_hwfn 100 * @param sb_id - user provided sb_id 101 * 102 * @return an index inside IGU CAM where the SB resides 103 */ 104 u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id); 105 106 /** 107 * @brief return a pointer to an unused valid SB 108 * 109 * @param p_hwfn 110 * @param b_is_pf - true iff we want a SB belonging to a PF 111 * 112 * @return point to an igu_block, OSAL_NULL if none is available 113 */ 114 struct ecore_igu_block * 115 ecore_get_igu_free_sb(struct ecore_hwfn *p_hwfn, bool b_is_pf); 116 117 /* TODO Names of function may change... */ 118 void ecore_int_igu_init_pure_rt(struct ecore_hwfn *p_hwfn, 119 struct ecore_ptt *p_ptt, 120 bool b_set, 121 bool b_slowpath); 122 123 void ecore_int_igu_init_rt(struct ecore_hwfn *p_hwfn); 124 125 /** 126 * @brief ecore_int_igu_read_cam - Reads the IGU CAM. 127 * This function needs to be called during hardware 128 * prepare. It reads the info from igu cam to know which 129 * status block is the default / base status block etc. 130 * 131 * @param p_hwfn 132 * @param p_ptt 133 * 134 * @return enum _ecore_status_t 135 */ 136 enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn *p_hwfn, 137 struct ecore_ptt *p_ptt); 138 139 typedef enum _ecore_status_t(*ecore_int_comp_cb_t)(struct ecore_hwfn *p_hwfn, 140 void *cookie); 141 /** 142 * @brief ecore_int_register_cb - Register callback func for 143 * slowhwfn statusblock. 144 * 145 * Every protocol that uses the slowhwfn status block 146 * should register a callback function that will be called 147 * once there is an update of the sp status block. 148 * 149 * @param p_hwfn 150 * @param comp_cb - function to be called when there is an 151 * interrupt on the sp sb 152 * 153 * @param cookie - passed to the callback function 154 * @param sb_idx - OUT parameter which gives the chosen index 155 * for this protocol. 156 * @param p_fw_cons - pointer to the actual address of the 157 * consumer for this protocol. 158 * 159 * @return enum _ecore_status_t 160 */ 161 enum _ecore_status_t ecore_int_register_cb(struct ecore_hwfn *p_hwfn, 162 ecore_int_comp_cb_t comp_cb, 163 void *cookie, 164 u8 *sb_idx, 165 __le16 **p_fw_cons); 166 /** 167 * @brief ecore_int_unregister_cb - Unregisters callback 168 * function from sp sb. 169 * Partner of ecore_int_register_cb -> should be called 170 * when no longer required. 171 * 172 * @param p_hwfn 173 * @param pi 174 * 175 * @return enum _ecore_status_t 176 */ 177 enum _ecore_status_t ecore_int_unregister_cb(struct ecore_hwfn *p_hwfn, 178 u8 pi); 179 180 /** 181 * @brief ecore_int_get_sp_sb_id - Get the slowhwfn sb id. 182 * 183 * @param p_hwfn 184 * 185 * @return u16 186 */ 187 u16 ecore_int_get_sp_sb_id(struct ecore_hwfn *p_hwfn); 188 189 /** 190 * @brief Status block cleanup. Should be called for each status 191 * block that will be used -> both PF / VF 192 * 193 * @param p_hwfn 194 * @param p_ptt 195 * @param sb_id - igu status block id 196 * @param opaque - opaque fid of the sb owner. 197 * @param cleanup_set - set(1) / clear(0) 198 */ 199 void ecore_int_igu_init_pure_rt_single(struct ecore_hwfn *p_hwfn, 200 struct ecore_ptt *p_ptt, 201 u16 sb_id, 202 u16 opaque, 203 bool b_set); 204 205 /** 206 * @brief ecore_int_cau_conf - configure cau for a given status 207 * block 208 * 209 * @param p_hwfn 210 * @param ptt 211 * @param sb_phys 212 * @param igu_sb_id 213 * @param vf_number 214 * @param vf_valid 215 */ 216 void ecore_int_cau_conf_sb(struct ecore_hwfn *p_hwfn, 217 struct ecore_ptt *p_ptt, 218 dma_addr_t sb_phys, 219 u16 igu_sb_id, 220 u16 vf_number, 221 u8 vf_valid); 222 223 /** 224 * @brief ecore_int_alloc 225 * 226 * @param p_hwfn 227 * @param p_ptt 228 * 229 * @return enum _ecore_status_t 230 */ 231 enum _ecore_status_t ecore_int_alloc(struct ecore_hwfn *p_hwfn, 232 struct ecore_ptt *p_ptt); 233 234 /** 235 * @brief ecore_int_free 236 * 237 * @param p_hwfn 238 */ 239 void ecore_int_free(struct ecore_hwfn *p_hwfn); 240 241 /** 242 * @brief ecore_int_setup 243 * 244 * @param p_hwfn 245 * @param p_ptt 246 */ 247 void ecore_int_setup(struct ecore_hwfn *p_hwfn, 248 struct ecore_ptt *p_ptt); 249 250 /** 251 * @brief - Enable Interrupt & Attention for hw function 252 * 253 * @param p_hwfn 254 * @param p_ptt 255 * @param int_mode 256 * 257 * @return enum _ecore_status_t 258 */ 259 enum _ecore_status_t ecore_int_igu_enable(struct ecore_hwfn *p_hwfn, 260 struct ecore_ptt *p_ptt, 261 enum ecore_int_mode int_mode); 262 263 /** 264 * @brief - Initialize CAU status block entry 265 * 266 * @param p_hwfn 267 * @param p_sb_entry 268 * @param pf_id 269 * @param vf_number 270 * @param vf_valid 271 */ 272 void ecore_init_cau_sb_entry(struct ecore_hwfn *p_hwfn, 273 struct cau_sb_entry *p_sb_entry, u8 pf_id, 274 u16 vf_number, u8 vf_valid); 275 276 enum _ecore_status_t ecore_int_set_timer_res(struct ecore_hwfn *p_hwfn, 277 struct ecore_ptt *p_ptt, 278 u8 timer_res, u16 sb_id, bool tx); 279 #ifndef ASIC_ONLY 280 #define ECORE_MAPPING_MEMORY_SIZE(dev) \ 281 ((CHIP_REV_IS_SLOW(dev) && (!(dev)->b_is_emul_full)) ? \ 282 136 : NUM_OF_SBS(dev)) 283 #else 284 #define ECORE_MAPPING_MEMORY_SIZE(dev) NUM_OF_SBS(dev) 285 #endif 286 287 enum _ecore_status_t ecore_pglueb_rbc_attn_handler(struct ecore_hwfn *p_hwfn, 288 struct ecore_ptt *p_ptt); 289 290 #endif /* __ECORE_INT_H__ */ 291