1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 * 29 */ 30 31 32 #ifndef __ECORE_INT_H__ 33 #define __ECORE_INT_H__ 34 35 #include "ecore.h" 36 #include "ecore_int_api.h" 37 38 #define ECORE_CAU_DEF_RX_TIMER_RES 0 39 #define ECORE_CAU_DEF_TX_TIMER_RES 0 40 41 #define ECORE_SB_ATT_IDX 0x0001 42 #define ECORE_SB_EVENT_MASK 0x0003 43 44 #define SB_ALIGNED_SIZE(p_hwfn) \ 45 ALIGNED_TYPE_SIZE(struct status_block, p_hwfn) 46 47 #define ECORE_SB_INVALID_IDX 0xffff 48 49 struct ecore_igu_block 50 { 51 u8 status; 52 #define ECORE_IGU_STATUS_FREE 0x01 53 #define ECORE_IGU_STATUS_VALID 0x02 54 #define ECORE_IGU_STATUS_PF 0x04 55 #define ECORE_IGU_STATUS_DSB 0x08 56 57 u8 vector_number; 58 u8 function_id; 59 u8 is_pf; 60 61 /* Index inside IGU [meant for back reference] */ 62 u16 igu_sb_id; 63 64 struct ecore_sb_info *sb_info; 65 }; 66 67 struct ecore_igu_info 68 { 69 struct ecore_igu_block entry[MAX_TOT_SB_PER_PATH]; 70 u16 igu_dsb_id; 71 72 /* The numbers can shift when using APIs to switch SBs between PF and 73 * VF. 74 */ 75 struct ecore_sb_cnt_info usage; 76 77 /* Determine whether we can shift SBs between VFs and PFs */ 78 bool b_allow_pf_vf_change; 79 }; 80 81 /** 82 * @brief - Make sure the IGU CAM reflects the resources provided by MFW 83 * 84 * @param p_hwfn 85 * @param p_ptt 86 */ 87 int ecore_int_igu_reset_cam(struct ecore_hwfn *p_hwfn, 88 struct ecore_ptt *p_ptt); 89 90 /** 91 * @brief - Make sure IGU CAM reflects the default resources once again, 92 * starting with a 'dirty' SW database. 93 * @param p_hwfn 94 * @param p_ptt 95 */ 96 int ecore_int_igu_reset_cam_default(struct ecore_hwfn *p_hwfn, 97 struct ecore_ptt *p_ptt); 98 99 /** 100 * @brief Translate the weakly-defined client sb-id into an IGU sb-id 101 * 102 * @param p_hwfn 103 * @param sb_id - user provided sb_id 104 * 105 * @return an index inside IGU CAM where the SB resides 106 */ 107 u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id); 108 109 /** 110 * @brief return a pointer to an unused valid SB 111 * 112 * @param p_hwfn 113 * @param b_is_pf - true iff we want a SB belonging to a PF 114 * 115 * @return point to an igu_block, OSAL_NULL if none is available 116 */ 117 struct ecore_igu_block * 118 ecore_get_igu_free_sb(struct ecore_hwfn *p_hwfn, bool b_is_pf); 119 120 /* TODO Names of function may change... */ 121 void ecore_int_igu_init_pure_rt(struct ecore_hwfn *p_hwfn, 122 struct ecore_ptt *p_ptt, 123 bool b_set, 124 bool b_slowpath); 125 126 void ecore_int_igu_init_rt(struct ecore_hwfn *p_hwfn); 127 128 /** 129 * @brief ecore_int_igu_read_cam - Reads the IGU CAM. 130 * This function needs to be called during hardware 131 * prepare. It reads the info from igu cam to know which 132 * status block is the default / base status block etc. 133 * 134 * @param p_hwfn 135 * @param p_ptt 136 * 137 * @return enum _ecore_status_t 138 */ 139 enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn *p_hwfn, 140 struct ecore_ptt *p_ptt); 141 142 typedef enum _ecore_status_t(*ecore_int_comp_cb_t)(struct ecore_hwfn *p_hwfn, 143 void *cookie); 144 /** 145 * @brief ecore_int_register_cb - Register callback func for 146 * slowhwfn statusblock. 147 * 148 * Every protocol that uses the slowhwfn status block 149 * should register a callback function that will be called 150 * once there is an update of the sp status block. 151 * 152 * @param p_hwfn 153 * @param comp_cb - function to be called when there is an 154 * interrupt on the sp sb 155 * 156 * @param cookie - passed to the callback function 157 * @param sb_idx - OUT parameter which gives the chosen index 158 * for this protocol. 159 * @param p_fw_cons - pointer to the actual address of the 160 * consumer for this protocol. 161 * 162 * @return enum _ecore_status_t 163 */ 164 enum _ecore_status_t ecore_int_register_cb(struct ecore_hwfn *p_hwfn, 165 ecore_int_comp_cb_t comp_cb, 166 void *cookie, 167 u8 *sb_idx, 168 __le16 **p_fw_cons); 169 /** 170 * @brief ecore_int_unregister_cb - Unregisters callback 171 * function from sp sb. 172 * Partner of ecore_int_register_cb -> should be called 173 * when no longer required. 174 * 175 * @param p_hwfn 176 * @param pi 177 * 178 * @return enum _ecore_status_t 179 */ 180 enum _ecore_status_t ecore_int_unregister_cb(struct ecore_hwfn *p_hwfn, 181 u8 pi); 182 183 /** 184 * @brief ecore_int_get_sp_sb_id - Get the slowhwfn sb id. 185 * 186 * @param p_hwfn 187 * 188 * @return u16 189 */ 190 u16 ecore_int_get_sp_sb_id(struct ecore_hwfn *p_hwfn); 191 192 /** 193 * @brief Status block cleanup. Should be called for each status 194 * block that will be used -> both PF / VF 195 * 196 * @param p_hwfn 197 * @param p_ptt 198 * @param sb_id - igu status block id 199 * @param opaque - opaque fid of the sb owner. 200 * @param cleanup_set - set(1) / clear(0) 201 */ 202 void ecore_int_igu_init_pure_rt_single(struct ecore_hwfn *p_hwfn, 203 struct ecore_ptt *p_ptt, 204 u16 sb_id, 205 u16 opaque, 206 bool b_set); 207 208 /** 209 * @brief ecore_int_cau_conf - configure cau for a given status 210 * block 211 * 212 * @param p_hwfn 213 * @param ptt 214 * @param sb_phys 215 * @param igu_sb_id 216 * @param vf_number 217 * @param vf_valid 218 */ 219 void ecore_int_cau_conf_sb(struct ecore_hwfn *p_hwfn, 220 struct ecore_ptt *p_ptt, 221 dma_addr_t sb_phys, 222 u16 igu_sb_id, 223 u16 vf_number, 224 u8 vf_valid); 225 226 /** 227 * @brief ecore_int_alloc 228 * 229 * @param p_hwfn 230 * @param p_ptt 231 * 232 * @return enum _ecore_status_t 233 */ 234 enum _ecore_status_t ecore_int_alloc(struct ecore_hwfn *p_hwfn, 235 struct ecore_ptt *p_ptt); 236 237 /** 238 * @brief ecore_int_free 239 * 240 * @param p_hwfn 241 */ 242 void ecore_int_free(struct ecore_hwfn *p_hwfn); 243 244 /** 245 * @brief ecore_int_setup 246 * 247 * @param p_hwfn 248 * @param p_ptt 249 */ 250 void ecore_int_setup(struct ecore_hwfn *p_hwfn, 251 struct ecore_ptt *p_ptt); 252 253 /** 254 * @brief - Enable Interrupt & Attention for hw function 255 * 256 * @param p_hwfn 257 * @param p_ptt 258 * @param int_mode 259 * 260 * @return enum _ecore_status_t 261 */ 262 enum _ecore_status_t ecore_int_igu_enable(struct ecore_hwfn *p_hwfn, 263 struct ecore_ptt *p_ptt, 264 enum ecore_int_mode int_mode); 265 266 /** 267 * @brief - Initialize CAU status block entry 268 * 269 * @param p_hwfn 270 * @param p_sb_entry 271 * @param pf_id 272 * @param vf_number 273 * @param vf_valid 274 */ 275 void ecore_init_cau_sb_entry(struct ecore_hwfn *p_hwfn, 276 struct cau_sb_entry *p_sb_entry, u8 pf_id, 277 u16 vf_number, u8 vf_valid); 278 279 enum _ecore_status_t ecore_int_set_timer_res(struct ecore_hwfn *p_hwfn, 280 struct ecore_ptt *p_ptt, 281 u8 timer_res, u16 sb_id, bool tx); 282 #ifndef ASIC_ONLY 283 #define ECORE_MAPPING_MEMORY_SIZE(dev) \ 284 ((CHIP_REV_IS_SLOW(dev) && (!(dev)->b_is_emul_full)) ? \ 285 136 : NUM_OF_SBS(dev)) 286 #else 287 #define ECORE_MAPPING_MEMORY_SIZE(dev) NUM_OF_SBS(dev) 288 #endif 289 290 #endif /* __ECORE_INT_H__ */ 291 292