1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #ifndef __BCM_OSAL_ECORE_PACKAGE 31 #define __BCM_OSAL_ECORE_PACKAGE 32 33 #include "qlnx_os.h" 34 #include "ecore_status.h" 35 #include <sys/bitstring.h> 36 37 #include <linux/types.h> 38 #include <linux/bitmap.h> 39 40 #define OSAL_NUM_CPUS() mp_ncpus 41 /* 42 * prototypes of freebsd specific functions required by ecore 43 */ 44 extern uint32_t qlnx_pci_bus_get_bar_size(void *ecore_dev, uint8_t bar_id); 45 extern uint32_t qlnx_pci_read_config_byte(void *ecore_dev, uint32_t pci_reg, 46 uint8_t *reg_value); 47 extern uint32_t qlnx_pci_read_config_word(void *ecore_dev, uint32_t pci_reg, 48 uint16_t *reg_value); 49 extern uint32_t qlnx_pci_read_config_dword(void *ecore_dev, uint32_t pci_reg, 50 uint32_t *reg_value); 51 extern void qlnx_pci_write_config_byte(void *ecore_dev, uint32_t pci_reg, 52 uint8_t reg_value); 53 extern void qlnx_pci_write_config_word(void *ecore_dev, uint32_t pci_reg, 54 uint16_t reg_value); 55 extern void qlnx_pci_write_config_dword(void *ecore_dev, uint32_t pci_reg, 56 uint32_t reg_value); 57 extern int qlnx_pci_find_capability(void *ecore_dev, int cap); 58 extern int qlnx_pci_find_ext_capability(void *ecore_dev, int ext_cap); 59 60 extern uint32_t qlnx_direct_reg_rd32(void *p_hwfn, uint32_t *reg_addr); 61 extern void qlnx_direct_reg_wr32(void *p_hwfn, void *reg_addr, uint32_t value); 62 extern void qlnx_direct_reg_wr64(void *p_hwfn, void *reg_addr, uint64_t value); 63 64 extern uint32_t qlnx_reg_rd32(void *p_hwfn, uint32_t reg_addr); 65 extern void qlnx_reg_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value); 66 extern void qlnx_reg_wr16(void *p_hwfn, uint32_t reg_addr, uint16_t value); 67 68 extern void qlnx_dbell_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value); 69 extern void qlnx_dbell_wr32_db(void *p_hwfn, void *reg_addr, uint32_t value); 70 71 extern void *qlnx_dma_alloc_coherent(void *ecore_dev, bus_addr_t *phys, 72 uint32_t size); 73 extern void qlnx_dma_free_coherent(void *ecore_dev, void *v_addr, 74 bus_addr_t phys, uint32_t size); 75 76 extern void qlnx_link_update(void *p_hwfn); 77 extern void qlnx_barrier(void *p_hwfn); 78 79 extern void *qlnx_zalloc(uint32_t size); 80 81 extern void qlnx_get_protocol_stats(void *cdev, int proto_type, 82 void *proto_stats); 83 84 extern void qlnx_sp_isr(void *arg); 85 86 extern void qlnx_osal_vf_fill_acquire_resc_req(void *p_hwfn, void *p_resc_req, 87 void *p_sw_info); 88 extern void qlnx_osal_iov_vf_cleanup(void *p_hwfn, uint8_t relative_vf_id); 89 extern int qlnx_iov_chk_ucast(void *p_hwfn, int vfid, void *params); 90 extern int qlnx_iov_update_vport(void *p_hwfn, uint8_t vfid, void *params, 91 uint16_t *tlvs); 92 extern int qlnx_pf_vf_msg(void *p_hwfn, uint16_t relative_vf_id); 93 extern void qlnx_vf_flr_update(void *p_hwfn); 94 95 #define nothing do {} while(0) 96 97 /* Memory Types */ 98 #define u8 uint8_t 99 #define u16 uint16_t 100 #define u32 uint32_t 101 #define u64 uint64_t 102 #define s16 uint16_t 103 #define s32 uint32_t 104 105 #ifndef QLNX_RDMA 106 107 static __inline unsigned long 108 roundup_pow_of_two(unsigned long x) 109 { 110 return (1UL << flsl(x - 1)); 111 } 112 113 static __inline int 114 is_power_of_2(unsigned long n) 115 { 116 return (n == roundup_pow_of_two(n)); 117 } 118 119 static __inline unsigned long 120 rounddown_pow_of_two(unsigned long x) 121 { 122 return (1UL << (flsl(x) - 1)); 123 } 124 125 #define max_t(type, val1, val2) \ 126 ((type)(val1) > (type)(val2) ? (type)(val1) : (val2)) 127 #define min_t(type, val1, val2) \ 128 ((type)(val1) < (type)(val2) ? (type)(val1) : (val2)) 129 130 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0])) 131 #define BUILD_BUG_ON(cond) nothing 132 133 #endif /* #ifndef QLNX_RDMA */ 134 135 #define OSAL_UNUSED 136 137 #define OSAL_CPU_TO_BE64(val) htobe64(val) 138 #define OSAL_BE64_TO_CPU(val) be64toh(val) 139 140 #define OSAL_CPU_TO_BE32(val) htobe32(val) 141 #define OSAL_BE32_TO_CPU(val) be32toh(val) 142 143 #define OSAL_CPU_TO_LE32(val) htole32(val) 144 #define OSAL_LE32_TO_CPU(val) le32toh(val) 145 146 #define OSAL_CPU_TO_BE16(val) htobe16(val) 147 #define OSAL_BE16_TO_CPU(val) be16toh(val) 148 149 #define OSAL_CPU_TO_LE16(val) htole16(val) 150 #define OSAL_LE16_TO_CPU(val) le16toh(val) 151 152 static __inline uint32_t 153 qlnx_get_cache_line_size(void) 154 { 155 return (CACHE_LINE_SIZE); 156 } 157 158 #define OSAL_CACHE_LINE_SIZE qlnx_get_cache_line_size() 159 160 #define OSAL_BE32 uint32_t 161 #define dma_addr_t bus_addr_t 162 #define osal_size_t size_t 163 164 typedef struct mtx osal_spinlock_t; 165 typedef struct mtx osal_mutex_t; 166 167 typedef void * osal_dpc_t; 168 169 typedef struct _osal_list_entry_t 170 { 171 struct _osal_list_entry_t *next, *prev; 172 } osal_list_entry_t; 173 174 typedef struct osal_list_t 175 { 176 osal_list_entry_t *head, *tail; 177 unsigned long cnt; 178 } osal_list_t; 179 180 /* OSAL functions */ 181 182 #define OSAL_UDELAY(time) DELAY(time) 183 #define OSAL_MSLEEP(time) qlnx_mdelay(__func__, time) 184 185 #define OSAL_ALLOC(dev, GFP, size) qlnx_zalloc(size) 186 #define OSAL_ZALLOC(dev, GFP, size) qlnx_zalloc(size) 187 #define OSAL_VALLOC(dev, size) qlnx_zalloc(size) 188 #define OSAL_VZALLOC(dev, size) qlnx_zalloc(size) 189 190 #define OSAL_FREE(dev, memory) free(memory, M_QLNXBUF) 191 #define OSAL_VFREE(dev, memory) free(memory, M_QLNXBUF) 192 193 #define OSAL_MEM_ZERO(mem, size) bzero(mem, size) 194 195 #define OSAL_MEMCPY(dst, src, size) memcpy(dst, src, size) 196 197 #define OSAL_DMA_ALLOC_COHERENT(dev, phys, size) \ 198 qlnx_dma_alloc_coherent(dev, phys, size) 199 200 #define OSAL_DMA_FREE_COHERENT(dev, virt, phys, size) \ 201 qlnx_dma_free_coherent(dev, virt, phys, size) 202 #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0) 203 204 #define REG_WR(hwfn, addr, val) qlnx_reg_wr32(hwfn, addr, val) 205 #define REG_WR16(hwfn, addr, val) qlnx_reg_wr16(hwfn, addr, val) 206 #define DIRECT_REG_WR(p_hwfn, addr, value) qlnx_direct_reg_wr32(p_hwfn, addr, value) 207 #define DIRECT_REG_WR64(p_hwfn, addr, value) \ 208 qlnx_direct_reg_wr64(p_hwfn, addr, value) 209 #define DIRECT_REG_WR_DB(p_hwfn, addr, value) qlnx_dbell_wr32_db(p_hwfn, addr, value) 210 #define DIRECT_REG_RD(p_hwfn, addr) qlnx_direct_reg_rd32(p_hwfn, addr) 211 #define REG_RD(hwfn, addr) qlnx_reg_rd32(hwfn, addr) 212 #define DOORBELL(hwfn, addr, value) \ 213 qlnx_dbell_wr32(hwfn, addr, value) 214 215 #define OSAL_SPIN_LOCK_ALLOC(p_hwfn, mutex) 216 #define OSAL_SPIN_LOCK_DEALLOC(mutex) mtx_destroy(mutex) 217 #define OSAL_SPIN_LOCK_INIT(lock) {\ 218 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_SPIN); \ 219 } 220 221 #define OSAL_SPIN_UNLOCK(lock) {\ 222 mtx_unlock(lock); \ 223 } 224 #define OSAL_SPIN_LOCK(lock) {\ 225 mtx_lock(lock); \ 226 } 227 228 #define OSAL_MUTEX_ALLOC(p_hwfn, mutex) 229 #define OSAL_MUTEX_DEALLOC(mutex) mtx_destroy(mutex) 230 #define OSAL_MUTEX_INIT(lock) {\ 231 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_DEF);\ 232 } 233 234 #define OSAL_MUTEX_ACQUIRE(lock) mtx_lock(lock) 235 #define OSAL_MUTEX_RELEASE(lock) mtx_unlock(lock) 236 237 #define OSAL_DPC_ALLOC(hwfn) malloc(PAGE_SIZE, M_QLNXBUF, M_NOWAIT) 238 #define OSAL_DPC_INIT(dpc, hwfn) nothing 239 extern void qlnx_schedule_recovery(void *p_hwfn); 240 #define OSAL_SCHEDULE_RECOVERY_HANDLER(x) do {qlnx_schedule_recovery(x);} while(0) 241 #define OSAL_HW_ERROR_OCCURRED(hwfn, err_type) nothing 242 #define OSAL_DPC_SYNC(hwfn) nothing 243 244 static inline void OSAL_DCBX_AEN(void *p_hwfn, u32 mib_type) 245 { 246 return; 247 } 248 249 static inline bool OSAL_NVM_IS_ACCESS_ENABLED(void *p_hwfn) 250 { 251 return 1; 252 } 253 254 #define OSAL_LIST_INIT(list) \ 255 do { \ 256 (list)->head = NULL; \ 257 (list)->tail = NULL; \ 258 (list)->cnt = 0; \ 259 } while (0) 260 261 #define OSAL_LIST_INSERT_ENTRY_AFTER(entry, entry_prev, list) \ 262 do { \ 263 (entry)->prev = (entry_prev); \ 264 (entry)->next = (entry_prev)->next; \ 265 (entry)->next->prev = (entry); \ 266 (entry_prev)->next = (entry); \ 267 (list)->cnt++; \ 268 } while (0); 269 270 #define OSAL_LIST_SPLICE_TAIL_INIT(new_list, list) \ 271 do { \ 272 ((new_list)->tail)->next = ((list)->head); \ 273 ((list)->head)->prev = ((new_list)->tail); \ 274 (list)->head = (new_list)->head; \ 275 (list)->cnt = (list)->cnt + (new_list)->cnt; \ 276 OSAL_LIST_INIT(new_list); \ 277 } while (0); 278 279 #define OSAL_LIST_PUSH_HEAD(entry, list) \ 280 do { \ 281 (entry)->prev = (osal_list_entry_t *)0; \ 282 (entry)->next = (list)->head; \ 283 if ((list)->tail == (osal_list_entry_t *)0) { \ 284 (list)->tail = (entry); \ 285 } else { \ 286 (list)->head->prev = (entry); \ 287 } \ 288 (list)->head = (entry); \ 289 (list)->cnt++; \ 290 } while (0) 291 292 #define OSAL_LIST_PUSH_TAIL(entry, list) \ 293 do { \ 294 (entry)->next = (osal_list_entry_t *)0; \ 295 (entry)->prev = (list)->tail; \ 296 if ((list)->tail) { \ 297 (list)->tail->next = (entry); \ 298 } else { \ 299 (list)->head = (entry); \ 300 } \ 301 (list)->tail = (entry); \ 302 (list)->cnt++; \ 303 } while (0) 304 305 #define OSAL_LIST_FIRST_ENTRY(list, type, field) \ 306 (type *)((list)->head) 307 308 #define OSAL_LIST_REMOVE_ENTRY(entry, list) \ 309 do { \ 310 if ((list)->head == (entry)) { \ 311 if ((list)->head) { \ 312 (list)->head = (list)->head->next; \ 313 if ((list)->head) { \ 314 (list)->head->prev = (osal_list_entry_t *)0; \ 315 } else { \ 316 (list)->tail = (osal_list_entry_t *)0; \ 317 } \ 318 (list)->cnt--; \ 319 } \ 320 } else if ((list)->tail == (entry)) { \ 321 if ((list)->tail) { \ 322 (list)->tail = (list)->tail->prev; \ 323 if ((list)->tail) { \ 324 (list)->tail->next = (osal_list_entry_t *)0; \ 325 } else { \ 326 (list)->head = (osal_list_entry_t *)0; \ 327 } \ 328 (list)->cnt--; \ 329 } \ 330 } else { \ 331 (entry)->prev->next = (entry)->next; \ 332 (entry)->next->prev = (entry)->prev; \ 333 (list)->cnt--; \ 334 } \ 335 } while (0) 336 337 #define OSAL_LIST_IS_EMPTY(list) \ 338 ((list)->cnt == 0) 339 340 #define OSAL_LIST_NEXT(entry, field, type) \ 341 (type *)((&((entry)->field))->next) 342 343 #define OSAL_LIST_FOR_EACH_ENTRY(entry, list, field, type) \ 344 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field); \ 345 entry; \ 346 entry = OSAL_LIST_NEXT(entry, field, type)) 347 348 #define OSAL_LIST_FOR_EACH_ENTRY_SAFE(entry, tmp_entry, list, field, type) \ 349 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field), \ 350 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL; \ 351 entry != NULL; \ 352 entry = (type *)tmp_entry, \ 353 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL) 354 355 #define OSAL_BAR_SIZE(dev, bar_id) qlnx_pci_bus_get_bar_size(dev, bar_id) 356 357 #define OSAL_PCI_READ_CONFIG_BYTE(dev, reg, value) \ 358 qlnx_pci_read_config_byte(dev, reg, value); 359 #define OSAL_PCI_READ_CONFIG_WORD(dev, reg, value) \ 360 qlnx_pci_read_config_word(dev, reg, value); 361 #define OSAL_PCI_READ_CONFIG_DWORD(dev, reg, value) \ 362 qlnx_pci_read_config_dword(dev, reg, value); 363 364 #define OSAL_PCI_WRITE_CONFIG_BYTE(dev, reg, value) \ 365 qlnx_pci_write_config_byte(dev, reg, value); 366 #define OSAL_PCI_WRITE_CONFIG_WORD(dev, reg, value) \ 367 qlnx_pci_write_config_word(dev, reg, value); 368 #define OSAL_PCI_WRITE_CONFIG_DWORD(dev, reg, value) \ 369 qlnx_pci_write_config_dword(dev, reg, value); 370 371 #define OSAL_PCI_FIND_CAPABILITY(dev, cap) qlnx_pci_find_capability(dev, cap) 372 #define OSAL_PCI_FIND_EXT_CAPABILITY(dev, ext_cap) \ 373 qlnx_pci_find_ext_capability(dev, ext_cap) 374 375 #define OSAL_MMIOWB(dev) qlnx_barrier(dev) 376 #define OSAL_BARRIER(dev) qlnx_barrier(dev) 377 378 #define OSAL_SMP_MB(dev) mb() 379 #define OSAL_SMP_RMB(dev) rmb() 380 #define OSAL_SMP_WMB(dev) wmb() 381 #define OSAL_RMB(dev) rmb() 382 #define OSAL_WMB(dev) wmb() 383 #define OSAL_DMA_SYNC(dev, addr, length, is_post) 384 385 #define OSAL_FIND_FIRST_BIT find_first_bit 386 #define OSAL_SET_BIT(bit, bitmap) bit_set((bitstr_t *)bitmap, bit) 387 #define OSAL_CLEAR_BIT(bit, bitmap) bit_clear((bitstr_t *)bitmap, bit) 388 #define OSAL_TEST_BIT(bit, bitmap) bit_test((bitstr_t *)bitmap, bit) 389 #define OSAL_FIND_FIRST_ZERO_BIT(bitmap, length) \ 390 find_first_zero_bit(bitmap, length) 391 392 #define OSAL_LINK_UPDATE(hwfn, ptt) qlnx_link_update(hwfn) 393 394 #define QLNX_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) 395 #define QLNX_ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) 396 397 #define OSAL_NUM_ACTIVE_CPU() mp_ncpus 398 399 #ifndef DIV_ROUND_UP 400 #define DIV_ROUND_UP(size, to_what) QLNX_DIV_ROUND_UP((size), (to_what)) 401 #endif 402 403 #define ROUNDUP(value, to_what) QLNX_ROUNDUP((value), (to_what)) 404 405 #define OSAL_ROUNDUP_POW_OF_TWO(val) roundup_pow_of_two((val)) 406 407 static __inline uint32_t 408 qlnx_log2(uint32_t x) 409 { 410 uint32_t log = 0; 411 412 while (x >>= 1) log++; 413 414 return (log); 415 } 416 417 #define OSAL_LOG2(val) qlnx_log2(val) 418 #define OFFSETOF(str, field) offsetof(str, field) 419 #define PRINT device_printf 420 #define PRINT_ERR device_printf 421 #define OSAL_ASSERT(is_assert) nothing 422 #define OSAL_BEFORE_PF_START(cdev, my_id) {}; 423 #define OSAL_AFTER_PF_STOP(cdev, my_id) {}; 424 425 #define INLINE __inline 426 #define OSAL_INLINE __inline 427 #define OSAL_UNLIKELY 428 #define OSAL_NULL NULL 429 430 #define OSAL_MAX_T(type, __max1, __max2) max_t(type, __max1, __max2) 431 #define OSAL_MIN_T(type, __max1, __max2) min_t(type, __max1, __max2) 432 433 #define __iomem 434 #define OSAL_IOMEM 435 436 #define int_ptr_t void * 437 #define osal_int_ptr_t void * 438 #define OSAL_BUILD_BUG_ON(cond) nothing 439 #define REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset)) 440 #define OSAL_REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset)) 441 442 #define OSAL_PAGE_SIZE PAGE_SIZE 443 444 #define OSAL_STRCPY(dst, src) strcpy(dst, src) 445 #define OSAL_STRNCPY(dst, src, bytes) strncpy(dst, src, bytes) 446 #define OSAL_STRLEN(src) strlen(src) 447 #define OSAL_SPRINTF sprintf 448 #define OSAL_SNPRINTF snprintf 449 #define OSAL_MEMSET memset 450 #define OSAL_ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0])) 451 #define osal_uintptr_t u64 452 453 #define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) (0) 454 #define OSAL_GET_PROTOCOL_STATS(p_hwfn, type, stats) \ 455 qlnx_get_protocol_stats(p_hwfn, type, stats); 456 #define OSAL_POLL_MODE_DPC(hwfn) {if (cold) qlnx_sp_isr(hwfn);} 457 #define OSAL_WARN(cond, fmt, args...) \ 458 if (cond) printf("%s: WARNING: " fmt, __func__, ## args); 459 460 #define OSAL_BITMAP_WEIGHT(bitmap, nbits) bitmap_weight(bitmap, nbits) 461 #define OSAL_GET_RDMA_SB_ID(p_hwfn, cnq_id) ecore_rdma_get_sb_id(p_hwfn, cnq_id) 462 463 static inline int 464 qlnx_test_and_change_bit(long bit, volatile unsigned long *var) 465 { 466 long val; 467 468 var += BIT_WORD(bit); 469 bit %= BITS_PER_LONG; 470 bit = (1UL << bit); 471 472 val = *var; 473 474 if (val & bit) 475 return (test_and_clear_bit(bit, var)); 476 477 return (test_and_set_bit(bit, var)); 478 } 479 480 #define OSAL_TEST_AND_FLIP_BIT qlnx_test_and_change_bit 481 #define OSAL_TEST_AND_CLEAR_BIT test_and_clear_bit 482 #define OSAL_MEMCMP memcmp 483 #define OSAL_SPIN_LOCK_IRQSAVE(x, y) { (void)y; mtx_lock(x); } 484 #define OSAL_SPIN_UNLOCK_IRQSAVE(x, y) { (void)y; mtx_unlock(x); } 485 486 static inline u32 487 OSAL_CRC32(u32 crc, u8 *ptr, u32 length) 488 { 489 int i; 490 491 while (length--) { 492 crc ^= *ptr++; 493 for (i = 0; i < 8; i++) 494 crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0); 495 } 496 return crc; 497 } 498 499 static inline void 500 OSAL_CRC8_POPULATE(u8 * cdu_crc8_table, u8 polynomial) 501 { 502 return; 503 } 504 505 static inline u8 506 OSAL_CRC8(u8 * cdu_crc8_table, u8 * data_to_crc, int data_to_crc_len, u8 init_value) 507 { 508 return ECORE_NOTIMPL; 509 } 510 511 #define OSAL_HW_INFO_CHANGE(p_hwfn, offset) 512 #define OSAL_MFW_TLV_REQ(p_hwfn) 513 #define OSAL_LLDP_RX_TLVS(p_hwfn, buffer, len) 514 #define OSAL_MFW_CMD_PREEMPT(p_hwfn) 515 #define OSAL_TRANSCEIVER_UPDATE(p_hwfn) 516 #define OSAL_MFW_FILL_TLV_DATA(p_hwfn, group, data) (0) 517 518 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0) 519 520 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) \ 521 qlnx_osal_vf_fill_acquire_resc_req(p_hwfn, req, vf_sw_info) 522 523 #define OSAL_IOV_PF_RESP_TYPE(p_hwfn, relative_vf_id, status) 524 #define OSAL_IOV_VF_CLEANUP(p_hwfn, relative_vf_id) \ 525 qlnx_osal_iov_vf_cleanup(p_hwfn, relative_vf_id) 526 527 #define OSAL_IOV_VF_ACQUIRE(p_hwfn, relative_vf_id) ECORE_SUCCESS 528 #define OSAL_IOV_GET_OS_TYPE() VFPF_ACQUIRE_OS_FREEBSD 529 #define OSAL_IOV_PRE_START_VPORT(p_hwfn, relative_vf_id, params) ECORE_SUCCESS 530 #define OSAL_IOV_POST_START_VPORT(p_hwfn, relative_vf_id, vport_id, opaque_fid) 531 #define OSAL_PF_VALIDATE_MODIFY_TUNN_CONFIG(p_hwfn, x, y, z) ECORE_SUCCESS 532 #define OSAL_IOV_CHK_UCAST(p_hwfn, vfid, params) \ 533 qlnx_iov_chk_ucast(p_hwfn, vfid, params); 534 #define OSAL_PF_VF_MALICIOUS(p_hwfn, relative_vf_id) 535 #define OSAL_IOV_VF_MSG_TYPE(p_hwfn, relative_vf_id, type) 536 #define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs) \ 537 qlnx_iov_update_vport(p_hwfn, vfid, params, tlvs) 538 #define OSAL_PF_VF_MSG(p_hwfn, relative_vf_id) \ 539 qlnx_pf_vf_msg(p_hwfn, relative_vf_id) 540 541 #define OSAL_VF_FLR_UPDATE(p_hwfn) qlnx_vf_flr_update(p_hwfn) 542 #define OSAL_IOV_VF_VPORT_STOP(p_hwfn, vf) 543 544 #endif /* #ifdef __BCM_OSAL_ECORE_PACKAGE */ 545