1 /* 2 * Copyright (c) 2017-2018 Cavium, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #ifndef __BCM_OSAL_ECORE_PACKAGE 31 #define __BCM_OSAL_ECORE_PACKAGE 32 33 #include "qlnx_os.h" 34 #include "ecore_status.h" 35 #include <sys/bitstring.h> 36 37 #include <linux/types.h> 38 #include <linux/bitmap.h> 39 40 #define OSAL_NUM_CPUS() mp_ncpus 41 /* 42 * prototypes of freebsd specific functions required by ecore 43 */ 44 extern uint32_t qlnx_pci_bus_get_bar_size(void *ecore_dev, uint8_t bar_id); 45 extern uint32_t qlnx_pci_read_config_byte(void *ecore_dev, uint32_t pci_reg, 46 uint8_t *reg_value); 47 extern uint32_t qlnx_pci_read_config_word(void *ecore_dev, uint32_t pci_reg, 48 uint16_t *reg_value); 49 extern uint32_t qlnx_pci_read_config_dword(void *ecore_dev, uint32_t pci_reg, 50 uint32_t *reg_value); 51 extern void qlnx_pci_write_config_byte(void *ecore_dev, uint32_t pci_reg, 52 uint8_t reg_value); 53 extern void qlnx_pci_write_config_word(void *ecore_dev, uint32_t pci_reg, 54 uint16_t reg_value); 55 extern void qlnx_pci_write_config_dword(void *ecore_dev, uint32_t pci_reg, 56 uint32_t reg_value); 57 extern int qlnx_pci_find_capability(void *ecore_dev, int cap); 58 extern int qlnx_pci_find_ext_capability(void *ecore_dev, int ext_cap); 59 60 extern uint32_t qlnx_direct_reg_rd32(void *p_hwfn, uint32_t *reg_addr); 61 extern void qlnx_direct_reg_wr32(void *p_hwfn, void *reg_addr, uint32_t value); 62 extern void qlnx_direct_reg_wr64(void *p_hwfn, void *reg_addr, uint64_t value); 63 64 extern uint32_t qlnx_reg_rd32(void *p_hwfn, uint32_t reg_addr); 65 extern void qlnx_reg_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value); 66 extern void qlnx_reg_wr16(void *p_hwfn, uint32_t reg_addr, uint16_t value); 67 68 extern void qlnx_dbell_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value); 69 extern void qlnx_dbell_wr32_db(void *p_hwfn, void *reg_addr, uint32_t value); 70 71 extern void *qlnx_dma_alloc_coherent(void *ecore_dev, bus_addr_t *phys, 72 uint32_t size); 73 extern void qlnx_dma_free_coherent(void *ecore_dev, void *v_addr, 74 bus_addr_t phys, uint32_t size); 75 76 extern void qlnx_link_update(void *p_hwfn); 77 extern void qlnx_barrier(void *p_hwfn); 78 79 extern void *qlnx_zalloc(uint32_t size); 80 81 extern void qlnx_get_protocol_stats(void *cdev, int proto_type, 82 void *proto_stats); 83 84 extern void qlnx_sp_isr(void *arg); 85 86 extern void qlnx_osal_vf_fill_acquire_resc_req(void *p_hwfn, void *p_resc_req, 87 void *p_sw_info); 88 extern void qlnx_osal_iov_vf_cleanup(void *p_hwfn, uint8_t relative_vf_id); 89 extern int qlnx_iov_chk_ucast(void *p_hwfn, int vfid, void *params); 90 extern int qlnx_iov_update_vport(void *p_hwfn, uint8_t vfid, void *params, 91 uint16_t *tlvs); 92 extern int qlnx_pf_vf_msg(void *p_hwfn, uint16_t relative_vf_id); 93 extern void qlnx_vf_flr_update(void *p_hwfn); 94 95 #define nothing do {} while(0) 96 #ifdef ECORE_PACKAGE 97 98 /* Memory Types */ 99 #define u8 uint8_t 100 #define u16 uint16_t 101 #define u32 uint32_t 102 #define u64 uint64_t 103 #define s16 uint16_t 104 #define s32 uint32_t 105 106 #ifndef QLNX_RDMA 107 108 static __inline unsigned long 109 roundup_pow_of_two(unsigned long x) 110 { 111 return (1UL << flsl(x - 1)); 112 } 113 114 static __inline int 115 is_power_of_2(unsigned long n) 116 { 117 return (n == roundup_pow_of_two(n)); 118 } 119 120 static __inline unsigned long 121 rounddown_pow_of_two(unsigned long x) 122 { 123 return (1UL << (flsl(x) - 1)); 124 } 125 126 #define max_t(type, val1, val2) \ 127 ((type)(val1) > (type)(val2) ? (type)(val1) : (val2)) 128 #define min_t(type, val1, val2) \ 129 ((type)(val1) < (type)(val2) ? (type)(val1) : (val2)) 130 131 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0])) 132 #define BUILD_BUG_ON(cond) nothing 133 134 #endif /* #ifndef QLNX_RDMA */ 135 136 #define OSAL_UNUSED 137 138 #define OSAL_CPU_TO_BE64(val) htobe64(val) 139 #define OSAL_BE64_TO_CPU(val) be64toh(val) 140 141 #define OSAL_CPU_TO_BE32(val) htobe32(val) 142 #define OSAL_BE32_TO_CPU(val) be32toh(val) 143 144 #define OSAL_CPU_TO_LE32(val) htole32(val) 145 #define OSAL_LE32_TO_CPU(val) le32toh(val) 146 147 #define OSAL_CPU_TO_BE16(val) htobe16(val) 148 #define OSAL_BE16_TO_CPU(val) be16toh(val) 149 150 #define OSAL_CPU_TO_LE16(val) htole16(val) 151 #define OSAL_LE16_TO_CPU(val) le16toh(val) 152 153 static __inline uint32_t 154 qlnx_get_cache_line_size(void) 155 { 156 return (CACHE_LINE_SIZE); 157 } 158 159 #define OSAL_CACHE_LINE_SIZE qlnx_get_cache_line_size() 160 161 #define OSAL_BE32 uint32_t 162 #define dma_addr_t bus_addr_t 163 #define osal_size_t size_t 164 165 typedef struct mtx osal_spinlock_t; 166 typedef struct mtx osal_mutex_t; 167 168 typedef void * osal_dpc_t; 169 170 typedef struct _osal_list_entry_t 171 { 172 struct _osal_list_entry_t *next, *prev; 173 } osal_list_entry_t; 174 175 typedef struct osal_list_t 176 { 177 osal_list_entry_t *head, *tail; 178 unsigned long cnt; 179 } osal_list_t; 180 181 /* OSAL functions */ 182 183 #define OSAL_UDELAY(time) DELAY(time) 184 #define OSAL_MSLEEP(time) qlnx_mdelay(__func__, time) 185 186 #define OSAL_ALLOC(dev, GFP, size) qlnx_zalloc(size) 187 #define OSAL_ZALLOC(dev, GFP, size) qlnx_zalloc(size) 188 #define OSAL_VALLOC(dev, size) qlnx_zalloc(size) 189 #define OSAL_VZALLOC(dev, size) qlnx_zalloc(size) 190 191 #define OSAL_FREE(dev, memory) free(memory, M_QLNXBUF) 192 #define OSAL_VFREE(dev, memory) free(memory, M_QLNXBUF) 193 194 #define OSAL_MEM_ZERO(mem, size) bzero(mem, size) 195 196 #define OSAL_MEMCPY(dst, src, size) memcpy(dst, src, size) 197 198 #define OSAL_DMA_ALLOC_COHERENT(dev, phys, size) \ 199 qlnx_dma_alloc_coherent(dev, phys, size) 200 201 #define OSAL_DMA_FREE_COHERENT(dev, virt, phys, size) \ 202 qlnx_dma_free_coherent(dev, virt, phys, size) 203 #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0) 204 205 #define REG_WR(hwfn, addr, val) qlnx_reg_wr32(hwfn, addr, val) 206 #define REG_WR16(hwfn, addr, val) qlnx_reg_wr16(hwfn, addr, val) 207 #define DIRECT_REG_WR(p_hwfn, addr, value) qlnx_direct_reg_wr32(p_hwfn, addr, value) 208 #define DIRECT_REG_WR64(p_hwfn, addr, value) \ 209 qlnx_direct_reg_wr64(p_hwfn, addr, value) 210 #define DIRECT_REG_WR_DB(p_hwfn, addr, value) qlnx_dbell_wr32_db(p_hwfn, addr, value) 211 #define DIRECT_REG_RD(p_hwfn, addr) qlnx_direct_reg_rd32(p_hwfn, addr) 212 #define REG_RD(hwfn, addr) qlnx_reg_rd32(hwfn, addr) 213 #define DOORBELL(hwfn, addr, value) \ 214 qlnx_dbell_wr32(hwfn, addr, value) 215 216 #define OSAL_SPIN_LOCK_ALLOC(p_hwfn, mutex) 217 #define OSAL_SPIN_LOCK_DEALLOC(mutex) mtx_destroy(mutex) 218 #define OSAL_SPIN_LOCK_INIT(lock) {\ 219 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_SPIN); \ 220 } 221 222 #define OSAL_SPIN_UNLOCK(lock) {\ 223 mtx_unlock(lock); \ 224 } 225 #define OSAL_SPIN_LOCK(lock) {\ 226 mtx_lock(lock); \ 227 } 228 229 #define OSAL_MUTEX_ALLOC(p_hwfn, mutex) 230 #define OSAL_MUTEX_DEALLOC(mutex) mtx_destroy(mutex) 231 #define OSAL_MUTEX_INIT(lock) {\ 232 mtx_init(lock, __func__, MTX_NETWORK_LOCK, MTX_DEF);\ 233 } 234 235 #define OSAL_MUTEX_ACQUIRE(lock) mtx_lock(lock) 236 #define OSAL_MUTEX_RELEASE(lock) mtx_unlock(lock) 237 238 #define OSAL_DPC_ALLOC(hwfn) malloc(PAGE_SIZE, M_QLNXBUF, M_NOWAIT) 239 #define OSAL_DPC_INIT(dpc, hwfn) nothing 240 extern void qlnx_schedule_recovery(void *p_hwfn); 241 #define OSAL_SCHEDULE_RECOVERY_HANDLER(x) do {qlnx_schedule_recovery(x);} while(0) 242 #define OSAL_HW_ERROR_OCCURRED(hwfn, err_type) nothing 243 #define OSAL_DPC_SYNC(hwfn) nothing 244 245 static inline void OSAL_DCBX_AEN(void *p_hwfn, u32 mib_type) 246 { 247 return; 248 } 249 250 static inline bool OSAL_NVM_IS_ACCESS_ENABLED(void *p_hwfn) 251 { 252 return 1; 253 } 254 255 #define OSAL_LIST_INIT(list) \ 256 do { \ 257 (list)->head = NULL; \ 258 (list)->tail = NULL; \ 259 (list)->cnt = 0; \ 260 } while (0) 261 262 #define OSAL_LIST_INSERT_ENTRY_AFTER(entry, entry_prev, list) \ 263 do { \ 264 (entry)->prev = (entry_prev); \ 265 (entry)->next = (entry_prev)->next; \ 266 (entry)->next->prev = (entry); \ 267 (entry_prev)->next = (entry); \ 268 (list)->cnt++; \ 269 } while (0); 270 271 #define OSAL_LIST_SPLICE_TAIL_INIT(new_list, list) \ 272 do { \ 273 ((new_list)->tail)->next = ((list)->head); \ 274 ((list)->head)->prev = ((new_list)->tail); \ 275 (list)->head = (new_list)->head; \ 276 (list)->cnt = (list)->cnt + (new_list)->cnt; \ 277 OSAL_LIST_INIT(new_list); \ 278 } while (0); 279 280 #define OSAL_LIST_PUSH_HEAD(entry, list) \ 281 do { \ 282 (entry)->prev = (osal_list_entry_t *)0; \ 283 (entry)->next = (list)->head; \ 284 if ((list)->tail == (osal_list_entry_t *)0) { \ 285 (list)->tail = (entry); \ 286 } else { \ 287 (list)->head->prev = (entry); \ 288 } \ 289 (list)->head = (entry); \ 290 (list)->cnt++; \ 291 } while (0) 292 293 #define OSAL_LIST_PUSH_TAIL(entry, list) \ 294 do { \ 295 (entry)->next = (osal_list_entry_t *)0; \ 296 (entry)->prev = (list)->tail; \ 297 if ((list)->tail) { \ 298 (list)->tail->next = (entry); \ 299 } else { \ 300 (list)->head = (entry); \ 301 } \ 302 (list)->tail = (entry); \ 303 (list)->cnt++; \ 304 } while (0) 305 306 #define OSAL_LIST_FIRST_ENTRY(list, type, field) \ 307 (type *)((list)->head) 308 309 #define OSAL_LIST_REMOVE_ENTRY(entry, list) \ 310 do { \ 311 if ((list)->head == (entry)) { \ 312 if ((list)->head) { \ 313 (list)->head = (list)->head->next; \ 314 if ((list)->head) { \ 315 (list)->head->prev = (osal_list_entry_t *)0; \ 316 } else { \ 317 (list)->tail = (osal_list_entry_t *)0; \ 318 } \ 319 (list)->cnt--; \ 320 } \ 321 } else if ((list)->tail == (entry)) { \ 322 if ((list)->tail) { \ 323 (list)->tail = (list)->tail->prev; \ 324 if ((list)->tail) { \ 325 (list)->tail->next = (osal_list_entry_t *)0; \ 326 } else { \ 327 (list)->head = (osal_list_entry_t *)0; \ 328 } \ 329 (list)->cnt--; \ 330 } \ 331 } else { \ 332 (entry)->prev->next = (entry)->next; \ 333 (entry)->next->prev = (entry)->prev; \ 334 (list)->cnt--; \ 335 } \ 336 } while (0) 337 338 #define OSAL_LIST_IS_EMPTY(list) \ 339 ((list)->cnt == 0) 340 341 #define OSAL_LIST_NEXT(entry, field, type) \ 342 (type *)((&((entry)->field))->next) 343 344 #define OSAL_LIST_FOR_EACH_ENTRY(entry, list, field, type) \ 345 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field); \ 346 entry; \ 347 entry = OSAL_LIST_NEXT(entry, field, type)) 348 349 #define OSAL_LIST_FOR_EACH_ENTRY_SAFE(entry, tmp_entry, list, field, type) \ 350 for (entry = OSAL_LIST_FIRST_ENTRY(list, type, field), \ 351 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL; \ 352 entry != NULL; \ 353 entry = (type *)tmp_entry, \ 354 tmp_entry = (entry) ? OSAL_LIST_NEXT(entry, field, type) : NULL) 355 356 #define OSAL_BAR_SIZE(dev, bar_id) qlnx_pci_bus_get_bar_size(dev, bar_id) 357 358 #define OSAL_PCI_READ_CONFIG_BYTE(dev, reg, value) \ 359 qlnx_pci_read_config_byte(dev, reg, value); 360 #define OSAL_PCI_READ_CONFIG_WORD(dev, reg, value) \ 361 qlnx_pci_read_config_word(dev, reg, value); 362 #define OSAL_PCI_READ_CONFIG_DWORD(dev, reg, value) \ 363 qlnx_pci_read_config_dword(dev, reg, value); 364 365 #define OSAL_PCI_WRITE_CONFIG_BYTE(dev, reg, value) \ 366 qlnx_pci_write_config_byte(dev, reg, value); 367 #define OSAL_PCI_WRITE_CONFIG_WORD(dev, reg, value) \ 368 qlnx_pci_write_config_word(dev, reg, value); 369 #define OSAL_PCI_WRITE_CONFIG_DWORD(dev, reg, value) \ 370 qlnx_pci_write_config_dword(dev, reg, value); 371 372 #define OSAL_PCI_FIND_CAPABILITY(dev, cap) qlnx_pci_find_capability(dev, cap) 373 #define OSAL_PCI_FIND_EXT_CAPABILITY(dev, ext_cap) \ 374 qlnx_pci_find_ext_capability(dev, ext_cap) 375 376 #define OSAL_MMIOWB(dev) qlnx_barrier(dev) 377 #define OSAL_BARRIER(dev) qlnx_barrier(dev) 378 379 #define OSAL_SMP_MB(dev) mb() 380 #define OSAL_SMP_RMB(dev) rmb() 381 #define OSAL_SMP_WMB(dev) wmb() 382 #define OSAL_RMB(dev) rmb() 383 #define OSAL_WMB(dev) wmb() 384 #define OSAL_DMA_SYNC(dev, addr, length, is_post) 385 386 #define OSAL_FIND_FIRST_BIT find_first_bit 387 #define OSAL_SET_BIT(bit, bitmap) bit_set((bitstr_t *)bitmap, bit) 388 #define OSAL_CLEAR_BIT(bit, bitmap) bit_clear((bitstr_t *)bitmap, bit) 389 #define OSAL_TEST_BIT(bit, bitmap) bit_test((bitstr_t *)bitmap, bit) 390 #define OSAL_FIND_FIRST_ZERO_BIT(bitmap, length) \ 391 find_first_zero_bit(bitmap, length) 392 393 #define OSAL_LINK_UPDATE(hwfn, ptt) qlnx_link_update(hwfn) 394 395 #define QLNX_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) 396 #define QLNX_ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) 397 398 #define OSAL_NUM_ACTIVE_CPU() mp_ncpus 399 400 #ifndef DIV_ROUND_UP 401 #define DIV_ROUND_UP(size, to_what) QLNX_DIV_ROUND_UP((size), (to_what)) 402 #endif 403 404 #define ROUNDUP(value, to_what) QLNX_ROUNDUP((value), (to_what)) 405 406 #define OSAL_ROUNDUP_POW_OF_TWO(val) roundup_pow_of_two((val)) 407 408 static __inline uint32_t 409 qlnx_log2(uint32_t x) 410 { 411 uint32_t log = 0; 412 413 while (x >>= 1) log++; 414 415 return (log); 416 } 417 418 #define OSAL_LOG2(val) qlnx_log2(val) 419 #define OFFSETOF(str, field) offsetof(str, field) 420 #define PRINT device_printf 421 #define PRINT_ERR device_printf 422 #define OSAL_ASSERT(is_assert) nothing 423 #define OSAL_BEFORE_PF_START(cdev, my_id) {}; 424 #define OSAL_AFTER_PF_STOP(cdev, my_id) {}; 425 426 #define INLINE __inline 427 #define OSAL_INLINE __inline 428 #define OSAL_UNLIKELY 429 #define OSAL_NULL NULL 430 431 #define OSAL_MAX_T(type, __max1, __max2) max_t(type, __max1, __max2) 432 #define OSAL_MIN_T(type, __max1, __max2) min_t(type, __max1, __max2) 433 434 #define __iomem 435 #define OSAL_IOMEM 436 437 #define int_ptr_t void * 438 #define osal_int_ptr_t void * 439 #define OSAL_BUILD_BUG_ON(cond) nothing 440 #define REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset)) 441 #define OSAL_REG_ADDR(hwfn, offset) (void *)((u8 *)(hwfn->regview) + (offset)) 442 443 #define OSAL_PAGE_SIZE PAGE_SIZE 444 445 #define OSAL_STRCPY(dst, src) strcpy(dst, src) 446 #define OSAL_STRNCPY(dst, src, bytes) strncpy(dst, src, bytes) 447 #define OSAL_STRLEN(src) strlen(src) 448 #define OSAL_SPRINTF sprintf 449 #define OSAL_SNPRINTF snprintf 450 #define OSAL_MEMSET memset 451 #define OSAL_ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0])) 452 #define osal_uintptr_t u64 453 454 #define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) (0) 455 #define OSAL_GET_PROTOCOL_STATS(p_hwfn, type, stats) \ 456 qlnx_get_protocol_stats(p_hwfn, type, stats); 457 #define OSAL_POLL_MODE_DPC(hwfn) {if (cold) qlnx_sp_isr(hwfn);} 458 #define OSAL_WARN(cond, fmt, args...) \ 459 if (cond) printf("%s: WARNING: " fmt, __func__, ## args); 460 461 #define OSAL_BITMAP_WEIGHT(bitmap, nbits) bitmap_weight(bitmap, nbits) 462 #define OSAL_GET_RDMA_SB_ID(p_hwfn, cnq_id) ecore_rdma_get_sb_id(p_hwfn, cnq_id) 463 464 static inline int 465 qlnx_test_and_change_bit(long bit, volatile unsigned long *var) 466 { 467 long val; 468 469 var += BIT_WORD(bit); 470 bit %= BITS_PER_LONG; 471 bit = (1UL << bit); 472 473 val = *var; 474 475 if (val & bit) 476 return (test_and_clear_bit(bit, var)); 477 478 return (test_and_set_bit(bit, var)); 479 } 480 481 #define OSAL_TEST_AND_FLIP_BIT qlnx_test_and_change_bit 482 #define OSAL_TEST_AND_CLEAR_BIT test_and_clear_bit 483 #define OSAL_MEMCMP memcmp 484 #define OSAL_SPIN_LOCK_IRQSAVE(x,y) {y=0; mtx_lock(x);} 485 #define OSAL_SPIN_UNLOCK_IRQSAVE(x,y) {y= 0; mtx_unlock(x);} 486 487 static inline u32 488 OSAL_CRC32(u32 crc, u8 *ptr, u32 length) 489 { 490 int i; 491 492 while (length--) { 493 crc ^= *ptr++; 494 for (i = 0; i < 8; i++) 495 crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0); 496 } 497 return crc; 498 } 499 500 static inline void 501 OSAL_CRC8_POPULATE(u8 * cdu_crc8_table, u8 polynomial) 502 { 503 return; 504 } 505 506 static inline u8 507 OSAL_CRC8(u8 * cdu_crc8_table, u8 * data_to_crc, int data_to_crc_len, u8 init_value) 508 { 509 return ECORE_NOTIMPL; 510 } 511 512 #define OSAL_HW_INFO_CHANGE(p_hwfn, offset) 513 #define OSAL_MFW_TLV_REQ(p_hwfn) 514 #define OSAL_LLDP_RX_TLVS(p_hwfn, buffer, len) 515 #define OSAL_MFW_CMD_PREEMPT(p_hwfn) 516 #define OSAL_TRANSCEIVER_UPDATE(p_hwfn) 517 #define OSAL_MFW_FILL_TLV_DATA(p_hwfn, group, data) (0) 518 519 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0) 520 521 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) \ 522 qlnx_osal_vf_fill_acquire_resc_req(p_hwfn, req, vf_sw_info) 523 524 #define OSAL_IOV_PF_RESP_TYPE(p_hwfn, relative_vf_id, status) 525 #define OSAL_IOV_VF_CLEANUP(p_hwfn, relative_vf_id) \ 526 qlnx_osal_iov_vf_cleanup(p_hwfn, relative_vf_id) 527 528 #define OSAL_IOV_VF_ACQUIRE(p_hwfn, relative_vf_id) ECORE_SUCCESS 529 #define OSAL_IOV_GET_OS_TYPE() VFPF_ACQUIRE_OS_FREEBSD 530 #define OSAL_IOV_PRE_START_VPORT(p_hwfn, relative_vf_id, params) ECORE_SUCCESS 531 #define OSAL_IOV_POST_START_VPORT(p_hwfn, relative_vf_id, vport_id, opaque_fid) 532 #define OSAL_PF_VALIDATE_MODIFY_TUNN_CONFIG(p_hwfn, x, y, z) ECORE_SUCCESS 533 #define OSAL_IOV_CHK_UCAST(p_hwfn, vfid, params) \ 534 qlnx_iov_chk_ucast(p_hwfn, vfid, params); 535 #define OSAL_PF_VF_MALICIOUS(p_hwfn, relative_vf_id) 536 #define OSAL_IOV_VF_MSG_TYPE(p_hwfn, relative_vf_id, type) 537 #define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs) \ 538 qlnx_iov_update_vport(p_hwfn, vfid, params, tlvs) 539 #define OSAL_PF_VF_MSG(p_hwfn, relative_vf_id) \ 540 qlnx_pf_vf_msg(p_hwfn, relative_vf_id) 541 542 #define OSAL_VF_FLR_UPDATE(p_hwfn) qlnx_vf_flr_update(p_hwfn) 543 #define OSAL_IOV_VF_VPORT_STOP(p_hwfn, vf) 544 545 #endif /* #ifdef ECORE_PACKAGE */ 546 547 #endif /* #ifdef __BCM_OSAL_ECORE_PACKAGE */ 548