1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #ifndef __QCOM_QUP_REG_H__ 31 #define __QCOM_QUP_REG_H__ 32 33 #define QUP_CONFIG 0x0000 34 #define QUP_CONFIG_N 0x001f 35 #define QUP_CONFIG_SPI_MODE (1U << 8) 36 #define QUP_CONFIG_MINI_CORE_I2C_MASTER (2U << 8) 37 #define QUP_CONFIG_MINI_CORE_I2C_SLAVE (3U << 8) 38 39 #define QUP_CONFIG_NO_OUTPUT (1U << 6) 40 #define QUP_CONFIG_NO_INPUT (1U << 7) 41 #define QUP_CONFIG_APP_CLK_ON_EN (1 << 12) 42 #define QUP_CONFIG_CLOCK_AUTO_GATE (1U << 13) 43 44 #define QUP_STATE 0x0004 45 #define QUP_STATE_VALID (1U << 2) 46 #define QUP_STATE_RESET 0 47 #define QUP_STATE_RUN 1 48 #define QUP_STATE_PAUSE 3 49 #define QUP_STATE_MASK 3 50 #define QUP_STATE_CLEAR 2 51 52 #define QUP_IO_M_MODES 0x0008 53 #define QUP_IO_M_OUTPUT_BLOCK_SIZE_MASK 0x3 54 #define QUP_IO_M_OUTPUT_BLOCK_SIZE_SHIFT 0 55 56 #define QUP_IO_M_OUTPUT_FIFO_SIZE_MASK 0x7 57 #define QUP_IO_M_OUTPUT_FIFO_SIZE_SHIFT 2 58 59 #define QUP_IO_M_INPUT_BLOCK_SIZE_MASK 0x3 60 #define QUP_IO_M_INPUT_BLOCK_SIZE_SHIFT 5 61 62 #define QUP_IO_M_INPUT_FIFO_SIZE_MASK 0x7 63 #define QUP_IO_M_INPUT_FIFO_SIZE_SHIFT 7 64 65 #define QUP_IO_M_PACK_EN (1U << 15) 66 #define QUP_IO_M_UNPACK_EN (1U << 14) 67 #define QUP_IO_M_INPUT_MODE_SHIFT 12 68 #define QUP_IO_M_OUTPUT_MODE_SHIFT 10 69 #define QUP_IO_M_INPUT_MODE_MASK 0x3 70 #define QUP_IO_M_OUTPUT_MODE_MASK 0x3 71 72 #define QUP_IO_M_MODE_FIFO 0 73 #define QUP_IO_M_MODE_BLOCK 1 74 #define QUP_IO_M_MODE_DMOV 2 75 #define QUP_IO_M_MODE_BAM 3 76 77 #define QUP_SW_RESET 0x000c 78 79 #define QUP_OPERATIONAL 0x0018 80 #define QUP_OP_IN_BLOCK_READ_REQ (1U << 13) 81 #define QUP_OP_OUT_BLOCK_WRITE_REQ (1U << 12) 82 #define QUP_OP_MAX_INPUT_DONE_FLAG (1U << 11) 83 #define QUP_OP_MAX_OUTPUT_DONE_FLAG (1U << 10) 84 #define QUP_OP_IN_SERVICE_FLAG (1U << 9) 85 #define QUP_OP_OUT_SERVICE_FLAG (1U << 8) 86 #define QUP_OP_IN_FIFO_FULL (1U << 7) 87 #define QUP_OP_OUT_FIFO_FULL (1U << 6) 88 #define QUP_OP_IN_FIFO_NOT_EMPTY (1U << 5) 89 #define QUP_OP_OUT_FIFO_NOT_EMPTY (1U << 4) 90 91 #define QUP_ERROR_FLAGS 0x001c 92 #define QUP_ERROR_FLAGS_EN 0x0020 93 #define QUP_ERROR_OUTPUT_OVER_RUN (1U << 5) 94 #define QUP_ERROR_INPUT_UNDER_RUN (1U << 4) 95 #define QUP_ERROR_OUTPUT_UNDER_RUN (1U << 3) 96 #define QUP_ERROR_INPUT_OVER_RUN (1U << 2) 97 98 #define QUP_OPERATIONAL_MASK 0x0028 99 100 #define QUP_HW_VERSION 0x0030 101 #define QUP_HW_VERSION_2_1_1 0x20010001 102 103 #define QUP_MX_OUTPUT_CNT 0x0100 104 #define QUP_MX_OUTPUT_CNT_CURRENT 0x0104 105 #define QUP_OUTPUT_FIFO 0x0110 106 #define QUP_MX_WRITE_CNT 0x0150 107 #define QUP_MX_WRITE_CNT_CURRENT 0x0154 108 #define QUP_MX_INPUT_CNT 0x0200 109 #define QUP_MX_INPUT_CNT_CURRENT 0x0204 110 #define QUP_MX_READ_CNT 0x0208 111 #define QUP_MX_READ_CNT_CURRENT 0x020c 112 #define QUP_INPUT_FIFO 0x0218 113 114 #endif /* __QCOM_QUP_REG_H__ */ 115 116