129332c0dSAdrian Chadd /*- 2*4d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause 329332c0dSAdrian Chadd * 429332c0dSAdrian Chadd * Copyright (c) 2022 Adrian Chadd <adrian@FreeBSD.org>. 529332c0dSAdrian Chadd * 629332c0dSAdrian Chadd * Redistribution and use in source and binary forms, with or without 729332c0dSAdrian Chadd * modification, are permitted provided that the following conditions 829332c0dSAdrian Chadd * are met: 929332c0dSAdrian Chadd * 1. Redistributions of source code must retain the above copyright 1029332c0dSAdrian Chadd * notice unmodified, this list of conditions, and the following 1129332c0dSAdrian Chadd * disclaimer. 1229332c0dSAdrian Chadd * 2. Redistributions in binary form must reproduce the above copyright 1329332c0dSAdrian Chadd * notice, this list of conditions and the following disclaimer in the 1429332c0dSAdrian Chadd * documentation and/or other materials provided with the distribution. 1529332c0dSAdrian Chadd * 1629332c0dSAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1729332c0dSAdrian Chadd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1829332c0dSAdrian Chadd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1929332c0dSAdrian Chadd * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 2029332c0dSAdrian Chadd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2129332c0dSAdrian Chadd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2229332c0dSAdrian Chadd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2329332c0dSAdrian Chadd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2429332c0dSAdrian Chadd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2529332c0dSAdrian Chadd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2629332c0dSAdrian Chadd * SUCH DAMAGE. 2729332c0dSAdrian Chadd */ 2829332c0dSAdrian Chadd 2929332c0dSAdrian Chadd #ifndef __QCOM_MDIO_IPQ4018_VAR_H__ 3029332c0dSAdrian Chadd #define __QCOM_MDIO_IPQ4018_VAR_H__ 3129332c0dSAdrian Chadd 3229332c0dSAdrian Chadd #define MDIO_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 3329332c0dSAdrian Chadd #define MDIO_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 3429332c0dSAdrian Chadd #define MDIO_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED) 3529332c0dSAdrian Chadd 3629332c0dSAdrian Chadd /* 3729332c0dSAdrian Chadd * register space access macros 3829332c0dSAdrian Chadd */ 3929332c0dSAdrian Chadd #define MDIO_WRITE(sc, reg, val) do { \ 4029332c0dSAdrian Chadd bus_write_4(sc->sc_mem_res, (reg), (val)); \ 4129332c0dSAdrian Chadd } while (0) 4229332c0dSAdrian Chadd 4329332c0dSAdrian Chadd #define MDIO_READ(sc, reg) bus_read_4(sc->sc_mem_res, (reg)) 4429332c0dSAdrian Chadd 4529332c0dSAdrian Chadd #define MDIO_BARRIER_WRITE(sc) bus_barrier((sc)->sc_mem_res, \ 4629332c0dSAdrian Chadd 0, (sc)->sc_mem_res_size, BUS_SPACE_BARRIER_WRITE) 4729332c0dSAdrian Chadd #define MDIO_BARRIER_READ(sc) bus_barrier((sc)->sc_mem_res, \ 4829332c0dSAdrian Chadd 0, (sc)->sc_mem_res_size, BUS_SPACE_BARRIER_READ) 4929332c0dSAdrian Chadd #define MDIO_BARRIER_RW(sc) bus_barrier((sc)->sc_mem_res, \ 5029332c0dSAdrian Chadd 0, (sc)->sc_mem_res_size, \ 5129332c0dSAdrian Chadd BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE) 5229332c0dSAdrian Chadd 5329332c0dSAdrian Chadd #define MDIO_SET_BITS(sc, reg, bits) \ 5429332c0dSAdrian Chadd GPIO_WRITE(sc, reg, MDIO_READ(sc, (reg)) | (bits)) 5529332c0dSAdrian Chadd 5629332c0dSAdrian Chadd #define MDIO_CLEAR_BITS(sc, reg, bits) \ 5729332c0dSAdrian Chadd GPIO_WRITE(sc, reg, MDIO_READ(sc, (reg)) & ~(bits)) 5829332c0dSAdrian Chadd 5929332c0dSAdrian Chadd struct qcom_mdio_ipq4018_softc { 6029332c0dSAdrian Chadd device_t sc_dev; 6129332c0dSAdrian Chadd struct mtx sc_mtx; 6229332c0dSAdrian Chadd struct resource *sc_mem_res; 6329332c0dSAdrian Chadd size_t sc_mem_res_size; 6429332c0dSAdrian Chadd int sc_mem_rid; 6529332c0dSAdrian Chadd uint32_t sc_debug; 6629332c0dSAdrian Chadd }; 6729332c0dSAdrian Chadd 6829332c0dSAdrian Chadd #endif /* __QCOM_MDIO_IPQ4018_VAR_H__ */ 69