1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 * 30 */ 31 32 #ifndef __QCOM_ESS_EDMA_HW_H__ 33 #define __QCOM_ESS_EDMA_HW_H__ 34 35 extern int qcom_ess_edma_hw_reset(struct qcom_ess_edma_softc *sc); 36 extern int qcom_ess_edma_hw_get_tx_intr_moderation( 37 struct qcom_ess_edma_softc *sc, uint32_t *usec); 38 extern int qcom_ess_edma_hw_set_tx_intr_moderation( 39 struct qcom_ess_edma_softc *sc, uint32_t usec); 40 extern int qcom_ess_edma_hw_set_rx_intr_moderation( 41 struct qcom_ess_edma_softc *sc, uint32_t usec); 42 extern int qcom_ess_edma_hw_intr_disable(struct qcom_ess_edma_softc *sc); 43 extern int qcom_ess_edma_hw_intr_rx_intr_set_enable( 44 struct qcom_ess_edma_softc *sc, int rxq, bool state); 45 extern int qcom_ess_edma_hw_intr_tx_intr_set_enable( 46 struct qcom_ess_edma_softc *sc, int txq, bool state); 47 extern int qcom_ess_edma_hw_intr_enable(struct qcom_ess_edma_softc *sc); 48 extern int qcom_ess_edma_hw_intr_status_clear( 49 struct qcom_ess_edma_softc *sc); 50 extern int qcom_ess_edma_hw_intr_rx_ack(struct qcom_ess_edma_softc *sc, 51 int rx_queue); 52 extern int qcom_ess_edma_hw_intr_tx_ack(struct qcom_ess_edma_softc *sc, 53 int tx_queue); 54 extern int qcom_ess_edma_hw_configure_rss_table( 55 struct qcom_ess_edma_softc *sc); 56 extern int qcom_ess_edma_hw_configure_load_balance_table( 57 struct qcom_ess_edma_softc *sc); 58 extern int qcom_ess_edma_hw_configure_tx_virtual_queue( 59 struct qcom_ess_edma_softc *sc); 60 extern int qcom_ess_edma_hw_configure_default_axi_transaction_size( 61 struct qcom_ess_edma_softc *sc); 62 extern int qcom_ess_edma_hw_stop_txrx_queues(struct qcom_ess_edma_softc *sc); 63 extern int qcom_ess_edma_hw_stop(struct qcom_ess_edma_softc *sc); 64 65 extern int qcom_ess_edma_hw_rfd_prod_index_update( 66 struct qcom_ess_edma_softc *sc, int queue, int idx); 67 extern int qcom_ess_edma_hw_rfd_get_cons_index( 68 struct qcom_ess_edma_softc *sc, int queue); 69 extern int qcom_ess_edma_hw_rfd_sw_cons_index_update( 70 struct qcom_ess_edma_softc *sc, int queue, int idx); 71 72 extern int qcom_ess_edma_hw_setup(struct qcom_ess_edma_softc *sc); 73 extern int qcom_ess_edma_hw_setup_tx(struct qcom_ess_edma_softc *sc); 74 extern int qcom_ess_edma_hw_setup_rx(struct qcom_ess_edma_softc *sc); 75 extern int qcom_ess_edma_hw_setup_txrx_desc_rings( 76 struct qcom_ess_edma_softc *sc); 77 extern int qcom_ess_edma_hw_tx_enable(struct qcom_ess_edma_softc *sc); 78 extern int qcom_ess_edma_hw_rx_enable(struct qcom_ess_edma_softc *sc); 79 extern int qcom_ess_edma_hw_tx_read_tpd_cons_idx( 80 struct qcom_ess_edma_softc *sc, int queue_id, uint16_t *idx); 81 extern int qcom_ess_edma_hw_tx_update_tpd_prod_idx( 82 struct qcom_ess_edma_softc *sc, int queue_id, uint16_t idx); 83 extern int qcom_ess_edma_hw_tx_update_cons_idx( 84 struct qcom_ess_edma_softc *sc, int queue_id, uint16_t idx); 85 86 #endif /* __QCOM_ESS_EDMA_VAR_H__ */ 87