xref: /freebsd/sys/dev/qcom_dwc3/qcom_dwc3.c (revision d0b2dbfa0ecf2bbc9709efc5e20baf8e4b44bbbf)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.Org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 /*
29  * Qualcomm DWC3 glue
30  */
31 
32 #include <sys/cdefs.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bus.h>
36 #include <sys/rman.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/gpio.h>
40 #include <machine/bus.h>
41 
42 #include <dev/fdt/simplebus.h>
43 
44 #include <dev/fdt/fdt_common.h>
45 #include <dev/ofw/ofw_bus.h>
46 #include <dev/ofw/ofw_bus_subr.h>
47 #include <dev/ofw/ofw_subr.h>
48 
49 #include <dev/extres/clk/clk.h>
50 #include <dev/extres/hwreset/hwreset.h>
51 #include <dev/extres/phy/phy_usb.h>
52 #include <dev/extres/syscon/syscon.h>
53 
54 static struct ofw_compat_data compat_data[] = {
55 	{ "qcom,dwc3",			1},
56 	{ NULL,				0 }
57 };
58 
59 struct qcom_dwc3_softc {
60 	struct simplebus_softc	sc;
61 	device_t		dev;
62 	clk_t			clk_master;
63 	clk_t			clk_sleep;
64 	clk_t			clk_mock_utmi;
65 	int			type;
66 };
67 
68 static int
69 qcom_dwc3_probe(device_t dev)
70 {
71 	phandle_t node;
72 
73 	if (!ofw_bus_status_okay(dev))
74 		return (ENXIO);
75 
76 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
77 		return (ENXIO);
78 
79 	/* Binding says that we need a child node for the actual dwc3 controller */
80 	node = ofw_bus_get_node(dev);
81 	if (OF_child(node) <= 0)
82 		return (ENXIO);
83 
84 	device_set_desc(dev, "Qualcomm DWC3");
85 	return (BUS_PROBE_DEFAULT);
86 }
87 
88 static int
89 qcom_dwc3_attach(device_t dev)
90 {
91 	struct qcom_dwc3_softc *sc;
92 	device_t cdev;
93 	phandle_t node, child;
94 	int err;
95 
96 	sc = device_get_softc(dev);
97 	sc->dev = dev;
98 	node = ofw_bus_get_node(dev);
99 	sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
100 
101 	/* Mandatory clocks */
102 	if (clk_get_by_ofw_name(dev, 0, "master", &sc->clk_master) != 0) {
103 		device_printf(dev, "Cannot get master clock\n");
104 		return (ENXIO);
105 	}
106 
107 	if (clk_get_by_ofw_name(dev, 0, "sleep", &sc->clk_sleep) != 0) {
108 		device_printf(dev, "Cannot get sleep clock\n");
109 		return (ENXIO);
110 	}
111 
112 	if (clk_get_by_ofw_name(dev, 0, "mock_utmi", &sc->clk_mock_utmi) != 0) {
113 		device_printf(dev, "Cannot get mock_utmi clock\n");
114 		return (ENXIO);
115 	}
116 
117 	/*
118 	 * TODO: when we support optional reset blocks, take things
119 	 * out of reset (well, put them into reset, then take out of reset.)
120 	 */
121 
122 	/*
123 	 * Now, iterate over the clocks and enable them.
124 	 */
125 	err = clk_enable(sc->clk_master);
126 	if (err != 0) {
127 		device_printf(dev, "Could not enable clock %s\n",
128 		    clk_get_name(sc->clk_master));
129 		return (ENXIO);
130 	}
131 	err = clk_enable(sc->clk_sleep);
132 	if (err != 0) {
133 		device_printf(dev, "Could not enable clock %s\n",
134 		    clk_get_name(sc->clk_sleep));
135 		return (ENXIO);
136 	}
137 	err = clk_enable(sc->clk_mock_utmi);
138 	if (err != 0) {
139 		device_printf(dev, "Could not enable clock %s\n",
140 		    clk_get_name(sc->clk_mock_utmi));
141 		return (ENXIO);
142 	}
143 
144 	/*
145 	 * Rest is glue code.
146 	 */
147 
148 	simplebus_init(dev, node);
149 	if (simplebus_fill_ranges(node, &sc->sc) < 0) {
150 		device_printf(dev, "could not get ranges\n");
151 		return (ENXIO);
152 	}
153 
154 	for (child = OF_child(node); child > 0; child = OF_peer(child)) {
155 		cdev = simplebus_add_device(dev, child, 0, NULL, -1, NULL);
156 		if (cdev != NULL)
157 			device_probe_and_attach(cdev);
158 	}
159 
160 	return (bus_generic_attach(dev));
161 }
162 
163 static device_method_t qcom_dwc3_methods[] = {
164 	/* Device interface */
165 	DEVMETHOD(device_probe,		qcom_dwc3_probe),
166 	DEVMETHOD(device_attach,	qcom_dwc3_attach),
167 	/* XXX TODO suspend */
168 	/* XXX TODO resume */
169 
170 	DEVMETHOD_END
171 };
172 
173 DEFINE_CLASS_1(qcom_dwc3, qcom_dwc3_driver, qcom_dwc3_methods,
174     sizeof(struct qcom_dwc3_softc), simplebus_driver);
175 DRIVER_MODULE(qcom_dwc3, simplebus, qcom_dwc3_driver, 0, 0);
176