xref: /freebsd/sys/dev/qcom_dwc3/qcom_dwc3.c (revision 7fdf597e96a02165cfe22ff357b857d5fa15ed8a)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.Org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 /*
29  * Qualcomm DWC3 glue
30  */
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/rman.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
38 #include <sys/gpio.h>
39 #include <machine/bus.h>
40 
41 #include <dev/fdt/simplebus.h>
42 
43 #include <dev/fdt/fdt_common.h>
44 #include <dev/ofw/ofw_bus.h>
45 #include <dev/ofw/ofw_bus_subr.h>
46 #include <dev/ofw/ofw_subr.h>
47 
48 #include <dev/clk/clk.h>
49 #include <dev/hwreset/hwreset.h>
50 #include <dev/phy/phy_usb.h>
51 #include <dev/syscon/syscon.h>
52 
53 static struct ofw_compat_data compat_data[] = {
54 	{ "qcom,dwc3",			1},
55 	{ NULL,				0 }
56 };
57 
58 struct qcom_dwc3_softc {
59 	struct simplebus_softc	sc;
60 	device_t		dev;
61 	clk_t			clk_master;
62 	clk_t			clk_sleep;
63 	clk_t			clk_mock_utmi;
64 	int			type;
65 };
66 
67 static int
68 qcom_dwc3_probe(device_t dev)
69 {
70 	phandle_t node;
71 
72 	if (!ofw_bus_status_okay(dev))
73 		return (ENXIO);
74 
75 	if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
76 		return (ENXIO);
77 
78 	/* Binding says that we need a child node for the actual dwc3 controller */
79 	node = ofw_bus_get_node(dev);
80 	if (OF_child(node) <= 0)
81 		return (ENXIO);
82 
83 	device_set_desc(dev, "Qualcomm DWC3");
84 	return (BUS_PROBE_DEFAULT);
85 }
86 
87 static int
88 qcom_dwc3_attach(device_t dev)
89 {
90 	struct qcom_dwc3_softc *sc;
91 	device_t cdev;
92 	phandle_t node, child;
93 	int err;
94 
95 	sc = device_get_softc(dev);
96 	sc->dev = dev;
97 	node = ofw_bus_get_node(dev);
98 	sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
99 
100 	/* Mandatory clocks */
101 	if (clk_get_by_ofw_name(dev, 0, "master", &sc->clk_master) != 0) {
102 		device_printf(dev, "Cannot get master clock\n");
103 		return (ENXIO);
104 	}
105 
106 	if (clk_get_by_ofw_name(dev, 0, "sleep", &sc->clk_sleep) != 0) {
107 		device_printf(dev, "Cannot get sleep clock\n");
108 		return (ENXIO);
109 	}
110 
111 	if (clk_get_by_ofw_name(dev, 0, "mock_utmi", &sc->clk_mock_utmi) != 0) {
112 		device_printf(dev, "Cannot get mock_utmi clock\n");
113 		return (ENXIO);
114 	}
115 
116 	/*
117 	 * TODO: when we support optional reset blocks, take things
118 	 * out of reset (well, put them into reset, then take out of reset.)
119 	 */
120 
121 	/*
122 	 * Now, iterate over the clocks and enable them.
123 	 */
124 	err = clk_enable(sc->clk_master);
125 	if (err != 0) {
126 		device_printf(dev, "Could not enable clock %s\n",
127 		    clk_get_name(sc->clk_master));
128 		return (ENXIO);
129 	}
130 	err = clk_enable(sc->clk_sleep);
131 	if (err != 0) {
132 		device_printf(dev, "Could not enable clock %s\n",
133 		    clk_get_name(sc->clk_sleep));
134 		return (ENXIO);
135 	}
136 	err = clk_enable(sc->clk_mock_utmi);
137 	if (err != 0) {
138 		device_printf(dev, "Could not enable clock %s\n",
139 		    clk_get_name(sc->clk_mock_utmi));
140 		return (ENXIO);
141 	}
142 
143 	/*
144 	 * Rest is glue code.
145 	 */
146 
147 	simplebus_init(dev, node);
148 	if (simplebus_fill_ranges(node, &sc->sc) < 0) {
149 		device_printf(dev, "could not get ranges\n");
150 		return (ENXIO);
151 	}
152 
153 	for (child = OF_child(node); child > 0; child = OF_peer(child)) {
154 		cdev = simplebus_add_device(dev, child, 0, NULL, -1, NULL);
155 		if (cdev != NULL)
156 			device_probe_and_attach(cdev);
157 	}
158 
159 	bus_attach_children(dev);
160 	return (0);
161 }
162 
163 static device_method_t qcom_dwc3_methods[] = {
164 	/* Device interface */
165 	DEVMETHOD(device_probe,		qcom_dwc3_probe),
166 	DEVMETHOD(device_attach,	qcom_dwc3_attach),
167 	/* XXX TODO suspend */
168 	/* XXX TODO resume */
169 
170 	DEVMETHOD_END
171 };
172 
173 DEFINE_CLASS_1(qcom_dwc3, qcom_dwc3_driver, qcom_dwc3_methods,
174     sizeof(struct qcom_dwc3_softc), simplebus_driver);
175 DRIVER_MODULE(qcom_dwc3, simplebus, qcom_dwc3_driver, 0, 0);
176