xref: /freebsd/sys/dev/qcom_clk/qcom_clk_rcg2.h (revision 1d386b48a555f61cb7325543adbbb5c3f3407a66)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #ifndef	__QCOM_CLK_RCG2_H__
29 #define	__QCOM_CLK_RCG2_H__
30 
31 #include "qcom_clk_freqtbl.h"
32 
33 /* Flags */
34 /* Set the rate on the parent clock, not just ours */
35 #define	QCOM_CLK_RCG2_FLAGS_SET_RATE_PARENT		0x1
36 /* Must not stop this clock/gate! */
37 #define	QCOM_CLK_RCG2_FLAGS_CRITICAL			0x2
38 
39 /* prediv to hw mapping */
40 #define	QCOM_CLK_FREQTBL_PREDIV_RCG2(prediv)		(2*(prediv)-1)
41 
42 struct qcom_clk_rcg2_def {
43 	struct clknode_init_def clkdef;
44 	uint32_t cmd_rcgr;		/* rcg2 register start */
45 	uint32_t hid_width;		/* pre-divisor width */
46 	uint32_t mnd_width;		/* mn:d divisor width */
47 	int32_t safe_src_idx;		/* safe parent when disabling a shared
48 					 * rcg2 */
49 	uint32_t cfg_offset;		/* cfg offset after cmd_rcgr */
50 	int32_t safe_pre_parent_idx;	/* safe parent before switching
51 					 * parent mux */
52 	uint32_t flags;
53 	const struct qcom_clk_freq_tbl *freq_tbl;
54 };
55 
56 extern	int qcom_clk_rcg2_register(struct clkdom *clkdom,
57 	    struct qcom_clk_rcg2_def *clkdef);
58 
59 #endif	/* __QCOM_CLK_RCG2_H__ */
60