1e34a491bSAdrian Chadd /*- 2*4d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause 3e34a491bSAdrian Chadd * 4e34a491bSAdrian Chadd * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org> 5e34a491bSAdrian Chadd * 6e34a491bSAdrian Chadd * Redistribution and use in source and binary forms, with or without 7e34a491bSAdrian Chadd * modification, are permitted provided that the following conditions 8e34a491bSAdrian Chadd * are met: 9e34a491bSAdrian Chadd * 1. Redistributions of source code must retain the above copyright 10e34a491bSAdrian Chadd * notice, this list of conditions and the following disclaimer. 11e34a491bSAdrian Chadd * 2. Redistributions in binary form must reproduce the above copyright 12e34a491bSAdrian Chadd * notice, this list of conditions and the following disclaimer in the 13e34a491bSAdrian Chadd * documentation and/or other materials provided with the distribution. 14e34a491bSAdrian Chadd * 15e34a491bSAdrian Chadd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16e34a491bSAdrian Chadd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17e34a491bSAdrian Chadd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18e34a491bSAdrian Chadd * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19e34a491bSAdrian Chadd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20e34a491bSAdrian Chadd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21e34a491bSAdrian Chadd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22e34a491bSAdrian Chadd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23e34a491bSAdrian Chadd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24e34a491bSAdrian Chadd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25e34a491bSAdrian Chadd * SUCH DAMAGE. 26e34a491bSAdrian Chadd */ 27e34a491bSAdrian Chadd 28e34a491bSAdrian Chadd #ifndef __QCOM_CLK_BRANCH2_H__ 29e34a491bSAdrian Chadd #define __QCOM_CLK_BRANCH2_H__ 30e34a491bSAdrian Chadd 31e34a491bSAdrian Chadd #include "qcom_clk_freqtbl.h" 32e34a491bSAdrian Chadd 33e34a491bSAdrian Chadd /* halt is 1 */ 34e34a491bSAdrian Chadd #define QCOM_CLK_BRANCH2_BRANCH_HALT 0 35e34a491bSAdrian Chadd 36e34a491bSAdrian Chadd /* halt is inverted (ie, 0) */ 37e34a491bSAdrian Chadd #define QCOM_CLK_BRANCH2_BRANCH_HALT_INVERTED 1 38e34a491bSAdrian Chadd 39e34a491bSAdrian Chadd /* Don't check the bit, just delay */ 40e34a491bSAdrian Chadd #define QCOM_CLK_BRANCH2_BRANCH_HALT_DELAY 2 41e34a491bSAdrian Chadd 42e34a491bSAdrian Chadd /* Don't check the halt bit at all */ 43e34a491bSAdrian Chadd #define QCOM_CLK_BRANCH2_BRANCH_HALT_SKIP 3 44e34a491bSAdrian Chadd 45e34a491bSAdrian Chadd /* Flags */ 46e34a491bSAdrian Chadd #define QCOM_CLK_BRANCH2_FLAGS_CRITICAL 0x1 47e34a491bSAdrian Chadd #define QCOM_CLK_BRANCH2_FLAGS_SET_RATE_PARENT 0x2 48e34a491bSAdrian Chadd 49e34a491bSAdrian Chadd struct qcom_clk_branch2_def { 50e34a491bSAdrian Chadd struct clknode_init_def clkdef; 51e34a491bSAdrian Chadd 52e34a491bSAdrian Chadd uint32_t flags; 53e34a491bSAdrian Chadd 54e34a491bSAdrian Chadd uint32_t enable_offset; /* enable register*/ 55e34a491bSAdrian Chadd uint32_t enable_shift; /* enable bit shift */ 56e34a491bSAdrian Chadd 57e34a491bSAdrian Chadd uint32_t hwcg_reg; /* hw clock gate register */ 58e34a491bSAdrian Chadd uint32_t hwcg_bit; 59e34a491bSAdrian Chadd uint32_t halt_reg; /* halt register */ 60e34a491bSAdrian Chadd 61e34a491bSAdrian Chadd uint32_t halt_check_type; 62e34a491bSAdrian Chadd bool halt_check_voted; /* whether to delay when waiting */ 63e34a491bSAdrian Chadd }; 64e34a491bSAdrian Chadd 65e34a491bSAdrian Chadd extern int qcom_clk_branch2_register(struct clkdom *clkdom, 66e34a491bSAdrian Chadd struct qcom_clk_branch2_def *clkdef); 67e34a491bSAdrian Chadd 68e34a491bSAdrian Chadd #endif /* __QCOM_CLK_BRANCH2_H__ */ 69