1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright(c) 2007-2022 Intel Corporation */ 3 /* $FreeBSD$ */ 4 #include "qat_freebsd.h" 5 #include "adf_cfg.h" 6 #include "adf_common_drv.h" 7 #include "adf_accel_devices.h" 8 #include "adf_dh895xcc_hw_data.h" 9 #include "adf_fw_counters.h" 10 #include "adf_cfg_device.h" 11 #include <sys/types.h> 12 #include <sys/kernel.h> 13 #include <sys/malloc.h> 14 #include <machine/bus_dma.h> 15 #include <dev/pci/pcireg.h> 16 #include "adf_heartbeat_dbg.h" 17 #include "adf_cnvnr_freq_counters.h" 18 19 static MALLOC_DEFINE(M_QAT_DH895XCC, "qat_dh895xcc", "qat_dh895xcc"); 20 21 #define ADF_SYSTEM_DEVICE(device_id) \ 22 { \ 23 PCI_VENDOR_ID_INTEL, device_id \ 24 } 25 26 static const struct pci_device_id adf_pci_tbl[] = 27 { ADF_SYSTEM_DEVICE(ADF_DH895XCC_PCI_DEVICE_ID), 28 { 29 0, 30 } }; 31 32 static int 33 adf_probe(device_t dev) 34 { 35 const struct pci_device_id *id; 36 37 for (id = adf_pci_tbl; id->vendor != 0; id++) { 38 if (pci_get_vendor(dev) == id->vendor && 39 pci_get_device(dev) == id->device) { 40 device_set_desc(dev, 41 "Intel " ADF_DH895XCC_DEVICE_NAME 42 " QuickAssist"); 43 return BUS_PROBE_DEFAULT; 44 } 45 } 46 return ENXIO; 47 } 48 49 static void 50 adf_cleanup_accel(struct adf_accel_dev *accel_dev) 51 { 52 struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev; 53 int i; 54 55 if (accel_dev->dma_tag) 56 bus_dma_tag_destroy(accel_dev->dma_tag); 57 for (i = 0; i < ADF_PCI_MAX_BARS; i++) { 58 struct adf_bar *bar = &accel_pci_dev->pci_bars[i]; 59 60 if (bar->virt_addr) 61 bus_free_resource(accel_pci_dev->pci_dev, 62 SYS_RES_MEMORY, 63 bar->virt_addr); 64 } 65 66 if (accel_dev->hw_device) { 67 switch (pci_get_device(accel_pci_dev->pci_dev)) { 68 case ADF_DH895XCC_PCI_DEVICE_ID: 69 adf_clean_hw_data_dh895xcc(accel_dev->hw_device); 70 break; 71 default: 72 break; 73 } 74 free(accel_dev->hw_device, M_QAT_DH895XCC); 75 accel_dev->hw_device = NULL; 76 } 77 adf_cfg_dev_remove(accel_dev); 78 adf_devmgr_rm_dev(accel_dev, NULL); 79 } 80 81 static int 82 adf_attach(device_t dev) 83 { 84 struct adf_accel_dev *accel_dev; 85 struct adf_accel_pci *accel_pci_dev; 86 struct adf_hw_device_data *hw_data; 87 unsigned int i, bar_nr; 88 int ret, rid; 89 struct adf_cfg_device *cfg_dev = NULL; 90 91 /* Set pci MaxPayLoad to 256. Implemented to avoid the issue of 92 * Pci-passthrough causing Maxpayload to be reset to 128 bytes 93 * when the device is reset. */ 94 if (pci_get_max_payload(dev) != 256) 95 pci_set_max_payload(dev, 256); 96 97 accel_dev = device_get_softc(dev); 98 99 INIT_LIST_HEAD(&accel_dev->crypto_list); 100 accel_pci_dev = &accel_dev->accel_pci_dev; 101 accel_pci_dev->pci_dev = dev; 102 103 if (bus_get_domain(dev, &accel_pci_dev->node) != 0) 104 accel_pci_dev->node = 0; 105 106 /* Add accel device to accel table. 107 * This should be called before adf_cleanup_accel is called */ 108 if (adf_devmgr_add_dev(accel_dev, NULL)) { 109 device_printf(dev, "Failed to add new accelerator device.\n"); 110 return ENXIO; 111 } 112 113 /* Allocate and configure device configuration structure */ 114 hw_data = malloc(sizeof(*hw_data), M_QAT_DH895XCC, M_WAITOK | M_ZERO); 115 116 accel_dev->hw_device = hw_data; 117 adf_init_hw_data_dh895xcc(accel_dev->hw_device); 118 accel_pci_dev->revid = pci_get_revid(dev); 119 hw_data->fuses = pci_read_config(dev, ADF_DEVICE_FUSECTL_OFFSET, 4); 120 121 /* Get PPAERUCM values and store */ 122 ret = adf_aer_store_ppaerucm_reg(dev, hw_data); 123 if (ret) 124 goto out_err; 125 126 /* Get Accelerators and Accelerators Engines masks */ 127 hw_data->accel_mask = hw_data->get_accel_mask(accel_dev); 128 hw_data->ae_mask = hw_data->get_ae_mask(accel_dev); 129 accel_pci_dev->sku = hw_data->get_sku(hw_data); 130 /* If the device has no acceleration engines then ignore it. */ 131 if (!hw_data->accel_mask || !hw_data->ae_mask || 132 ((~hw_data->ae_mask) & 0x01)) { 133 device_printf(dev, "No acceleration units found\n"); 134 ret = ENXIO; 135 goto out_err; 136 } 137 138 /* Create device configuration table */ 139 ret = adf_cfg_dev_add(accel_dev); 140 if (ret) 141 goto out_err; 142 143 pci_set_max_read_req(dev, 1024); 144 145 ret = bus_dma_tag_create(bus_get_dma_tag(dev), 146 1, 147 0, 148 BUS_SPACE_MAXADDR, 149 BUS_SPACE_MAXADDR, 150 NULL, 151 NULL, 152 BUS_SPACE_MAXSIZE, 153 /* BUS_SPACE_UNRESTRICTED */ 1, 154 BUS_SPACE_MAXSIZE, 155 0, 156 NULL, 157 NULL, 158 &accel_dev->dma_tag); 159 if (ret) 160 goto out_err; 161 162 if (hw_data->get_accel_cap) { 163 hw_data->accel_capabilities_mask = 164 hw_data->get_accel_cap(accel_dev); 165 } 166 167 /* Find and map all the device's BARS */ 168 i = 0; 169 for (bar_nr = 0; i < ADF_PCI_MAX_BARS && bar_nr < PCIR_MAX_BAR_0; 170 bar_nr++) { 171 struct adf_bar *bar; 172 173 /* 174 * This will ignore a BAR 175 * that wasn't assigned a valid resource range by the 176 * firmware. 177 */ 178 rid = PCIR_BAR(bar_nr); 179 if (bus_get_resource(dev, SYS_RES_MEMORY, rid, NULL, NULL) != 0) 180 continue; 181 bar = &accel_pci_dev->pci_bars[i++]; 182 bar->virt_addr = bus_alloc_resource_any(dev, 183 SYS_RES_MEMORY, 184 &rid, 185 RF_ACTIVE); 186 if (bar->virt_addr == NULL) { 187 device_printf(dev, "Failed to map BAR %d\n", bar_nr); 188 ret = ENXIO; 189 goto out_err; 190 } 191 bar->base_addr = rman_get_start(bar->virt_addr); 192 bar->size = rman_get_size(bar->virt_addr); 193 } 194 pci_enable_busmaster(dev); 195 196 if (!accel_dev->hw_device->config_device) { 197 ret = EFAULT; 198 goto out_err; 199 } 200 201 ret = accel_dev->hw_device->config_device(accel_dev); 202 if (ret) 203 goto out_err; 204 205 ret = adf_dev_init(accel_dev); 206 if (ret) 207 goto out_dev_shutdown; 208 209 ret = adf_dev_start(accel_dev); 210 if (ret) 211 goto out_dev_stop; 212 213 cfg_dev = accel_dev->cfg->dev; 214 adf_cfg_device_clear(cfg_dev, accel_dev); 215 free(cfg_dev, M_QAT); 216 accel_dev->cfg->dev = NULL; 217 return ret; 218 out_dev_stop: 219 adf_dev_stop(accel_dev); 220 out_dev_shutdown: 221 adf_dev_shutdown(accel_dev); 222 out_err: 223 adf_cleanup_accel(accel_dev); 224 return ret; 225 } 226 227 static int 228 adf_detach(device_t dev) 229 { 230 struct adf_accel_dev *accel_dev = device_get_softc(dev); 231 232 if (adf_dev_stop(accel_dev)) { 233 device_printf(dev, "Failed to stop QAT accel dev\n"); 234 return EBUSY; 235 } 236 237 adf_dev_shutdown(accel_dev); 238 239 adf_cleanup_accel(accel_dev); 240 return 0; 241 } 242 243 static device_method_t adf_methods[] = { DEVMETHOD(device_probe, adf_probe), 244 DEVMETHOD(device_attach, adf_attach), 245 DEVMETHOD(device_detach, adf_detach), 246 247 DEVMETHOD_END }; 248 249 static driver_t adf_driver = { "qat", 250 adf_methods, 251 sizeof(struct adf_accel_dev) }; 252 253 DRIVER_MODULE_ORDERED(qat_dh895xcc, 254 pci, 255 adf_driver, 256 NULL, 257 NULL, 258 SI_ORDER_THIRD); 259 MODULE_VERSION(qat_dh895xcc, 1); 260 MODULE_DEPEND(qat_dh895xcc, qat_common, 1, 1, 1); 261 MODULE_DEPEND(qat_dh895xcc, qat_api, 1, 1, 1); 262 MODULE_DEPEND(qat_dh895xcc, linuxkpi, 1, 1, 1); 263