1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright(c) 2007-2025 Intel Corporation */ 3 #include "qat_freebsd.h" 4 #include "adf_cfg.h" 5 #include "adf_common_drv.h" 6 #include "adf_accel_devices.h" 7 #include "adf_c4xxx_hw_data.h" 8 #include "adf_fw_counters.h" 9 #include "adf_cfg_device.h" 10 #include "adf_dbgfs.h" 11 #include <sys/types.h> 12 #include <sys/kernel.h> 13 #include <sys/malloc.h> 14 #include <machine/bus_dma.h> 15 #include <dev/pci/pcireg.h> 16 17 static MALLOC_DEFINE(M_QAT_C4XXX, "qat_c4xx", "qat_c4xx"); 18 19 #define ADF_SYSTEM_DEVICE(device_id) \ 20 { \ 21 PCI_VENDOR_ID_INTEL, device_id \ 22 } 23 24 static const struct pci_device_id adf_pci_tbl[] = 25 { ADF_SYSTEM_DEVICE(ADF_C4XXX_PCI_DEVICE_ID), 26 { 27 0, 28 } }; 29 30 static int 31 adf_probe(device_t dev) 32 { 33 const struct pci_device_id *id; 34 35 for (id = adf_pci_tbl; id->vendor != 0; id++) { 36 if (pci_get_vendor(dev) == id->vendor && 37 pci_get_device(dev) == id->device) { 38 device_set_desc(dev, 39 "Intel " ADF_C4XXX_DEVICE_NAME 40 " QuickAssist"); 41 return BUS_PROBE_GENERIC; 42 } 43 } 44 return ENXIO; 45 } 46 47 static void 48 adf_cleanup_accel(struct adf_accel_dev *accel_dev) 49 { 50 struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev; 51 int i; 52 53 if (accel_dev->dma_tag) 54 bus_dma_tag_destroy(accel_dev->dma_tag); 55 for (i = 0; i < ADF_PCI_MAX_BARS; i++) { 56 struct adf_bar *bar = &accel_pci_dev->pci_bars[i]; 57 58 if (bar->virt_addr) 59 bus_free_resource(accel_pci_dev->pci_dev, 60 SYS_RES_MEMORY, 61 bar->virt_addr); 62 } 63 64 if (accel_dev->hw_device) { 65 switch (pci_get_device(accel_pci_dev->pci_dev)) { 66 case ADF_C4XXX_PCI_DEVICE_ID: 67 adf_clean_hw_data_c4xxx(accel_dev->hw_device); 68 break; 69 default: 70 break; 71 } 72 free(accel_dev->hw_device, M_QAT_C4XXX); 73 accel_dev->hw_device = NULL; 74 } 75 adf_dbgfs_exit(accel_dev); 76 adf_cfg_dev_remove(accel_dev); 77 adf_devmgr_rm_dev(accel_dev, NULL); 78 } 79 80 static int 81 adf_attach(device_t dev) 82 { 83 struct adf_accel_dev *accel_dev; 84 struct adf_accel_pci *accel_pci_dev; 85 struct adf_hw_device_data *hw_data; 86 unsigned int i, bar_nr; 87 int ret = 0, rid; 88 struct adf_cfg_device *cfg_dev = NULL; 89 90 /* Set pci MaxPayLoad to 256. Implemented to avoid the issue of 91 * Pci-passthrough causing Maxpayload to be reset to 128 bytes 92 * when the device is reset. 93 */ 94 if (pci_get_max_payload(dev) != 256) 95 pci_set_max_payload(dev, 256); 96 97 accel_dev = device_get_softc(dev); 98 99 mutex_init(&accel_dev->lock); 100 INIT_LIST_HEAD(&accel_dev->crypto_list); 101 accel_pci_dev = &accel_dev->accel_pci_dev; 102 accel_pci_dev->pci_dev = dev; 103 104 if (bus_get_domain(dev, &accel_pci_dev->node) != 0) 105 accel_pci_dev->node = 0; 106 107 /* XXX: Revisit if we actually need a devmgr table at all. */ 108 109 /* Add accel device to accel table. 110 * This should be called before adf_cleanup_accel is called 111 */ 112 ret = adf_devmgr_add_dev(accel_dev, NULL); 113 if (ret) { 114 device_printf(dev, "Failed to add new accelerator device.\n"); 115 goto out_err_lock; 116 } 117 118 /* Allocate and configure device configuration structure */ 119 hw_data = malloc(sizeof(*hw_data), M_QAT_C4XXX, M_WAITOK | M_ZERO); 120 121 accel_dev->hw_device = hw_data; 122 adf_init_hw_data_c4xxx(accel_dev->hw_device); 123 accel_pci_dev->revid = pci_get_revid(dev); 124 hw_data->fuses = pci_read_config(dev, ADF_DEVICE_FUSECTL_OFFSET, 4); 125 126 /* Get PPAERUCM values and store */ 127 ret = adf_aer_store_ppaerucm_reg(dev, hw_data); 128 if (ret) 129 goto out_err; 130 131 /* Get Accelerators and Accelerators Engines masks */ 132 hw_data->accel_mask = hw_data->get_accel_mask(accel_dev); 133 hw_data->ae_mask = hw_data->get_ae_mask(accel_dev); 134 hw_data->admin_ae_mask = hw_data->ae_mask; 135 136 /* If the device has no acceleration engines then ignore it. */ 137 if (!hw_data->accel_mask || !hw_data->ae_mask || 138 (~hw_data->ae_mask & 0x01)) { 139 device_printf(dev, "No acceleration units found\n"); 140 ret = ENXIO; 141 goto out_err; 142 } 143 144 /* Create device configuration table */ 145 ret = adf_cfg_dev_add(accel_dev); 146 if (ret) 147 goto out_err; 148 149 ret = adf_clock_debugfs_add(accel_dev); 150 if (ret) 151 goto out_err; 152 153 pci_set_max_read_req(dev, 1024); 154 155 ret = bus_dma_tag_create(bus_get_dma_tag(dev), 156 1, 157 0, 158 BUS_SPACE_MAXADDR, 159 BUS_SPACE_MAXADDR, 160 NULL, 161 NULL, 162 BUS_SPACE_MAXSIZE, 163 /*BUS_SPACE_UNRESTRICTED*/ 1, 164 BUS_SPACE_MAXSIZE, 165 0, 166 NULL, 167 NULL, 168 &accel_dev->dma_tag); 169 if (ret) 170 goto out_err; 171 172 if (hw_data->get_accel_cap) { 173 hw_data->accel_capabilities_mask = 174 hw_data->get_accel_cap(accel_dev); 175 } 176 177 accel_pci_dev->sku = hw_data->get_sku(hw_data); 178 179 /* Find and map all the device's BARS */ 180 i = 0; 181 for (bar_nr = 0; i < ADF_PCI_MAX_BARS && bar_nr < PCIR_MAX_BAR_0; 182 bar_nr++) { 183 struct adf_bar *bar; 184 185 /* 186 * XXX: This isn't quite right as it will ignore a BAR 187 * that wasn't assigned a valid resource range by the 188 * firmware. 189 */ 190 rid = PCIR_BAR(bar_nr); 191 if (bus_get_resource(dev, SYS_RES_MEMORY, rid, NULL, NULL) != 0) 192 continue; 193 bar = &accel_pci_dev->pci_bars[i++]; 194 bar->virt_addr = bus_alloc_resource_any(dev, 195 SYS_RES_MEMORY, 196 &rid, 197 RF_ACTIVE); 198 if (!bar->virt_addr) { 199 device_printf(dev, "Failed to map BAR %d\n", bar_nr); 200 ret = ENXIO; 201 goto out_err; 202 } 203 bar->base_addr = rman_get_start(bar->virt_addr); 204 bar->size = rman_get_start(bar->virt_addr); 205 } 206 ret = pci_enable_busmaster(dev); 207 if (ret) 208 goto out_err; 209 210 adf_dbgfs_init(accel_dev); 211 212 if (!accel_dev->hw_device->config_device) { 213 ret = EFAULT; 214 goto out_err_disable; 215 } 216 217 ret = accel_dev->hw_device->config_device(accel_dev); 218 if (ret) 219 goto out_err_disable; 220 221 ret = adf_dev_init(accel_dev); 222 if (ret) 223 goto out_dev_shutdown; 224 225 ret = adf_dev_start(accel_dev); 226 if (ret) 227 goto out_dev_stop; 228 229 cfg_dev = accel_dev->cfg->dev; 230 adf_cfg_device_clear(cfg_dev, accel_dev); 231 free(cfg_dev, M_QAT); 232 accel_dev->cfg->dev = NULL; 233 return ret; 234 out_dev_stop: 235 adf_dev_stop(accel_dev); 236 out_dev_shutdown: 237 adf_dev_shutdown(accel_dev); 238 out_err_disable: 239 pci_disable_busmaster(dev); 240 out_err: 241 adf_cleanup_accel(accel_dev); 242 out_err_lock: 243 mutex_destroy(&accel_dev->lock); 244 245 return ret; 246 } 247 248 static int 249 adf_detach(device_t dev) 250 { 251 struct adf_accel_dev *accel_dev = device_get_softc(dev); 252 253 if (adf_dev_stop(accel_dev)) { 254 device_printf(dev, "Failed to stop QAT accel dev\n"); 255 return EBUSY; 256 } 257 258 adf_dev_shutdown(accel_dev); 259 260 pci_disable_busmaster(dev); 261 adf_cleanup_accel(accel_dev); 262 mutex_destroy(&accel_dev->lock); 263 264 return 0; 265 } 266 267 static device_method_t adf_methods[] = { DEVMETHOD(device_probe, adf_probe), 268 DEVMETHOD(device_attach, adf_attach), 269 DEVMETHOD(device_detach, adf_detach), 270 271 DEVMETHOD_END }; 272 273 static driver_t adf_driver = { "qat", 274 adf_methods, 275 sizeof(struct adf_accel_dev) }; 276 277 DRIVER_MODULE_ORDERED(qat_c4xxx, pci, adf_driver, NULL, NULL, SI_ORDER_THIRD); 278 MODULE_VERSION(qat_c4xxx, 1); 279 MODULE_DEPEND(qat_c4xxx, qat_common, 1, 1, 1); 280 MODULE_DEPEND(qat_c4xxx, qat_api, 1, 1, 1); 281 MODULE_DEPEND(qat_c4xxx, linuxkpi, 1, 1, 1); 282