1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright(c) 2007-2022 Intel Corporation */ 3 #include "qat_freebsd.h" 4 #include "adf_cfg.h" 5 #include "adf_common_drv.h" 6 #include "adf_accel_devices.h" 7 #include "adf_200xx_hw_data.h" 8 #include "adf_fw_counters.h" 9 #include "adf_cfg_device.h" 10 #include <sys/types.h> 11 #include <sys/kernel.h> 12 #include <sys/malloc.h> 13 #include <machine/bus_dma.h> 14 #include <dev/pci/pcireg.h> 15 #include "adf_heartbeat_dbg.h" 16 #include "adf_cnvnr_freq_counters.h" 17 18 static MALLOC_DEFINE(M_QAT_200XX, "qat_200xx", "qat_200xx"); 19 20 #define ADF_SYSTEM_DEVICE(device_id) \ 21 { \ 22 PCI_VENDOR_ID_INTEL, device_id \ 23 } 24 25 static const struct pci_device_id adf_pci_tbl[] = 26 { ADF_SYSTEM_DEVICE(ADF_200XX_PCI_DEVICE_ID), 27 { 28 0, 29 } }; 30 31 static int 32 adf_probe(device_t dev) 33 { 34 const struct pci_device_id *id; 35 36 for (id = adf_pci_tbl; id->vendor != 0; id++) { 37 if (pci_get_vendor(dev) == id->vendor && 38 pci_get_device(dev) == id->device) { 39 device_set_desc(dev, 40 "Intel " ADF_200XX_DEVICE_NAME 41 " QuickAssist"); 42 return BUS_PROBE_GENERIC; 43 } 44 } 45 return ENXIO; 46 } 47 48 static void 49 adf_cleanup_accel(struct adf_accel_dev *accel_dev) 50 { 51 struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev; 52 int i; 53 54 if (accel_dev->dma_tag) 55 bus_dma_tag_destroy(accel_dev->dma_tag); 56 for (i = 0; i < ADF_PCI_MAX_BARS; i++) { 57 struct adf_bar *bar = &accel_pci_dev->pci_bars[i]; 58 59 if (bar->virt_addr) 60 bus_free_resource(accel_pci_dev->pci_dev, 61 SYS_RES_MEMORY, 62 bar->virt_addr); 63 } 64 65 if (accel_dev->hw_device) { 66 switch (pci_get_device(accel_pci_dev->pci_dev)) { 67 case ADF_200XX_PCI_DEVICE_ID: 68 adf_clean_hw_data_200xx(accel_dev->hw_device); 69 break; 70 default: 71 break; 72 } 73 free(accel_dev->hw_device, M_QAT_200XX); 74 accel_dev->hw_device = NULL; 75 } 76 adf_cfg_dev_remove(accel_dev); 77 adf_devmgr_rm_dev(accel_dev, NULL); 78 } 79 80 static int 81 adf_attach(device_t dev) 82 { 83 struct adf_accel_dev *accel_dev; 84 struct adf_accel_pci *accel_pci_dev; 85 struct adf_hw_device_data *hw_data; 86 unsigned int i = 0, bar_nr = 0, reg_val = 0; 87 int ret, rid; 88 struct adf_cfg_device *cfg_dev = NULL; 89 90 /* Set pci MaxPayLoad to 256. Implemented to avoid the issue of 91 * Pci-passthrough causing Maxpayload to be reset to 128 bytes 92 * when the device is reset. 93 */ 94 if (pci_get_max_payload(dev) != 256) 95 pci_set_max_payload(dev, 256); 96 97 accel_dev = device_get_softc(dev); 98 99 INIT_LIST_HEAD(&accel_dev->crypto_list); 100 accel_pci_dev = &accel_dev->accel_pci_dev; 101 accel_pci_dev->pci_dev = dev; 102 103 if (bus_get_domain(dev, &accel_pci_dev->node) != 0) 104 accel_pci_dev->node = 0; 105 106 /* XXX: Revisit if we actually need a devmgr table at all. */ 107 108 /* Add accel device to accel table. 109 * This should be called before adf_cleanup_accel is called 110 */ 111 if (adf_devmgr_add_dev(accel_dev, NULL)) { 112 device_printf(dev, "Failed to add new accelerator device.\n"); 113 return ENXIO; 114 } 115 116 /* Allocate and configure device configuration structure */ 117 hw_data = malloc(sizeof(*hw_data), M_QAT_200XX, M_WAITOK | M_ZERO); 118 119 accel_dev->hw_device = hw_data; 120 adf_init_hw_data_200xx(accel_dev->hw_device); 121 accel_pci_dev->revid = pci_get_revid(dev); 122 hw_data->fuses = pci_read_config(dev, ADF_DEVICE_FUSECTL_OFFSET, 4); 123 if (accel_pci_dev->revid == 0x00) { 124 device_printf(dev, "A0 stepping is not supported.\n"); 125 ret = ENODEV; 126 goto out_err; 127 } 128 129 /* Get PPAERUCM values and store */ 130 ret = adf_aer_store_ppaerucm_reg(dev, hw_data); 131 if (ret) 132 goto out_err; 133 134 /* Clear PFIEERRUNCSTSR register bits if they are set */ 135 reg_val = pci_read_config(dev, ADF_200XX_PFIEERRUNCSTSR, 4); 136 if (reg_val) { 137 device_printf( 138 dev, 139 "Clearing PFIEERRUNCSTSR, previous status : %0x\n", 140 reg_val); 141 pci_write_config(dev, ADF_200XX_PFIEERRUNCSTSR, reg_val, 4); 142 } 143 144 /* Get Accelerators and Accelerators Engines masks */ 145 hw_data->accel_mask = hw_data->get_accel_mask(accel_dev); 146 hw_data->ae_mask = hw_data->get_ae_mask(accel_dev); 147 hw_data->admin_ae_mask = hw_data->ae_mask; 148 149 accel_pci_dev->sku = hw_data->get_sku(hw_data); 150 /* If the device has no acceleration engines then ignore it. */ 151 if (!hw_data->accel_mask || !hw_data->ae_mask || 152 (~hw_data->ae_mask & 0x01)) { 153 device_printf(dev, "No acceleration units found\n"); 154 ret = ENXIO; 155 goto out_err; 156 } 157 158 /* Create device configuration table */ 159 ret = adf_cfg_dev_add(accel_dev); 160 if (ret) 161 goto out_err; 162 ret = adf_clock_debugfs_add(accel_dev); 163 if (ret) 164 goto out_err; 165 166 pci_set_max_read_req(dev, 1024); 167 168 ret = bus_dma_tag_create(bus_get_dma_tag(dev), 169 1, 170 0, 171 BUS_SPACE_MAXADDR, 172 BUS_SPACE_MAXADDR, 173 NULL, 174 NULL, 175 BUS_SPACE_MAXSIZE, 176 /* BUS_SPACE_UNRESTRICTED */ 1, 177 BUS_SPACE_MAXSIZE, 178 0, 179 NULL, 180 NULL, 181 &accel_dev->dma_tag); 182 if (ret) 183 goto out_err; 184 185 if (hw_data->get_accel_cap) { 186 hw_data->accel_capabilities_mask = 187 hw_data->get_accel_cap(accel_dev); 188 } 189 190 /* Find and map all the device's BARS */ 191 for (bar_nr = 0; i < ADF_PCI_MAX_BARS && bar_nr < PCIR_MAX_BAR_0; 192 bar_nr++) { 193 struct adf_bar *bar; 194 195 /* 196 * XXX: This isn't quite right as it will ignore a BAR 197 * that wasn't assigned a valid resource range by the 198 * firmware. 199 */ 200 rid = PCIR_BAR(bar_nr); 201 if (bus_get_resource(dev, SYS_RES_MEMORY, rid, NULL, NULL) != 0) 202 continue; 203 bar = &accel_pci_dev->pci_bars[i++]; 204 bar->virt_addr = bus_alloc_resource_any(dev, 205 SYS_RES_MEMORY, 206 &rid, 207 RF_ACTIVE); 208 if (!bar->virt_addr) { 209 device_printf(dev, "Failed to map BAR %d\n", bar_nr); 210 ret = ENXIO; 211 goto out_err; 212 } 213 bar->base_addr = rman_get_start(bar->virt_addr); 214 bar->size = rman_get_size(bar->virt_addr); 215 } 216 pci_enable_busmaster(dev); 217 218 if (!accel_dev->hw_device->config_device) { 219 ret = EFAULT; 220 goto out_err; 221 } 222 223 ret = accel_dev->hw_device->config_device(accel_dev); 224 if (ret) 225 goto out_err; 226 227 ret = adf_dev_init(accel_dev); 228 if (ret) 229 goto out_dev_shutdown; 230 231 ret = adf_dev_start(accel_dev); 232 if (ret) 233 goto out_dev_stop; 234 235 cfg_dev = accel_dev->cfg->dev; 236 adf_cfg_device_clear(cfg_dev, accel_dev); 237 free(cfg_dev, M_QAT); 238 accel_dev->cfg->dev = NULL; 239 return ret; 240 out_dev_stop: 241 adf_dev_stop(accel_dev); 242 out_dev_shutdown: 243 adf_dev_shutdown(accel_dev); 244 out_err: 245 adf_cleanup_accel(accel_dev); 246 return ret; 247 } 248 249 static int 250 adf_detach(device_t dev) 251 { 252 struct adf_accel_dev *accel_dev = device_get_softc(dev); 253 254 if (adf_dev_stop(accel_dev)) { 255 device_printf(dev, "Failed to stop QAT accel dev\n"); 256 return EBUSY; 257 } 258 259 adf_dev_shutdown(accel_dev); 260 261 adf_cleanup_accel(accel_dev); 262 263 return 0; 264 } 265 266 static device_method_t adf_methods[] = { DEVMETHOD(device_probe, adf_probe), 267 DEVMETHOD(device_attach, adf_attach), 268 DEVMETHOD(device_detach, adf_detach), 269 270 DEVMETHOD_END }; 271 272 static driver_t adf_driver = { "qat", 273 adf_methods, 274 sizeof(struct adf_accel_dev) }; 275 276 DRIVER_MODULE_ORDERED(qat_200xx, pci, adf_driver, NULL, NULL, SI_ORDER_THIRD); 277 MODULE_VERSION(qat_200xx, 1); 278 MODULE_DEPEND(qat_200xx, qat_common, 1, 1, 1); 279 MODULE_DEPEND(qat_200xx, qat_api, 1, 1, 1); 280 MODULE_DEPEND(qat_200xx, linuxkpi, 1, 1, 1); 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