1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright(c) 2007-2022 Intel Corporation */ 3 #include "qat_freebsd.h" 4 #include "adf_cfg.h" 5 #include "adf_common_drv.h" 6 #include "adf_accel_devices.h" 7 #include "icp_qat_uclo.h" 8 #include "icp_qat_fw.h" 9 #include "icp_qat_fw_init_admin.h" 10 #include "adf_cfg_strings.h" 11 #include "adf_transport_access_macros.h" 12 #include "adf_transport_internal.h" 13 #include <sys/types.h> 14 #include <sys/limits.h> 15 #include <sys/kernel.h> 16 #include <sys/systm.h> 17 #include <machine/bus_dma.h> 18 #include <dev/pci/pcireg.h> 19 20 MALLOC_DEFINE(M_QAT, "qat", "qat"); 21 22 struct bus_dma_mem_cb_data { 23 struct bus_dmamem *mem; 24 int error; 25 }; 26 27 static void 28 bus_dma_mem_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 29 { 30 struct bus_dma_mem_cb_data *d; 31 32 d = arg; 33 d->error = error; 34 if (error) 35 return; 36 d->mem->dma_baddr = segs[0].ds_addr; 37 } 38 39 int 40 bus_dma_mem_create(struct bus_dmamem *mem, 41 bus_dma_tag_t parent, 42 bus_size_t alignment, 43 bus_addr_t lowaddr, 44 bus_size_t len, 45 int flags) 46 { 47 struct bus_dma_mem_cb_data d; 48 int error; 49 50 bzero(mem, sizeof(*mem)); 51 error = bus_dma_tag_create(parent, 52 alignment, 53 0, 54 lowaddr, 55 BUS_SPACE_MAXADDR, 56 NULL, 57 NULL, 58 len, 59 1, 60 len, 61 0, 62 NULL, 63 NULL, 64 &mem->dma_tag); 65 if (error) { 66 bus_dma_mem_free(mem); 67 return (error); 68 } 69 error = bus_dmamem_alloc(mem->dma_tag, 70 &mem->dma_vaddr, 71 flags, 72 &mem->dma_map); 73 if (error) { 74 bus_dma_mem_free(mem); 75 return (error); 76 } 77 d.mem = mem; 78 error = bus_dmamap_load(mem->dma_tag, 79 mem->dma_map, 80 mem->dma_vaddr, 81 len, 82 bus_dma_mem_cb, 83 &d, 84 BUS_DMA_NOWAIT); 85 if (error == 0) 86 error = d.error; 87 if (error) { 88 bus_dma_mem_free(mem); 89 return (error); 90 } 91 return (0); 92 } 93 94 void 95 bus_dma_mem_free(struct bus_dmamem *mem) 96 { 97 98 if (mem->dma_baddr != 0) 99 bus_dmamap_unload(mem->dma_tag, mem->dma_map); 100 if (mem->dma_vaddr != NULL) 101 bus_dmamem_free(mem->dma_tag, mem->dma_vaddr, mem->dma_map); 102 if (mem->dma_tag != NULL) 103 bus_dma_tag_destroy(mem->dma_tag); 104 bzero(mem, sizeof(*mem)); 105 } 106 107 device_t 108 pci_find_pf(device_t vf) 109 { 110 return (NULL); 111 } 112 113 int 114 pci_set_max_payload(device_t dev, int payload_size) 115 { 116 const int packet_sizes[6] = { 128, 256, 512, 1024, 2048, 4096 }; 117 int cap_reg = 0, reg_value = 0, mask = 0; 118 119 for (mask = 0; mask < 6; mask++) { 120 if (payload_size == packet_sizes[mask]) 121 break; 122 } 123 if (mask == 6) 124 return -1; 125 126 if (pci_find_cap(dev, PCIY_EXPRESS, &cap_reg) != 0) 127 return -1; 128 129 cap_reg += PCIER_DEVICE_CTL; /* Offset for Device Control Register. */ 130 reg_value = pci_read_config(dev, cap_reg, 1); 131 reg_value = (reg_value & 0x1f) | (mask << 5); 132 pci_write_config(dev, cap_reg, reg_value, 1); 133 return 0; 134 } 135