1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/bus.h> 31 #include <sys/kernel.h> 32 #include <sys/module.h> 33 #include <sys/rman.h> 34 #include <sys/resource.h> 35 #include <machine/bus.h> 36 37 #include <dev/ofw/ofw_bus.h> 38 #include <dev/ofw/ofw_bus_subr.h> 39 40 #include <dev/clk/clk.h> 41 42 #include "pwmbus_if.h" 43 44 #define AW_PWM_CTRL 0x00 45 #define AW_PWM_CTRL_PRESCALE_MASK 0xF 46 #define AW_PWM_CTRL_EN (1 << 4) 47 #define AW_PWM_CTRL_ACTIVE_LEVEL_HIGH (1 << 5) 48 #define AW_PWM_CTRL_GATE (1 << 6) 49 #define AW_PWM_CTRL_MODE_MASK 0x80 50 #define AW_PWM_CTRL_PULSE_MODE (1 << 7) 51 #define AW_PWM_CTRL_CYCLE_MODE (0 << 7) 52 #define AW_PWM_CTRL_PULSE_START (1 << 8) 53 #define AW_PWM_CTRL_CLK_BYPASS (1 << 9) 54 #define AW_PWM_CTRL_PERIOD_BUSY (1 << 28) 55 56 #define AW_PWM_PERIOD 0x04 57 #define AW_PWM_PERIOD_TOTAL_MASK 0xFFFF 58 #define AW_PWM_PERIOD_TOTAL_SHIFT 16 59 #define AW_PWM_PERIOD_ACTIVE_MASK 0xFFFF 60 #define AW_PWM_PERIOD_ACTIVE_SHIFT 0 61 62 #define AW_PWM_MAX_FREQ 24000000 63 64 #define NS_PER_SEC 1000000000 65 66 static struct ofw_compat_data compat_data[] = { 67 { "allwinner,sun5i-a13-pwm", 1 }, 68 { "allwinner,sun8i-h3-pwm", 1 }, 69 { NULL, 0 } 70 }; 71 72 static struct resource_spec aw_pwm_spec[] = { 73 { SYS_RES_MEMORY, 0, RF_ACTIVE }, 74 { -1, 0 } 75 }; 76 77 struct aw_pwm_softc { 78 device_t dev; 79 device_t busdev; 80 clk_t clk; 81 struct resource *res; 82 83 uint64_t clk_freq; 84 unsigned int period; 85 unsigned int duty; 86 uint32_t flags; 87 bool enabled; 88 }; 89 90 static uint32_t aw_pwm_clk_prescaler[] = { 91 120, 92 180, 93 240, 94 360, 95 480, 96 0, 97 0, 98 0, 99 12000, 100 24000, 101 36000, 102 48000, 103 72000, 104 0, 105 0, 106 1, 107 }; 108 109 #define AW_PWM_READ(sc, reg) bus_read_4((sc)->res, (reg)) 110 #define AW_PWM_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) 111 112 static int aw_pwm_probe(device_t dev); 113 static int aw_pwm_attach(device_t dev); 114 static int aw_pwm_detach(device_t dev); 115 116 static int 117 aw_pwm_probe(device_t dev) 118 { 119 if (!ofw_bus_status_okay(dev)) 120 return (ENXIO); 121 122 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) 123 return (ENXIO); 124 125 device_set_desc(dev, "Allwinner PWM"); 126 return (BUS_PROBE_DEFAULT); 127 } 128 129 static int 130 aw_pwm_attach(device_t dev) 131 { 132 struct aw_pwm_softc *sc; 133 uint64_t clk_freq; 134 uint32_t reg; 135 phandle_t node; 136 int error; 137 138 sc = device_get_softc(dev); 139 sc->dev = dev; 140 141 error = clk_get_by_ofw_index(dev, 0, 0, &sc->clk); 142 if (error != 0) { 143 device_printf(dev, "cannot get clock\n"); 144 goto fail; 145 } 146 error = clk_enable(sc->clk); 147 if (error != 0) { 148 device_printf(dev, "cannot enable clock\n"); 149 goto fail; 150 } 151 152 error = clk_get_freq(sc->clk, &sc->clk_freq); 153 if (error != 0) { 154 device_printf(dev, "cannot get clock frequency\n"); 155 goto fail; 156 } 157 158 if (bus_alloc_resources(dev, aw_pwm_spec, &sc->res) != 0) { 159 device_printf(dev, "cannot allocate resources for device\n"); 160 error = ENXIO; 161 goto fail; 162 } 163 164 /* Read the configuration left by U-Boot */ 165 reg = AW_PWM_READ(sc, AW_PWM_CTRL); 166 if (reg & (AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN)) 167 sc->enabled = true; 168 169 reg = AW_PWM_READ(sc, AW_PWM_CTRL); 170 reg &= AW_PWM_CTRL_PRESCALE_MASK; 171 if (reg > nitems(aw_pwm_clk_prescaler)) { 172 device_printf(dev, "Bad prescaler %x, cannot guess current settings\n", reg); 173 goto skipcfg; 174 } 175 clk_freq = sc->clk_freq / aw_pwm_clk_prescaler[reg]; 176 177 reg = AW_PWM_READ(sc, AW_PWM_PERIOD); 178 sc->period = NS_PER_SEC / 179 (clk_freq / ((reg >> AW_PWM_PERIOD_TOTAL_SHIFT) & AW_PWM_PERIOD_TOTAL_MASK)); 180 sc->duty = NS_PER_SEC / 181 (clk_freq / ((reg >> AW_PWM_PERIOD_ACTIVE_SHIFT) & AW_PWM_PERIOD_ACTIVE_MASK)); 182 183 skipcfg: 184 /* 185 * Note that we don't check for failure to attach pwmbus -- even without 186 * it we can still service clients who connect via fdt xref data. 187 */ 188 node = ofw_bus_get_node(dev); 189 OF_device_register_xref(OF_xref_from_node(node), dev); 190 191 sc->busdev = device_add_child(dev, "pwmbus", DEVICE_UNIT_ANY); 192 193 bus_attach_children(dev); 194 return (0); 195 196 fail: 197 aw_pwm_detach(dev); 198 return (error); 199 } 200 201 static int 202 aw_pwm_detach(device_t dev) 203 { 204 struct aw_pwm_softc *sc; 205 int error; 206 207 sc = device_get_softc(dev); 208 209 if ((error = bus_generic_detach(sc->dev)) != 0) { 210 device_printf(sc->dev, "cannot detach child devices\n"); 211 return (error); 212 } 213 214 if (sc->busdev != NULL) 215 device_delete_child(dev, sc->busdev); 216 217 if (sc->res != NULL) 218 bus_release_resources(dev, aw_pwm_spec, &sc->res); 219 220 return (0); 221 } 222 223 static phandle_t 224 aw_pwm_get_node(device_t bus, device_t dev) 225 { 226 227 /* 228 * Share our controller node with our pwmbus child; it instantiates 229 * devices by walking the children contained within our node. 230 */ 231 return ofw_bus_get_node(bus); 232 } 233 234 static int 235 aw_pwm_channel_count(device_t dev, u_int *nchannel) 236 { 237 238 *nchannel = 1; 239 240 return (0); 241 } 242 243 static int 244 aw_pwm_channel_config(device_t dev, u_int channel, u_int period, u_int duty) 245 { 246 struct aw_pwm_softc *sc; 247 uint64_t period_freq, duty_freq; 248 uint64_t clk_rate, div; 249 uint32_t reg; 250 int prescaler; 251 int i; 252 253 sc = device_get_softc(dev); 254 255 period_freq = NS_PER_SEC / period; 256 if (period_freq > AW_PWM_MAX_FREQ) 257 return (EINVAL); 258 259 /* 260 * FIXME. The hardware is capable of sub-Hz frequencies, that is, 261 * periods longer than a second. But the current code cannot deal 262 * with those properly. 263 */ 264 if (period_freq == 0) 265 return (EINVAL); 266 267 /* 268 * FIXME. There is a great loss of precision when the period and the 269 * duty are near 1 second. In some cases period_freq and duty_freq can 270 * be equal even if the period and the duty are significantly different. 271 */ 272 duty_freq = NS_PER_SEC / duty; 273 if (duty_freq < period_freq) { 274 device_printf(sc->dev, "duty < period\n"); 275 return (EINVAL); 276 } 277 278 /* First test without prescaler */ 279 clk_rate = AW_PWM_MAX_FREQ; 280 prescaler = AW_PWM_CTRL_PRESCALE_MASK; 281 div = AW_PWM_MAX_FREQ / period_freq; 282 if ((div - 1) > AW_PWM_PERIOD_TOTAL_MASK) { 283 /* Test all prescaler */ 284 for (i = 0; i < nitems(aw_pwm_clk_prescaler); i++) { 285 if (aw_pwm_clk_prescaler[i] == 0) 286 continue; 287 div = AW_PWM_MAX_FREQ / aw_pwm_clk_prescaler[i] / period_freq; 288 if ((div - 1) < AW_PWM_PERIOD_TOTAL_MASK ) { 289 prescaler = i; 290 clk_rate = AW_PWM_MAX_FREQ / aw_pwm_clk_prescaler[i]; 291 break; 292 } 293 } 294 if (prescaler == AW_PWM_CTRL_PRESCALE_MASK) 295 return (EINVAL); 296 } 297 298 reg = AW_PWM_READ(sc, AW_PWM_CTRL); 299 300 /* Write the prescalar */ 301 reg &= ~AW_PWM_CTRL_PRESCALE_MASK; 302 reg |= prescaler; 303 304 reg &= ~AW_PWM_CTRL_MODE_MASK; 305 reg |= AW_PWM_CTRL_CYCLE_MODE; 306 307 reg &= ~AW_PWM_CTRL_PULSE_START; 308 reg &= ~AW_PWM_CTRL_CLK_BYPASS; 309 310 AW_PWM_WRITE(sc, AW_PWM_CTRL, reg); 311 312 /* Write the total/active cycles */ 313 reg = ((clk_rate / period_freq - 1) << AW_PWM_PERIOD_TOTAL_SHIFT) | 314 ((clk_rate / duty_freq) << AW_PWM_PERIOD_ACTIVE_SHIFT); 315 AW_PWM_WRITE(sc, AW_PWM_PERIOD, reg); 316 317 sc->period = period; 318 sc->duty = duty; 319 320 return (0); 321 } 322 323 static int 324 aw_pwm_channel_get_config(device_t dev, u_int channel, u_int *period, u_int *duty) 325 { 326 struct aw_pwm_softc *sc; 327 328 sc = device_get_softc(dev); 329 330 *period = sc->period; 331 *duty = sc->duty; 332 333 return (0); 334 } 335 336 static int 337 aw_pwm_channel_enable(device_t dev, u_int channel, bool enable) 338 { 339 struct aw_pwm_softc *sc; 340 uint32_t reg; 341 342 sc = device_get_softc(dev); 343 344 if (enable && sc->enabled) 345 return (0); 346 347 reg = AW_PWM_READ(sc, AW_PWM_CTRL); 348 if (enable) 349 reg |= AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN; 350 else 351 reg &= ~(AW_PWM_CTRL_GATE | AW_PWM_CTRL_EN); 352 353 AW_PWM_WRITE(sc, AW_PWM_CTRL, reg); 354 355 sc->enabled = enable; 356 357 return (0); 358 } 359 360 static int 361 aw_pwm_channel_is_enabled(device_t dev, u_int channel, bool *enabled) 362 { 363 struct aw_pwm_softc *sc; 364 365 sc = device_get_softc(dev); 366 367 *enabled = sc->enabled; 368 369 return (0); 370 } 371 372 static device_method_t aw_pwm_methods[] = { 373 /* Device interface */ 374 DEVMETHOD(device_probe, aw_pwm_probe), 375 DEVMETHOD(device_attach, aw_pwm_attach), 376 DEVMETHOD(device_detach, aw_pwm_detach), 377 378 /* ofw_bus interface */ 379 DEVMETHOD(ofw_bus_get_node, aw_pwm_get_node), 380 381 /* pwmbus interface */ 382 DEVMETHOD(pwmbus_channel_count, aw_pwm_channel_count), 383 DEVMETHOD(pwmbus_channel_config, aw_pwm_channel_config), 384 DEVMETHOD(pwmbus_channel_get_config, aw_pwm_channel_get_config), 385 DEVMETHOD(pwmbus_channel_enable, aw_pwm_channel_enable), 386 DEVMETHOD(pwmbus_channel_is_enabled, aw_pwm_channel_is_enabled), 387 388 DEVMETHOD_END 389 }; 390 391 static driver_t aw_pwm_driver = { 392 "pwm", 393 aw_pwm_methods, 394 sizeof(struct aw_pwm_softc), 395 }; 396 397 DRIVER_MODULE(aw_pwm, simplebus, aw_pwm_driver, 0, 0); 398 MODULE_VERSION(aw_pwm, 1); 399 SIMPLEBUS_PNP_INFO(compat_data); 400