1 /*- 2 * Copyright (c) 2001,2002,2003 S�ren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 /* misc defines */ 32 MALLOC_DECLARE(M_PSTIOP); 33 #define I2O_IOP_OUTBOUND_FRAME_COUNT 32 34 #define I2O_IOP_OUTBOUND_FRAME_SIZE 0x20 35 36 /* structure defs */ 37 struct out_mfa_buf { 38 u_int32_t buf[I2O_IOP_OUTBOUND_FRAME_SIZE]; 39 }; 40 41 struct iop_softc { 42 struct resource *r_mem; 43 struct resource *r_irq; 44 caddr_t ibase; 45 u_int32_t phys_ibase; 46 caddr_t obase; 47 u_int32_t phys_obase; 48 struct i2o_registers *reg; 49 struct i2o_status_get_reply *status; 50 int lct_count; 51 struct i2o_lct_entry *lct; 52 int ism; 53 device_t dev; 54 struct mtx mtx; 55 int outstanding; 56 void *handle; 57 struct intr_config_hook *iop_delayed_attach; 58 }; 59 60 /* structure at start of IOP shared mem */ 61 struct i2o_registers { 62 volatile u_int32_t apic_select; 63 volatile u_int32_t reserved0; 64 volatile u_int32_t apic_winreg; 65 volatile u_int32_t reserved1; 66 volatile u_int32_t iqueue_reg0; 67 volatile u_int32_t iqueue_reg1; 68 volatile u_int32_t oqueue_reg0; 69 volatile u_int32_t oqueue_reg1; 70 volatile u_int32_t iqueue_event; 71 volatile u_int32_t iqueue_intr_status; 72 volatile u_int32_t iqueue_intr_mask; 73 volatile u_int32_t oqueue_event; 74 volatile u_int32_t oqueue_intr_status; 75 volatile u_int32_t oqueue_intr_mask; 76 #define I2O_OUT_INTR_QUEUE 0x08 77 #define I2O_OUT_INTR_BELL 0x04 78 #define I2O_OUT_INTR_MSG1 0x02 79 #define I2O_OUT_INTR_MSG0 0x01 80 81 volatile u_int64_t reserved2; 82 volatile u_int32_t iqueue; 83 volatile u_int32_t oqueue; 84 volatile u_int64_t reserved3; 85 volatile u_int64_t mac_addr; 86 volatile u_int32_t ip_addr; 87 volatile u_int32_t ip_mask; 88 }; 89 90 /* Scatter/Gather List management */ 91 struct i2o_sgl { 92 u_int32_t count:24; 93 #define I2O_SGL_CNT_MASK 0xffffff 94 95 u_int32_t flags:8; 96 #define I2O_SGL_SIMPLE 0x10 97 #define I2O_SGL_PAGELIST 0x20 98 #define I2O_SGL_CHAIN 0x30 99 #define I2O_SGL_ATTRIBUTE 0x7c 100 #define I2O_SGL_BC0 0x01 101 #define I2O_SGL_BC1 0x02 102 #define I2O_SGL_DIR 0x04 103 #define I2O_SGL_LA 0x08 104 #define I2O_SGL_EOB 0x40 105 #define I2O_SGL_END 0x80 106 107 u_int32_t phys_addr[1]; 108 } __packed; 109 110 #define I2O_SGL_MAX_SEGS ((I2O_IOP_OUTBOUND_FRAME_SIZE - (8 + 2)) + 1) 111 112 /* i2o command codes */ 113 #define I2O_UTIL_NOP 0x00 114 #define I2O_UTIL_PARAMS_GET 0x06 115 #define I2O_UTIL_CLAIM 0x09 116 #define I2O_UTIL_CONFIG_DIALOG 0x10 117 #define I2O_UTIL_EVENT_REGISTER 0x13 118 #define I2O_BSA_BLOCK_READ 0x30 119 #define I2O_BSA_BLOCK_WRITE 0x31 120 #define I2O_BSA_CACHE_FLUSH 0x37 121 #define I2O_EXEC_STATUS_GET 0xa0 122 #define I2O_EXEC_OUTBOUND_INIT 0xa1 123 #define I2O_EXEC_LCT_NOTIFY 0xa2 124 #define I2O_EXEC_SYSTAB_SET 0xa3 125 #define I2O_EXEC_IOP_RESET 0xbd 126 #define I2O_EXEC_SYS_ENABLE 0xd1 127 #define I2O_PRIVATE_MESSAGE 0xff 128 129 /* basic message layout */ 130 struct i2o_basic_message { 131 u_int8_t version:4; 132 u_int8_t offset:4; 133 u_int8_t message_flags; 134 u_int16_t message_size; 135 u_int32_t target_address:12; 136 u_int32_t initiator_address:12; 137 u_int32_t function:8; 138 u_int32_t initiator_context; 139 u_int32_t transaction_context; 140 } __packed; 141 142 /* basic reply layout */ 143 struct i2o_single_reply { 144 u_int8_t version_offset; 145 u_int8_t message_flags; 146 #define I2O_MESSAGE_FLAGS_STATIC 0x01 147 #define I2O_MESSAGE_FLAGS_64BIT 0x02 148 #define I2O_MESSAGE_FLAGS_MULTIPLE 0x10 149 #define I2O_MESSAGE_FLAGS_FAIL 0x20 150 #define I2O_MESSAGE_FLAGS_LAST 0x40 151 #define I2O_MESSAGE_FLAGS_REPLY 0x80 152 153 u_int16_t message_size; 154 u_int32_t target_address:12; 155 u_int32_t initiator_address:12; 156 u_int32_t function:8; 157 u_int32_t initiator_context; 158 u_int32_t transaction_context; 159 u_int16_t detailed_status; 160 #define I2O_DETAIL_STATUS_SUCCESS 0x0000 161 #define I2O_DETAIL_STATUS_BAD_KEY 0x0002 162 #define I2O_DETAIL_STATUS_TCL_ERROR 0x0003 163 #define I2O_DETAIL_STATUS_REPLY_BUFFER_FULL 0x0004 164 #define I2O_DETAIL_STATUS_NO_SUCH_PAGE 0x0005 165 #define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_SOFT 0x0006 166 #define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_HARD 0x0007 167 #define I2O_DETAIL_STATUS_CHAIN_BUFFER_TOO_LARGE 0x0009 168 #define I2O_DETAIL_STATUS_UNSUPPORTED_FUNCTION 0x000a 169 #define I2O_DETAIL_STATUS_DEVICE_LOCKED 0x000b 170 #define I2O_DETAIL_STATUS_DEVICE_RESET 0x000c 171 #define I2O_DETAIL_STATUS_INAPPROPRIATE_FUNCTION 0x000d 172 #define I2O_DETAIL_STATUS_INVALID_INITIATOR_ADDRESS 0x000e 173 #define I2O_DETAIL_STATUS_INVALID_MESSAGE_FLAGS 0x000f 174 #define I2O_DETAIL_STATUS_INVALID_OFFSET 0x0010 175 #define I2O_DETAIL_STATUS_INVALID_PARAMETER 0x0011 176 #define I2O_DETAIL_STATUS_INVALID_REQUEST 0x0012 177 #define I2O_DETAIL_STATUS_INVALID_TARGET_ADDRESS 0x0013 178 #define I2O_DETAIL_STATUS_MESSAGE_TOO_LARGE 0x0014 179 #define I2O_DETAIL_STATUS_MESSAGE_TOO_SMALL 0x0015 180 #define I2O_DETAIL_STATUS_MISSING_PARAMETER 0x0016 181 #define I2O_DETAIL_STATUS_TIMEOUT 0x0017 182 #define I2O_DETAIL_STATUS_UNKNOWN_ERROR 0x0018 183 #define I2O_DETAIL_STATUS_UNKNOWN_FUNCTION 0x0019 184 #define I2O_DETAIL_STATUS_UNSUPPORTED_VERSION 0x001a 185 #define I2O_DETAIL_STATUS_DEVICE_BUSY 0x001b 186 #define I2O_DETAIL_STATUS_DEVICE_NOT_AVAILABLE 0x001c 187 188 u_int8_t retry_count; 189 u_int8_t status; 190 #define I2O_REPLY_STATUS_SUCCESS 0x00 191 #define I2O_REPLY_STATUS_ABORT_DIRTY 0x01 192 #define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER 0x02 193 #define I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER 0x03 194 #define I2O_REPLY_STATUS_ERROR_DIRTY 0x04 195 #define I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER 0x05 196 #define I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER 0x06 197 #define I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY 0x08 198 #define I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER 0x09 199 #define I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER 0x0a 200 #define I2O_REPLY_STATUS_TRANSACTION_ERROR 0x0b 201 #define I2O_REPLY_STATUS_PROGRESS_REPORT 0x80 202 203 u_int32_t donecount; 204 } __packed; 205 206 struct i2o_fault_reply { 207 u_int8_t version_offset; 208 u_int8_t message_flags; 209 u_int16_t message_size; 210 u_int32_t target_address:12; 211 u_int32_t initiator_address:12; 212 u_int32_t function:8; 213 u_int32_t initiator_context; 214 u_int32_t transaction_context; 215 u_int8_t lowest_version; 216 u_int8_t highest_version; 217 u_int8_t severity; 218 #define I2O_SEVERITY_FORMAT_ERROR 0x01 219 #define I2O_SEVERITY_PATH_ERROR 0x02 220 #define I2O_SEVERITY_PATH_STATE 0x04 221 #define I2O_SEVERITY_CONGESTION 0x08 222 223 u_int8_t failure_code; 224 #define I2O_FAILURE_CODE_TRANSPORT_SERVICE_SUSPENDED 0x81 225 #define I2O_FAILURE_CODE_TRANSPORT_SERVICE_TERMINATED 0x82 226 #define I2O_FAILURE_CODE_TRANSPORT_CONGESTION 0x83 227 #define I2O_FAILURE_CODE_TRANSPORT_FAIL 0x84 228 #define I2O_FAILURE_CODE_TRANSPORT_STATE_ERROR 0x85 229 #define I2O_FAILURE_CODE_TRANSPORT_TIME_OUT 0x86 230 #define I2O_FAILURE_CODE_TRANSPORT_ROUTING_FAILURE 0x87 231 #define I2O_FAILURE_CODE_TRANSPORT_INVALID_VERSION 0x88 232 #define I2O_FAILURE_CODE_TRANSPORT_INVALID_OFFSET 0x89 233 #define I2O_FAILURE_CODE_TRANSPORT_INVALID_MSG_FLAGS 0x8A 234 #define I2O_FAILURE_CODE_TRANSPORT_FRAME_TOO_SMALL 0x8B 235 #define I2O_FAILURE_CODE_TRANSPORT_FRAME_TOO_LARGE 0x8C 236 #define I2O_FAILURE_CODE_TRANSPORT_INVALID_TARGET_ID 0x8D 237 #define I2O_FAILURE_CODE_TRANSPORT_INVALID_INITIATOR_ID 0x8E 238 #define I2O_FAILURE_CODE_TRANSPORT_INVALID_INITIATOR_CONTEXT 0x8F 239 #define I2O_FAILURE_CODE_TRANSPORT_UNKNOWN_FAILURE 0xFF 240 241 u_int32_t failing_iop_id:12; 242 u_int32_t reserved:4; 243 u_int32_t failing_host_unit_id:16; 244 u_int32_t age_limit; 245 u_int64_t preserved_mfa; 246 } __packed; 247 248 struct i2o_exec_iop_reset_message { 249 u_int8_t version_offset; 250 u_int8_t message_flags; 251 u_int16_t message_size; 252 u_int32_t target_address:12; 253 u_int32_t initiator_address:12; 254 u_int32_t function:8; 255 u_int8_t reserved[16]; 256 u_int32_t status_word_low_addr; 257 u_int32_t status_word_high_addr; 258 } __packed; 259 260 struct i2o_exec_status_get_message { 261 u_int8_t version_offset; 262 u_int8_t message_flags; 263 u_int16_t message_size; 264 u_int32_t target_address:12; 265 u_int32_t initiator_address:12; 266 u_int32_t function:8; 267 u_int8_t reserved[16]; 268 u_int32_t reply_buf_low_addr; 269 u_int32_t reply_buf_high_addr; 270 u_int32_t reply_buf_length; 271 } __packed; 272 273 struct i2o_status_get_reply { 274 u_int16_t organization_id; 275 u_int16_t reserved; 276 u_int32_t iop_id:12; 277 u_int32_t reserved1:4; 278 u_int32_t host_unit_id:16; 279 u_int32_t segment_number:12; 280 u_int32_t i2o_version:4; 281 u_int32_t iop_state:8; 282 #define I2O_IOP_STATE_INITIALIZING 0x01 283 #define I2O_IOP_STATE_RESET 0x02 284 #define I2O_IOP_STATE_HOLD 0x04 285 #define I2O_IOP_STATE_READY 0x05 286 #define I2O_IOP_STATE_OPERATIONAL 0x08 287 #define I2O_IOP_STATE_FAILED 0x10 288 #define I2O_IOP_STATE_FAULTED 0x11 289 290 u_int32_t messenger_type:8; 291 u_int16_t inbound_mframe_size; 292 u_int8_t init_code; 293 u_int8_t reserved2; 294 u_int32_t max_inbound_mframes; 295 u_int32_t current_ibound_mframes; 296 u_int32_t max_outbound_mframes; 297 u_int8_t product_idstring[24]; 298 u_int32_t expected_lct_size; 299 u_int32_t iop_capabilities; 300 u_int32_t desired_private_memsize; 301 u_int32_t current_private_memsize; 302 u_int32_t current_private_membase; 303 u_int32_t desired_private_iosize; 304 u_int32_t current_private_iosize; 305 u_int32_t current_private_iobase; 306 u_int8_t reserved3[3]; 307 u_int8_t sync_byte; 308 } __packed; 309 310 struct i2o_exec_init_outqueue_message { 311 u_int8_t version_offset; 312 u_int8_t message_flags; 313 u_int16_t message_size; 314 u_int32_t target_address:12; 315 u_int32_t initiator_address:12; 316 u_int32_t function:8; 317 u_int32_t initiator_context; 318 u_int32_t transaction_context; 319 u_int32_t host_pagesize; 320 u_int8_t init_code; 321 u_int8_t reserved; 322 u_int16_t queue_framesize; 323 struct i2o_sgl sgl[2]; 324 } __packed; 325 326 #define I2O_EXEC_OUTBOUND_INIT_IN_PROGRESS 0x01 327 #define I2O_EXEC_OUTBOUND_INIT_REJECTED 0x02 328 #define I2O_EXEC_OUTBOUND_INIT_FAILED 0x03 329 #define I2O_EXEC_OUTBOUND_INIT_COMPLETE 0x04 330 331 struct i2o_exec_systab_set_message { 332 u_int8_t version_offset; 333 u_int8_t message_flags; 334 u_int16_t message_size; 335 u_int32_t target_address:12; 336 u_int32_t initiator_address:12; 337 u_int32_t function:8; 338 u_int32_t initiator_context; 339 u_int32_t transaction_context; 340 u_int32_t iop_id:12; 341 #define I2O_EXEC_SYS_TAB_IOP_ID_LOCAL_IOP 0x000 342 #define I2O_EXEC_SYS_TAB_IOP_ID_LOCAL_HOST 0x001 343 #define I2O_EXEC_SYS_TAB_IOP_ID_UNKNOWN_IOP 0xfff 344 345 u_int32_t reserved1:4; 346 u_int32_t host_unit_id:16; 347 #define I2O_EXEC_SYS_TAB_HOST_UNIT_ID_LOCAL_UNIT 0x0000 348 #define I2O_EXEC_SYS_TAB_HOST_UNIT_ID_UNKNOWN_UNIT 0xffff 349 350 u_int32_t segment_number:12; 351 #define I2O_EXEC_SYS_TAB_SEG_NUMBER_LOCAL_SEGMENT 0x000 352 #define I2O_EXEC_SYS_TAB_SEG_NUMBER_UNKNOWN_SEGMENT 0xfff 353 354 u_int32_t reserved2:4; 355 u_int32_t reserved3:8; 356 struct i2o_sgl sgl[3]; 357 } __packed; 358 359 struct i2o_exec_systab { 360 u_int8_t entries; 361 u_int8_t version; 362 #define I2O_RESOURCE_MANAGER_VERSION 0 363 364 u_int16_t reserved1; 365 u_int32_t change_id; 366 u_int64_t reserved2; 367 u_int16_t organization_id; 368 u_int16_t reserved3; 369 u_int32_t iop_id:12; 370 u_int32_t reserved4:20; 371 u_int32_t segment_number:12; 372 u_int32_t i2o_version:4; 373 u_int32_t iop_state:8; 374 u_int32_t messenger_type:8; 375 u_int16_t inbound_mframe_size; 376 u_int16_t reserved5; 377 u_int32_t last_changed; 378 u_int32_t iop_capabilities; 379 u_int64_t messenger_info; 380 } __packed; 381 382 struct i2o_exec_get_lct_message { 383 u_int8_t version_offset; 384 u_int8_t message_flags; 385 u_int16_t message_size; 386 u_int32_t target_address:12; 387 u_int32_t initiator_address:12; 388 u_int32_t function:8; 389 u_int32_t initiator_context; 390 u_int32_t transaction_context; 391 u_int32_t class; 392 u_int32_t last_change_id; 393 struct i2o_sgl sgl; 394 } __packed; 395 396 #define I2O_TID_IOP 0x000 397 #define I2O_TID_HOST 0x001 398 #define I2O_TID_NONE 0xfff 399 400 struct i2o_lct_entry { 401 u_int32_t entry_size:16; 402 u_int32_t local_tid:12; 403 u_int32_t reserved:4; 404 u_int32_t change_id; 405 u_int32_t device_flags; 406 u_int32_t class:12; 407 #define I2O_CLASS_EXECUTIVE 0x000 408 #define I2O_CLASS_DDM 0x001 409 #define I2O_CLASS_RANDOM_BLOCK_STORAGE 0x010 410 #define I2O_CLASS_SEQUENTIAL_STORAGE 0x011 411 #define I2O_CLASS_LAN 0x020 412 #define I2O_CLASS_WAN 0x030 413 #define I2O_CLASS_FIBRE_CHANNEL_PORT 0x040 414 #define I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL 0x041 415 #define I2O_CLASS_SCSI_PERIPHERAL 0x051 416 #define I2O_CLASS_ATE_PORT 0x060 417 #define I2O_CLASS_ATE_PERIPHERAL 0x061 418 #define I2O_CLASS_FLOPPY_CONTROLLER 0x070 419 #define I2O_CLASS_FLOPPY_DEVICE 0x071 420 #define I2O_CLASS_BUS_ADAPTER_PORT 0x080 421 #define I2O_CLASS_MATCH_ANYCLASS 0xffffffff 422 423 u_int32_t class_version:4; 424 u_int32_t class_org:16; 425 u_int32_t sub_class; 426 #define I2O_SUBCLASS_i960 0x001 427 #define I2O_SUBCLASS_HDM 0x020 428 #define I2O_SUBCLASS_ISM 0x021 429 430 u_int32_t user_tid:12; 431 u_int32_t parent_tid:12; 432 u_int32_t bios_info:8; 433 u_int8_t identity_tag[8]; 434 u_int32_t event_capabilities; 435 } __packed; 436 437 #define I2O_LCT_ENTRYSIZE (sizeof(struct i2o_lct_entry)/sizeof(u_int32_t)) 438 439 struct i2o_get_lct_reply { 440 u_int32_t table_size:16; 441 u_int32_t boot_device:12; 442 u_int32_t lct_version:4; 443 u_int32_t iop_flags; 444 u_int32_t current_change_id; 445 struct i2o_lct_entry entry[1]; 446 } __packed; 447 448 struct i2o_util_get_param_message { 449 u_int8_t version_offset; 450 u_int8_t message_flags; 451 u_int16_t message_size; 452 u_int32_t target_address:12; 453 u_int32_t initiator_address:12; 454 u_int32_t function:8; 455 u_int32_t initiator_context; 456 u_int32_t transaction_context; 457 u_int32_t operation_flags; 458 struct i2o_sgl sgl[2]; 459 } __packed; 460 461 struct i2o_get_param_template { 462 u_int16_t operation; 463 #define I2O_PARAMS_OPERATION_FIELD_GET 0x0001 464 #define I2O_PARAMS_OPERATION_LIST_GET 0x0002 465 #define I2O_PARAMS_OPERATION_MORE_GET 0x0003 466 #define I2O_PARAMS_OPERATION_SIZE_GET 0x0004 467 #define I2O_PARAMS_OPERATION_TABLE_GET 0x0005 468 #define I2O_PARAMS_OPERATION_FIELD_SET 0x0006 469 #define I2O_PARAMS_OPERATION_LIST_SET 0x0007 470 #define I2O_PARAMS_OPERATION_ROW_ADD 0x0008 471 #define I2O_PARAMS_OPERATION_ROW_DELETE 0x0009 472 #define I2O_PARAMS_OPERATION_TABLE_CLEAR 0x000A 473 474 u_int16_t group; 475 #define I2O_BSA_DEVICE_INFO_GROUP_NO 0x0000 476 #define I2O_BSA_OPERATIONAL_CONTROL_GROUP_NO 0x0001 477 #define I2O_BSA_POWER_CONTROL_GROUP_NO 0x0002 478 #define I2O_BSA_CACHE_CONTROL_GROUP_NO 0x0003 479 #define I2O_BSA_MEDIA_INFO_GROUP_NO 0x0004 480 #define I2O_BSA_ERROR_LOG_GROUP_NO 0x0005 481 482 #define I2O_UTIL_PARAMS_DESCRIPTOR_GROUP_NO 0xF000 483 #define I2O_UTIL_PHYSICAL_DEVICE_TABLE_GROUP_NO 0xF001 484 #define I2O_UTIL_CLAIMED_TABLE_GROUP_NO 0xF002 485 #define I2O_UTIL_USER_TABLE_GROUP_NO 0xF003 486 #define I2O_UTIL_PRIVATE_MESSAGE_EXTENSIONS_GROUP_NO 0xF005 487 #define I2O_UTIL_AUTHORIZED_USER_TABLE_GROUP_NO 0xF006 488 #define I2O_UTIL_DEVICE_IDENTITY_GROUP_NO 0xF100 489 #define I2O_UTIL_DDM_IDENTITY_GROUP_NO 0xF101 490 #define I2O_UTIL_USER_INFORMATION_GROUP_NO 0xF102 491 #define I2O_UTIL_SGL_OPERATING_LIMITS_GROUP_NO 0xF103 492 #define I2O_UTIL_SENSORS_GROUP_NO 0xF200 493 494 u_int16_t field_count; 495 u_int16_t pad; 496 } __packed; 497 498 struct i2o_get_param_operation { 499 u_int16_t operation_count; 500 u_int16_t reserved; 501 struct i2o_get_param_template operation[1]; 502 } __packed; 503 504 struct i2o_get_param_reply { 505 u_int16_t result_count; 506 u_int16_t reserved; 507 u_int16_t block_size; 508 u_int8_t block_status; 509 u_int8_t error_info_size; 510 u_int32_t result[1]; 511 } __packed; 512 513 struct i2o_device_identity { 514 u_int32_t class; 515 u_int16_t owner; 516 u_int16_t parent; 517 u_int8_t vendor[16]; 518 u_int8_t product[16]; 519 u_int8_t description[16]; 520 u_int8_t revision[8]; 521 u_int8_t sn_format; 522 u_int8_t serial[256]; 523 } __packed; 524 525 struct i2o_bsa_device { 526 u_int8_t device_type; 527 u_int8_t path_count; 528 u_int16_t power_state; 529 u_int32_t block_size; 530 u_int64_t capacity; 531 u_int32_t capabilities; 532 u_int32_t state; 533 } __packed; 534 535 struct i2o_util_claim_message { 536 u_int8_t version_offset; 537 u_int8_t message_flags; 538 u_int16_t message_size; 539 u_int32_t target_address:12; 540 u_int32_t initiator_address:12; 541 u_int32_t function:8; 542 u_int32_t initiator_context; 543 u_int32_t transaction_context; 544 u_int16_t claim_flags; 545 u_int8_t reserved; 546 u_int8_t claim_type; 547 } __packed; 548 549 struct i2o_util_event_register_message { 550 u_int8_t version_offset; 551 u_int8_t message_flags; 552 u_int16_t message_size; 553 u_int32_t target_address:12; 554 u_int32_t initiator_address:12; 555 u_int32_t function:8; 556 u_int32_t initiator_context; 557 u_int32_t transaction_context; 558 u_int32_t event_mask; 559 } __packed; 560 561 struct i2o_util_event_reply_message { 562 u_int8_t version_offset; 563 u_int8_t message_flags; 564 u_int16_t message_size; 565 u_int32_t target_address:12; 566 u_int32_t initiator_address:12; 567 u_int32_t function:8; 568 u_int32_t initiator_context; 569 u_int32_t transaction_context; 570 u_int32_t event_mask; 571 u_int32_t event_data[1]; 572 } __packed; 573 574 struct i2o_util_config_dialog_message { 575 u_int8_t version_offset; 576 u_int8_t message_flags; 577 u_int16_t message_size; 578 u_int32_t target_address:12; 579 u_int32_t initiator_address:12; 580 u_int32_t function:8; 581 u_int32_t initiator_context; 582 u_int32_t transaction_context; 583 u_int32_t page_number; 584 struct i2o_sgl sgl[2]; 585 } __packed; 586 587 struct i2o_private_message { 588 u_int8_t version_offset; 589 u_int8_t message_flags; 590 u_int16_t message_size; 591 u_int32_t target_address:12; 592 u_int32_t initiator_address:12; 593 u_int32_t function:8; 594 u_int32_t initiator_context; 595 u_int32_t transaction_context; 596 u_int16_t function_code; 597 u_int16_t organization_id; 598 struct i2o_sgl in_sgl; 599 struct i2o_sgl out_sgl; 600 } __packed; 601 602 struct i2o_bsa_rw_block_message { 603 u_int8_t version_offset; 604 u_int8_t message_flags; 605 u_int16_t message_size; 606 u_int32_t target_address:12; 607 u_int32_t initiator_address:12; 608 u_int32_t function:8; 609 u_int32_t initiator_context; 610 u_int32_t transaction_context; 611 u_int16_t control_flags; 612 u_int8_t time_multiplier; 613 u_int8_t fetch_ahead; 614 u_int32_t bytecount; 615 u_int64_t lba; 616 struct i2o_sgl sgl; 617 } __packed; 618 619 struct i2o_bsa_cache_flush_message { 620 u_int8_t version_offset; 621 u_int8_t message_flags; 622 u_int16_t message_size; 623 u_int32_t target_address:12; 624 u_int32_t initiator_address:12; 625 u_int32_t function:8; 626 u_int32_t initiator_context; 627 u_int32_t transaction_context; 628 u_int16_t control_flags; 629 u_int8_t time_multiplier; 630 u_int8_t reserved; 631 } __packed; 632 633 /* prototypes */ 634 int iop_init(struct iop_softc *); 635 void iop_attach(struct iop_softc *); 636 void iop_intr(void *); 637 int iop_reset(struct iop_softc *); 638 int iop_init_outqueue(struct iop_softc *); 639 int iop_get_lct(struct iop_softc *); 640 struct i2o_get_param_reply *iop_get_util_params(struct iop_softc *,int,int,int); 641 u_int32_t iop_get_mfa(struct iop_softc *); 642 void iop_free_mfa(struct iop_softc *, int); 643 int iop_queue_wait_msg(struct iop_softc *, int, struct i2o_basic_message *); 644 int iop_create_sgl(struct i2o_basic_message *, caddr_t, int, int); 645 646 /* global prototypes */ 647 int pst_add_raid(struct iop_softc *, struct i2o_lct_entry *); 648