1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com> 5 * 6 * This software was developed by SRI International and the University of 7 * Cambridge Computer Laboratory (Department of Computer Science and 8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the 9 * DARPA SSITH research programme. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33#include <machine/asm.h> 34__FBSDID("$FreeBSD$"); 35 36/* 37 * int arm_smccc_hvc(register_t, register_t, register_t, register_t, 38 * register_t, register_t, register_t, register_t, 39 * struct arm_smccc_res *res) 40 */ 41ENTRY(arm_smccc_hvc) 42 hvc #0 43 ldr x4, [sp] 44 cbz x4, 1f 45 stp x0, x1, [x4, #16 * 0] 46 stp x2, x3, [x4, #16 * 1] 471: ret 48END(arm_smccc_hvc) 49 50/* 51 * int arm_smccc_smc(register_t, register_t, register_t, register_t, 52 * register_t, register_t, register_t, register_t, 53 * struct arm_smccc_res *res) 54 */ 55ENTRY(arm_smccc_smc) 56 smc #0 57 ldr x4, [sp] 58 cbz x4, 1f 59 stp x0, x1, [x4, #16 * 0] 60 stp x2, x3, [x4, #16 * 1] 611: ret 62END(arm_smccc_smc) 63