1 /*- 2 * Copyright (c) 1997-2000 Nicolas Souchu 3 * Copyright (c) 2001 Alcove - Nicolas Souchu 4 * Copyright (c) 2006 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/module.h> 36 #include <sys/bus.h> 37 #include <machine/bus.h> 38 #include <sys/malloc.h> 39 #include <sys/rman.h> 40 41 #include <isa/isavar.h> 42 43 #include <dev/ppbus/ppbconf.h> 44 #include <dev/ppbus/ppb_msq.h> 45 #include <dev/ppc/ppcvar.h> 46 #include <dev/ppc/ppcreg.h> 47 48 #include "ppbus_if.h" 49 50 static int ppc_isa_probe(device_t dev); 51 52 int ppc_isa_attach(device_t dev); 53 int ppc_isa_write(device_t, char *, int, int); 54 55 static device_method_t ppc_isa_methods[] = { 56 /* device interface */ 57 DEVMETHOD(device_probe, ppc_isa_probe), 58 DEVMETHOD(device_attach, ppc_isa_attach), 59 DEVMETHOD(device_detach, ppc_attach), 60 61 /* bus interface */ 62 DEVMETHOD(bus_read_ivar, ppc_read_ivar), 63 DEVMETHOD(bus_setup_intr, ppc_setup_intr), 64 DEVMETHOD(bus_teardown_intr, ppc_teardown_intr), 65 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 66 67 /* ppbus interface */ 68 DEVMETHOD(ppbus_io, ppc_io), 69 DEVMETHOD(ppbus_exec_microseq, ppc_exec_microseq), 70 DEVMETHOD(ppbus_reset_epp, ppc_reset_epp), 71 DEVMETHOD(ppbus_setmode, ppc_setmode), 72 DEVMETHOD(ppbus_ecp_sync, ppc_ecp_sync), 73 DEVMETHOD(ppbus_read, ppc_read), 74 DEVMETHOD(ppbus_write, ppc_isa_write), 75 76 { 0, 0 } 77 }; 78 79 static driver_t ppc_isa_driver = { 80 ppc_driver_name, 81 ppc_isa_methods, 82 sizeof(struct ppc_data), 83 }; 84 85 static struct isa_pnp_id lpc_ids[] = { 86 { 0x0004d041, "Standard parallel printer port" }, /* PNP0400 */ 87 { 0x0104d041, "ECP parallel printer port" }, /* PNP0401 */ 88 { 0 } 89 }; 90 91 static void 92 ppc_isa_dmadone(struct ppc_data *ppc) 93 { 94 isa_dmadone(ppc->ppc_dmaflags, ppc->ppc_dmaddr, ppc->ppc_dmacnt, 95 ppc->ppc_dmachan); 96 } 97 98 int 99 ppc_isa_attach(device_t dev) 100 { 101 struct ppc_data *ppc = device_get_softc(dev); 102 103 if ((ppc->ppc_avm & PPB_ECP) && (ppc->ppc_dmachan > 0)) { 104 /* acquire the DMA channel forever */ /* XXX */ 105 isa_dma_acquire(ppc->ppc_dmachan); 106 isa_dmainit(ppc->ppc_dmachan, 1024); /* nlpt.BUFSIZE */ 107 ppc->ppc_dmadone = ppc_isa_dmadone; 108 } 109 110 return (ppc_attach(dev)); 111 } 112 113 static int 114 ppc_isa_probe(device_t dev) 115 { 116 device_t parent; 117 int error; 118 119 parent = device_get_parent(dev); 120 121 error = ISA_PNP_PROBE(parent, dev, lpc_ids); 122 if (error == ENXIO) 123 return (ENXIO); 124 if (error != 0) /* XXX shall be set after detection */ 125 device_set_desc(dev, "Parallel port"); 126 127 return (ppc_probe(dev, 0)); 128 } 129 130 /* 131 * Call this function if you want to send data in any advanced mode 132 * of your parallel port: FIFO, DMA 133 * 134 * If what you want is not possible (no ECP, no DMA...), 135 * EINVAL is returned 136 */ 137 int 138 ppc_isa_write(device_t dev, char *buf, int len, int how) 139 { 140 struct ppc_data *ppc = device_get_softc(dev); 141 char ecr, ecr_sav, ctr, ctr_sav; 142 int s, error = 0; 143 int spin; 144 145 if (!(ppc->ppc_avm & PPB_ECP) || !ppc->ppc_registered) 146 return (EINVAL); 147 if (ppc->ppc_dmachan == 0) 148 return (EINVAL); 149 150 #ifdef PPC_DEBUG 151 printf("w"); 152 #endif 153 154 ecr_sav = r_ecr(ppc); 155 ctr_sav = r_ctr(ppc); 156 157 /* 158 * Send buffer with DMA, FIFO and interrupts 159 */ 160 161 /* byte mode, no intr, no DMA, dir=0, flush fifo */ 162 ecr = PPC_ECR_STD | PPC_DISABLE_INTR; 163 w_ecr(ppc, ecr); 164 165 /* disable nAck interrupts */ 166 ctr = r_ctr(ppc); 167 ctr &= ~IRQENABLE; 168 w_ctr(ppc, ctr); 169 170 ppc->ppc_dmaflags = 0; 171 ppc->ppc_dmaddr = (caddr_t)buf; 172 ppc->ppc_dmacnt = (u_int)len; 173 174 switch (ppc->ppc_mode) { 175 case PPB_COMPATIBLE: 176 /* compatible mode with FIFO, no intr, DMA, dir=0 */ 177 ecr = PPC_ECR_FIFO | PPC_DISABLE_INTR | PPC_ENABLE_DMA; 178 break; 179 case PPB_ECP: 180 ecr = PPC_ECR_ECP | PPC_DISABLE_INTR | PPC_ENABLE_DMA; 181 break; 182 default: 183 error = EINVAL; 184 goto error; 185 } 186 187 w_ecr(ppc, ecr); 188 ecr = r_ecr(ppc); 189 190 /* enter splhigh() not to be preempted 191 * by the dma interrupt, we may miss 192 * the wakeup otherwise 193 */ 194 s = splhigh(); 195 196 ppc->ppc_dmastat = PPC_DMA_INIT; 197 198 /* enable interrupts */ 199 ecr &= ~PPC_SERVICE_INTR; 200 ppc->ppc_irqstat = PPC_IRQ_DMA; 201 w_ecr(ppc, ecr); 202 203 isa_dmastart(ppc->ppc_dmaflags, ppc->ppc_dmaddr, ppc->ppc_dmacnt, 204 ppc->ppc_dmachan); 205 ppc->ppc_dmastat = PPC_DMA_STARTED; 206 207 #ifdef PPC_DEBUG 208 printf("s%d", ppc->ppc_dmacnt); 209 #endif 210 211 /* Wait for the DMA completed interrupt. We hope we won't 212 * miss it, otherwise a signal will be necessary to unlock the 213 * process. 214 */ 215 do { 216 /* release CPU */ 217 error = tsleep(ppc, PPBPRI | PCATCH, "ppcdma", 0); 218 } while (error == EWOULDBLOCK); 219 220 splx(s); 221 222 if (error) { 223 #ifdef PPC_DEBUG 224 printf("i"); 225 #endif 226 /* stop DMA */ 227 isa_dmadone(ppc->ppc_dmaflags, ppc->ppc_dmaddr, 228 ppc->ppc_dmacnt, ppc->ppc_dmachan); 229 230 /* no dma, no interrupt, flush the fifo */ 231 w_ecr(ppc, PPC_ECR_RESET); 232 233 ppc->ppc_dmastat = PPC_DMA_INTERRUPTED; 234 goto error; 235 } 236 237 /* wait for an empty fifo */ 238 while (!(r_ecr(ppc) & PPC_FIFO_EMPTY)) { 239 240 for (spin=100; spin; spin--) 241 if (r_ecr(ppc) & PPC_FIFO_EMPTY) 242 goto fifo_empty; 243 #ifdef PPC_DEBUG 244 printf("Z"); 245 #endif 246 error = tsleep(ppc, PPBPRI | PCATCH, "ppcfifo", hz/100); 247 if (error != EWOULDBLOCK) { 248 #ifdef PPC_DEBUG 249 printf("I"); 250 #endif 251 /* no dma, no interrupt, flush the fifo */ 252 w_ecr(ppc, PPC_ECR_RESET); 253 254 ppc->ppc_dmastat = PPC_DMA_INTERRUPTED; 255 error = EINTR; 256 goto error; 257 } 258 } 259 260 fifo_empty: 261 /* no dma, no interrupt, flush the fifo */ 262 w_ecr(ppc, PPC_ECR_RESET); 263 264 error: 265 /* PDRQ must be kept unasserted until nPDACK is 266 * deasserted for a minimum of 350ns (SMC datasheet) 267 * 268 * Consequence may be a FIFO that never empty 269 */ 270 DELAY(1); 271 272 w_ecr(ppc, ecr_sav); 273 w_ctr(ppc, ctr_sav); 274 return (error); 275 } 276 277 DRIVER_MODULE(ppc, isa, ppc_isa_driver, ppc_devclass, 0, 0); 278