1 /*- 2 * Copyright (c) 1997-2000 Nicolas Souchu 3 * Copyright (c) 2001 Alcove - Nicolas Souchu 4 * Copyright (c) 2006 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/module.h> 36 #include <sys/bus.h> 37 #include <machine/bus.h> 38 #include <sys/malloc.h> 39 #include <sys/rman.h> 40 41 #include <isa/isavar.h> 42 43 #include <dev/ppbus/ppbconf.h> 44 #include <dev/ppbus/ppb_msq.h> 45 #include <dev/ppc/ppcvar.h> 46 #include <dev/ppc/ppcreg.h> 47 48 #include "ppbus_if.h" 49 50 static int ppc_isa_probe(device_t dev); 51 52 int ppc_isa_attach(device_t dev); 53 int ppc_isa_write(device_t, char *, int, int); 54 55 static device_method_t ppc_isa_methods[] = { 56 /* device interface */ 57 DEVMETHOD(device_probe, ppc_isa_probe), 58 DEVMETHOD(device_attach, ppc_isa_attach), 59 DEVMETHOD(device_detach, ppc_attach), 60 61 /* bus interface */ 62 DEVMETHOD(bus_read_ivar, ppc_read_ivar), 63 DEVMETHOD(bus_setup_intr, ppc_setup_intr), 64 DEVMETHOD(bus_teardown_intr, ppc_teardown_intr), 65 DEVMETHOD(bus_alloc_resource, ppc_alloc_resource), 66 DEVMETHOD(bus_release_resource, ppc_release_resource), 67 68 /* ppbus interface */ 69 DEVMETHOD(ppbus_io, ppc_io), 70 DEVMETHOD(ppbus_exec_microseq, ppc_exec_microseq), 71 DEVMETHOD(ppbus_reset_epp, ppc_reset_epp), 72 DEVMETHOD(ppbus_setmode, ppc_setmode), 73 DEVMETHOD(ppbus_ecp_sync, ppc_ecp_sync), 74 DEVMETHOD(ppbus_read, ppc_read), 75 DEVMETHOD(ppbus_write, ppc_isa_write), 76 77 { 0, 0 } 78 }; 79 80 static driver_t ppc_isa_driver = { 81 ppc_driver_name, 82 ppc_isa_methods, 83 sizeof(struct ppc_data), 84 }; 85 86 static struct isa_pnp_id lpc_ids[] = { 87 { 0x0004d041, "Standard parallel printer port" }, /* PNP0400 */ 88 { 0x0104d041, "ECP parallel printer port" }, /* PNP0401 */ 89 { 0 } 90 }; 91 92 static void 93 ppc_isa_dmadone(struct ppc_data *ppc) 94 { 95 isa_dmadone(ppc->ppc_dmaflags, ppc->ppc_dmaddr, ppc->ppc_dmacnt, 96 ppc->ppc_dmachan); 97 } 98 99 int 100 ppc_isa_attach(device_t dev) 101 { 102 struct ppc_data *ppc = device_get_softc(dev); 103 104 if ((ppc->ppc_avm & PPB_ECP) && (ppc->ppc_dmachan > 0)) { 105 /* acquire the DMA channel forever */ /* XXX */ 106 isa_dma_acquire(ppc->ppc_dmachan); 107 isa_dmainit(ppc->ppc_dmachan, 1024); /* nlpt.BUFSIZE */ 108 ppc->ppc_dmadone = ppc_isa_dmadone; 109 } 110 111 return (ppc_attach(dev)); 112 } 113 114 static int 115 ppc_isa_probe(device_t dev) 116 { 117 device_t parent; 118 int error; 119 120 parent = device_get_parent(dev); 121 122 error = ISA_PNP_PROBE(parent, dev, lpc_ids); 123 if (error == ENXIO) 124 return (ENXIO); 125 if (error != 0) /* XXX shall be set after detection */ 126 device_set_desc(dev, "Parallel port"); 127 128 return (ppc_probe(dev, 0)); 129 } 130 131 /* 132 * Call this function if you want to send data in any advanced mode 133 * of your parallel port: FIFO, DMA 134 * 135 * If what you want is not possible (no ECP, no DMA...), 136 * EINVAL is returned 137 */ 138 int 139 ppc_isa_write(device_t dev, char *buf, int len, int how) 140 { 141 struct ppc_data *ppc = device_get_softc(dev); 142 char ecr, ecr_sav, ctr, ctr_sav; 143 int s, error = 0; 144 int spin; 145 146 if (!(ppc->ppc_avm & PPB_ECP)) 147 return (EINVAL); 148 if (ppc->ppc_dmachan == 0) 149 return (EINVAL); 150 151 #ifdef PPC_DEBUG 152 printf("w"); 153 #endif 154 155 ecr_sav = r_ecr(ppc); 156 ctr_sav = r_ctr(ppc); 157 158 /* 159 * Send buffer with DMA, FIFO and interrupts 160 */ 161 162 /* byte mode, no intr, no DMA, dir=0, flush fifo */ 163 ecr = PPC_ECR_STD | PPC_DISABLE_INTR; 164 w_ecr(ppc, ecr); 165 166 /* disable nAck interrupts */ 167 ctr = r_ctr(ppc); 168 ctr &= ~IRQENABLE; 169 w_ctr(ppc, ctr); 170 171 ppc->ppc_dmaflags = 0; 172 ppc->ppc_dmaddr = (caddr_t)buf; 173 ppc->ppc_dmacnt = (u_int)len; 174 175 switch (ppc->ppc_mode) { 176 case PPB_COMPATIBLE: 177 /* compatible mode with FIFO, no intr, DMA, dir=0 */ 178 ecr = PPC_ECR_FIFO | PPC_DISABLE_INTR | PPC_ENABLE_DMA; 179 break; 180 case PPB_ECP: 181 ecr = PPC_ECR_ECP | PPC_DISABLE_INTR | PPC_ENABLE_DMA; 182 break; 183 default: 184 error = EINVAL; 185 goto error; 186 } 187 188 w_ecr(ppc, ecr); 189 ecr = r_ecr(ppc); 190 191 /* enter splhigh() not to be preempted 192 * by the dma interrupt, we may miss 193 * the wakeup otherwise 194 */ 195 s = splhigh(); 196 197 ppc->ppc_dmastat = PPC_DMA_INIT; 198 199 /* enable interrupts */ 200 ecr &= ~PPC_SERVICE_INTR; 201 ppc->ppc_irqstat = PPC_IRQ_DMA; 202 w_ecr(ppc, ecr); 203 204 isa_dmastart(ppc->ppc_dmaflags, ppc->ppc_dmaddr, ppc->ppc_dmacnt, 205 ppc->ppc_dmachan); 206 ppc->ppc_dmastat = PPC_DMA_STARTED; 207 208 #ifdef PPC_DEBUG 209 printf("s%d", ppc->ppc_dmacnt); 210 #endif 211 212 /* Wait for the DMA completed interrupt. We hope we won't 213 * miss it, otherwise a signal will be necessary to unlock the 214 * process. 215 */ 216 do { 217 /* release CPU */ 218 error = tsleep(ppc, PPBPRI | PCATCH, "ppcdma", 0); 219 } while (error == EWOULDBLOCK); 220 221 splx(s); 222 223 if (error) { 224 #ifdef PPC_DEBUG 225 printf("i"); 226 #endif 227 /* stop DMA */ 228 isa_dmadone(ppc->ppc_dmaflags, ppc->ppc_dmaddr, 229 ppc->ppc_dmacnt, ppc->ppc_dmachan); 230 231 /* no dma, no interrupt, flush the fifo */ 232 w_ecr(ppc, PPC_ECR_RESET); 233 234 ppc->ppc_dmastat = PPC_DMA_INTERRUPTED; 235 goto error; 236 } 237 238 /* wait for an empty fifo */ 239 while (!(r_ecr(ppc) & PPC_FIFO_EMPTY)) { 240 241 for (spin=100; spin; spin--) 242 if (r_ecr(ppc) & PPC_FIFO_EMPTY) 243 goto fifo_empty; 244 #ifdef PPC_DEBUG 245 printf("Z"); 246 #endif 247 error = tsleep(ppc, PPBPRI | PCATCH, "ppcfifo", hz/100); 248 if (error != EWOULDBLOCK) { 249 #ifdef PPC_DEBUG 250 printf("I"); 251 #endif 252 /* no dma, no interrupt, flush the fifo */ 253 w_ecr(ppc, PPC_ECR_RESET); 254 255 ppc->ppc_dmastat = PPC_DMA_INTERRUPTED; 256 error = EINTR; 257 goto error; 258 } 259 } 260 261 fifo_empty: 262 /* no dma, no interrupt, flush the fifo */ 263 w_ecr(ppc, PPC_ECR_RESET); 264 265 error: 266 /* PDRQ must be kept unasserted until nPDACK is 267 * deasserted for a minimum of 350ns (SMC datasheet) 268 * 269 * Consequence may be a FIFO that never empty 270 */ 271 DELAY(1); 272 273 w_ecr(ppc, ecr_sav); 274 w_ctr(ppc, ctr_sav); 275 return (error); 276 } 277 278 DRIVER_MODULE(ppc, isa, ppc_isa_driver, ppc_devclass, 0, 0); 279