1 /*- 2 * Copyright (c) 1997-2000 Nicolas Souchu 3 * Copyright (c) 2001 Alcove - Nicolas Souchu 4 * Copyright (c) 2006 Marcel Moolenaar 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/module.h> 36 #include <sys/bus.h> 37 #include <machine/bus.h> 38 #include <sys/malloc.h> 39 40 #if defined(__i386__) && defined(PC98) 41 #include <pc98/cbus/cbus.h> 42 #else 43 #include <isa/isareg.h> 44 #endif 45 #include <isa/isavar.h> 46 47 #include <dev/ppbus/ppbconf.h> 48 #include <dev/ppbus/ppb_msq.h> 49 #include <dev/ppc/ppcvar.h> 50 #include <dev/ppc/ppcreg.h> 51 52 #include "ppbus_if.h" 53 54 static int ppc_isa_probe(device_t dev); 55 56 int ppc_isa_attach(device_t dev); 57 int ppc_isa_write(device_t, char *, int, int); 58 59 static device_method_t ppc_isa_methods[] = { 60 /* device interface */ 61 DEVMETHOD(device_probe, ppc_isa_probe), 62 DEVMETHOD(device_attach, ppc_isa_attach), 63 DEVMETHOD(device_detach, ppc_attach), 64 65 /* bus interface */ 66 DEVMETHOD(bus_read_ivar, ppc_read_ivar), 67 DEVMETHOD(bus_setup_intr, ppc_setup_intr), 68 DEVMETHOD(bus_teardown_intr, ppc_teardown_intr), 69 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 70 71 /* ppbus interface */ 72 DEVMETHOD(ppbus_io, ppc_io), 73 DEVMETHOD(ppbus_exec_microseq, ppc_exec_microseq), 74 DEVMETHOD(ppbus_reset_epp, ppc_reset_epp), 75 DEVMETHOD(ppbus_setmode, ppc_setmode), 76 DEVMETHOD(ppbus_ecp_sync, ppc_ecp_sync), 77 DEVMETHOD(ppbus_read, ppc_read), 78 DEVMETHOD(ppbus_write, ppc_isa_write), 79 80 { 0, 0 } 81 }; 82 83 static driver_t ppc_isa_driver = { 84 ppc_driver_name, 85 ppc_isa_methods, 86 sizeof(struct ppc_data), 87 }; 88 89 static struct isa_pnp_id lpc_ids[] = { 90 { 0x0004d041, "Standard parallel printer port" }, /* PNP0400 */ 91 { 0x0104d041, "ECP parallel printer port" }, /* PNP0401 */ 92 { 0 } 93 }; 94 95 static void 96 ppc_isa_dmadone(struct ppc_data *ppc) 97 { 98 isa_dmadone(ppc->ppc_dmaflags, ppc->ppc_dmaddr, ppc->ppc_dmacnt, 99 ppc->ppc_dmachan); 100 } 101 102 int 103 ppc_isa_attach(device_t dev) 104 { 105 struct ppc_data *ppc = device_get_softc(dev); 106 107 if ((ppc->ppc_avm & PPB_ECP) && (ppc->ppc_dmachan > 0)) { 108 /* acquire the DMA channel forever */ /* XXX */ 109 isa_dma_acquire(ppc->ppc_dmachan); 110 isa_dmainit(ppc->ppc_dmachan, 1024); /* nlpt.BUFSIZE */ 111 ppc->ppc_dmadone = ppc_isa_dmadone; 112 } 113 114 return (ppc_attach(dev)); 115 } 116 117 static int 118 ppc_isa_probe(device_t dev) 119 { 120 device_t parent; 121 int error; 122 123 parent = device_get_parent(dev); 124 125 error = ISA_PNP_PROBE(parent, dev, lpc_ids); 126 if (error == ENXIO) 127 return (ENXIO); 128 if (error != 0) /* XXX shall be set after detection */ 129 device_set_desc(dev, "Parallel port"); 130 131 return (ppc_probe(dev, 0)); 132 } 133 134 /* 135 * Call this function if you want to send data in any advanced mode 136 * of your parallel port: FIFO, DMA 137 * 138 * If what you want is not possible (no ECP, no DMA...), 139 * EINVAL is returned 140 */ 141 int 142 ppc_isa_write(device_t dev, char *buf, int len, int how) 143 { 144 struct ppc_data *ppc = device_get_softc(dev); 145 char ecr, ecr_sav, ctr, ctr_sav; 146 int s, error = 0; 147 int spin; 148 149 if (!(ppc->ppc_avm & PPB_ECP) || !ppc->ppc_registered) 150 return (EINVAL); 151 if (ppc->ppc_dmachan == 0) 152 return (EINVAL); 153 154 #ifdef PPC_DEBUG 155 printf("w"); 156 #endif 157 158 ecr_sav = r_ecr(ppc); 159 ctr_sav = r_ctr(ppc); 160 161 /* 162 * Send buffer with DMA, FIFO and interrupts 163 */ 164 165 /* byte mode, no intr, no DMA, dir=0, flush fifo */ 166 ecr = PPC_ECR_STD | PPC_DISABLE_INTR; 167 w_ecr(ppc, ecr); 168 169 /* disable nAck interrupts */ 170 ctr = r_ctr(ppc); 171 ctr &= ~IRQENABLE; 172 w_ctr(ppc, ctr); 173 174 ppc->ppc_dmaflags = 0; 175 ppc->ppc_dmaddr = (caddr_t)buf; 176 ppc->ppc_dmacnt = (u_int)len; 177 178 switch (ppc->ppc_mode) { 179 case PPB_COMPATIBLE: 180 /* compatible mode with FIFO, no intr, DMA, dir=0 */ 181 ecr = PPC_ECR_FIFO | PPC_DISABLE_INTR | PPC_ENABLE_DMA; 182 break; 183 case PPB_ECP: 184 ecr = PPC_ECR_ECP | PPC_DISABLE_INTR | PPC_ENABLE_DMA; 185 break; 186 default: 187 error = EINVAL; 188 goto error; 189 } 190 191 w_ecr(ppc, ecr); 192 ecr = r_ecr(ppc); 193 194 /* enter splhigh() not to be preempted 195 * by the dma interrupt, we may miss 196 * the wakeup otherwise 197 */ 198 s = splhigh(); 199 200 ppc->ppc_dmastat = PPC_DMA_INIT; 201 202 /* enable interrupts */ 203 ecr &= ~PPC_SERVICE_INTR; 204 ppc->ppc_irqstat = PPC_IRQ_DMA; 205 w_ecr(ppc, ecr); 206 207 isa_dmastart(ppc->ppc_dmaflags, ppc->ppc_dmaddr, ppc->ppc_dmacnt, 208 ppc->ppc_dmachan); 209 ppc->ppc_dmastat = PPC_DMA_STARTED; 210 211 #ifdef PPC_DEBUG 212 printf("s%d", ppc->ppc_dmacnt); 213 #endif 214 215 /* Wait for the DMA completed interrupt. We hope we won't 216 * miss it, otherwise a signal will be necessary to unlock the 217 * process. 218 */ 219 do { 220 /* release CPU */ 221 error = tsleep(ppc, PPBPRI | PCATCH, "ppcdma", 0); 222 } while (error == EWOULDBLOCK); 223 224 splx(s); 225 226 if (error) { 227 #ifdef PPC_DEBUG 228 printf("i"); 229 #endif 230 /* stop DMA */ 231 isa_dmadone(ppc->ppc_dmaflags, ppc->ppc_dmaddr, 232 ppc->ppc_dmacnt, ppc->ppc_dmachan); 233 234 /* no dma, no interrupt, flush the fifo */ 235 w_ecr(ppc, PPC_ECR_RESET); 236 237 ppc->ppc_dmastat = PPC_DMA_INTERRUPTED; 238 goto error; 239 } 240 241 /* wait for an empty fifo */ 242 while (!(r_ecr(ppc) & PPC_FIFO_EMPTY)) { 243 244 for (spin=100; spin; spin--) 245 if (r_ecr(ppc) & PPC_FIFO_EMPTY) 246 goto fifo_empty; 247 #ifdef PPC_DEBUG 248 printf("Z"); 249 #endif 250 error = tsleep(ppc, PPBPRI | PCATCH, "ppcfifo", hz/100); 251 if (error != EWOULDBLOCK) { 252 #ifdef PPC_DEBUG 253 printf("I"); 254 #endif 255 /* no dma, no interrupt, flush the fifo */ 256 w_ecr(ppc, PPC_ECR_RESET); 257 258 ppc->ppc_dmastat = PPC_DMA_INTERRUPTED; 259 error = EINTR; 260 goto error; 261 } 262 } 263 264 fifo_empty: 265 /* no dma, no interrupt, flush the fifo */ 266 w_ecr(ppc, PPC_ECR_RESET); 267 268 error: 269 /* PDRQ must be kept unasserted until nPDACK is 270 * deasserted for a minimum of 350ns (SMC datasheet) 271 * 272 * Consequence may be a FIFO that never empty 273 */ 274 DELAY(1); 275 276 w_ecr(ppc, ecr_sav); 277 w_ctr(ppc, ctr_sav); 278 return (error); 279 } 280 281 DRIVER_MODULE(ppc, isa, ppc_isa_driver, ppc_devclass, 0, 0); 282