1 /*- 2 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 * 28 */ 29 #include "opt_ppb_1284.h" 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/module.h> 34 #include <sys/bus.h> 35 #include <sys/conf.h> 36 #include <sys/kernel.h> 37 #include <sys/uio.h> 38 #include <sys/fcntl.h> 39 40 #include <machine/bus.h> 41 #include <machine/resource.h> 42 #include <sys/rman.h> 43 44 #include <dev/ppbus/ppbconf.h> 45 #include <dev/ppbus/ppb_msq.h> 46 47 #ifdef PERIPH_1284 48 #include <dev/ppbus/ppb_1284.h> 49 #endif 50 51 #include <dev/ppbus/ppi.h> 52 53 #include "ppbus_if.h" 54 55 #include <dev/ppbus/ppbio.h> 56 57 #define BUFSIZE 512 58 59 struct ppi_data { 60 61 int ppi_unit; 62 int ppi_flags; 63 #define HAVE_PPBUS (1<<0) 64 #define HAD_PPBUS (1<<1) 65 66 int ppi_count; 67 int ppi_mode; /* IEEE1284 mode */ 68 char ppi_buffer[BUFSIZE]; 69 70 #ifdef PERIPH_1284 71 struct resource *intr_resource; /* interrupt resource */ 72 void *intr_cookie; /* interrupt registration cookie */ 73 #endif /* PERIPH_1284 */ 74 }; 75 76 #define DEVTOSOFTC(dev) \ 77 ((struct ppi_data *)device_get_softc(dev)) 78 #define UNITOSOFTC(unit) \ 79 ((struct ppi_data *)devclass_get_softc(ppi_devclass, (unit))) 80 #define UNITODEVICE(unit) \ 81 (devclass_get_device(ppi_devclass, (unit))) 82 83 static devclass_t ppi_devclass; 84 85 static d_open_t ppiopen; 86 static d_close_t ppiclose; 87 static d_ioctl_t ppiioctl; 88 static d_write_t ppiwrite; 89 static d_read_t ppiread; 90 91 #define CDEV_MAJOR 82 92 static struct cdevsw ppi_cdevsw = { 93 /* open */ ppiopen, 94 /* close */ ppiclose, 95 /* read */ ppiread, 96 /* write */ ppiwrite, 97 /* ioctl */ ppiioctl, 98 /* poll */ nopoll, 99 /* mmap */ nommap, 100 /* strategy */ nostrategy, 101 /* name */ "ppi", 102 /* maj */ CDEV_MAJOR, 103 /* dump */ nodump, 104 /* psize */ nopsize, 105 /* flags */ 0, 106 /* bmaj */ -1 107 }; 108 109 #ifdef PERIPH_1284 110 111 static void 112 ppi_enable_intr(device_t ppidev) 113 { 114 char r; 115 device_t ppbus = device_get_parent(ppidev); 116 117 r = ppb_rctr(ppbus); 118 ppb_wctr(ppbus, r | IRQENABLE); 119 120 return; 121 } 122 123 static void 124 ppi_disable_intr(device_t ppidev) 125 { 126 char r; 127 device_t ppbus = device_get_parent(ppidev); 128 129 r = ppb_rctr(ppbus); 130 ppb_wctr(ppbus, r & ~IRQENABLE); 131 132 return; 133 } 134 135 #endif /* PERIPH_1284 */ 136 137 static void 138 ppi_identify(driver_t *driver, device_t parent) 139 { 140 141 BUS_ADD_CHILD(parent, 0, "ppi", 0); 142 } 143 144 /* 145 * ppi_probe() 146 */ 147 static int 148 ppi_probe(device_t dev) 149 { 150 struct ppi_data *ppi; 151 152 /* probe is always ok */ 153 device_set_desc(dev, "Parallel I/O"); 154 155 ppi = DEVTOSOFTC(dev); 156 bzero(ppi, sizeof(struct ppi_data)); 157 158 return (0); 159 } 160 161 /* 162 * ppi_attach() 163 */ 164 static int 165 ppi_attach(device_t dev) 166 { 167 #ifdef PERIPH_1284 168 uintptr_t irq; 169 int zero = 0; 170 struct ppi_data *ppi = DEVTOSOFTC(dev); 171 172 /* retrive the irq */ 173 BUS_READ_IVAR(device_get_parent(dev), dev, PPBUS_IVAR_IRQ, &irq); 174 175 /* declare our interrupt handler */ 176 ppi->intr_resource = bus_alloc_resource(dev, SYS_RES_IRQ, 177 &zero, irq, irq, 1, RF_ACTIVE); 178 #endif /* PERIPH_1284 */ 179 180 make_dev(&ppi_cdevsw, device_get_unit(dev), /* XXX cleanup */ 181 UID_ROOT, GID_WHEEL, 182 0600, "ppi%d", device_get_unit(dev)); 183 184 return (0); 185 } 186 187 #ifdef PERIPH_1284 188 /* 189 * Cable 190 * ----- 191 * 192 * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks: 193 * 194 * nStrobe <-> nAck 1 <-> 10 195 * nAutofd <-> Busy 11 <-> 14 196 * nSelectin <-> Select 17 <-> 13 197 * nInit <-> nFault 15 <-> 16 198 * 199 */ 200 static void 201 ppiintr(void *arg) 202 { 203 device_t ppidev = (device_t)arg; 204 device_t ppbus = device_get_parent(ppidev); 205 struct ppi_data *ppi = DEVTOSOFTC(ppidev); 206 207 ppi_disable_intr(ppidev); 208 209 switch (ppb_1284_get_state(ppbus)) { 210 211 /* accept IEEE1284 negociation then wakeup an waiting process to 212 * continue negociation at process level */ 213 case PPB_FORWARD_IDLE: 214 /* Event 1 */ 215 if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) == 216 (SELECT | nBUSY)) { 217 /* IEEE1284 negociation */ 218 #ifdef DEBUG_1284 219 printf("N"); 220 #endif 221 222 /* Event 2 - prepare for reading the ext. value */ 223 ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN); 224 225 ppb_1284_set_state(ppbus, PPB_NEGOCIATION); 226 227 } else { 228 #ifdef DEBUG_1284 229 printf("0x%x", ppb_rstr(ppbus)); 230 #endif 231 ppb_peripheral_terminate(ppbus, PPB_DONTWAIT); 232 break; 233 } 234 235 /* wake up any process waiting for negociation from 236 * remote master host */ 237 238 /* XXX should set a variable to warn the process about 239 * the interrupt */ 240 241 wakeup(ppi); 242 break; 243 default: 244 #ifdef DEBUG_1284 245 printf("?%d", ppb_1284_get_state(ppbus)); 246 #endif 247 ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE); 248 ppb_set_mode(ppbus, PPB_COMPATIBLE); 249 break; 250 } 251 252 ppi_enable_intr(ppidev); 253 254 return; 255 } 256 #endif /* PERIPH_1284 */ 257 258 static int 259 ppiopen(dev_t dev, int flags, int fmt, struct proc *p) 260 { 261 u_int unit = minor(dev); 262 struct ppi_data *ppi = UNITOSOFTC(unit); 263 device_t ppidev = UNITODEVICE(unit); 264 device_t ppbus = device_get_parent(ppidev); 265 int res; 266 267 if (!ppi) 268 return (ENXIO); 269 270 if (!(ppi->ppi_flags & HAVE_PPBUS)) { 271 if ((res = ppb_request_bus(ppbus, ppidev, 272 (flags & O_NONBLOCK) ? PPB_DONTWAIT : 273 (PPB_WAIT | PPB_INTR)))) 274 return (res); 275 276 ppi->ppi_flags |= HAVE_PPBUS; 277 278 #ifdef PERIPH_1284 279 if (ppi->intr_resource) { 280 /* register our interrupt handler */ 281 BUS_SETUP_INTR(device_get_parent(ppidev), ppidev, ppi->intr_resource, 282 INTR_TYPE_TTY, ppiintr, dev, &ppi->intr_cookie); 283 } 284 #endif /* PERIPH_1284 */ 285 } 286 ppi->ppi_count += 1; 287 288 return (0); 289 } 290 291 static int 292 ppiclose(dev_t dev, int flags, int fmt, struct proc *p) 293 { 294 u_int unit = minor(dev); 295 struct ppi_data *ppi = UNITOSOFTC(unit); 296 device_t ppidev = UNITODEVICE(unit); 297 device_t ppbus = device_get_parent(ppidev); 298 299 ppi->ppi_count --; 300 if (!ppi->ppi_count) { 301 302 #ifdef PERIPH_1284 303 switch (ppb_1284_get_state(ppbus)) { 304 case PPB_PERIPHERAL_IDLE: 305 ppb_peripheral_terminate(ppbus, 0); 306 break; 307 case PPB_REVERSE_IDLE: 308 case PPB_EPP_IDLE: 309 case PPB_ECP_FORWARD_IDLE: 310 default: 311 ppb_1284_terminate(ppbus); 312 break; 313 } 314 #endif /* PERIPH_1284 */ 315 316 /* unregistration of interrupt forced by release */ 317 ppb_release_bus(ppbus, ppidev); 318 319 ppi->ppi_flags &= ~HAVE_PPBUS; 320 } 321 322 return (0); 323 } 324 325 /* 326 * ppiread() 327 * 328 * IEEE1284 compliant read. 329 * 330 * First, try negociation to BYTE then NIBBLE mode 331 * If no data is available, wait for it otherwise transfer as much as possible 332 */ 333 static int 334 ppiread(dev_t dev, struct uio *uio, int ioflag) 335 { 336 #ifdef PERIPH_1284 337 u_int unit = minor(dev); 338 struct ppi_data *ppi = UNITOSOFTC(unit); 339 device_t ppidev = UNITODEVICE(unit); 340 device_t ppbus = device_get_parent(ppidev); 341 int len, error = 0; 342 343 switch (ppb_1284_get_state(ppbus)) { 344 case PPB_PERIPHERAL_IDLE: 345 ppb_peripheral_terminate(ppbus, 0); 346 /* fall throught */ 347 348 case PPB_FORWARD_IDLE: 349 /* if can't negociate NIBBLE mode then try BYTE mode, 350 * the peripheral may be a computer 351 */ 352 if ((ppb_1284_negociate(ppbus, 353 ppi->ppi_mode = PPB_NIBBLE, 0))) { 354 355 /* XXX Wait 2 seconds to let the remote host some 356 * time to terminate its interrupt 357 */ 358 tsleep(ppi, PPBPRI, "ppiread", 2*hz); 359 360 if ((error = ppb_1284_negociate(ppbus, 361 ppi->ppi_mode = PPB_BYTE, 0))) 362 return (error); 363 } 364 break; 365 366 case PPB_REVERSE_IDLE: 367 case PPB_EPP_IDLE: 368 case PPB_ECP_FORWARD_IDLE: 369 default: 370 break; 371 } 372 373 #ifdef DEBUG_1284 374 printf("N"); 375 #endif 376 /* read data */ 377 len = 0; 378 while (uio->uio_resid) { 379 if ((error = ppb_1284_read(ppbus, ppi->ppi_mode, 380 ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid), 381 &len))) { 382 goto error; 383 } 384 385 if (!len) 386 goto error; /* no more data */ 387 388 #ifdef DEBUG_1284 389 printf("d"); 390 #endif 391 if ((error = uiomove(ppi->ppi_buffer, len, uio))) 392 goto error; 393 } 394 395 error: 396 397 #else /* PERIPH_1284 */ 398 int error = ENODEV; 399 #endif 400 401 return (error); 402 } 403 404 /* 405 * ppiwrite() 406 * 407 * IEEE1284 compliant write 408 * 409 * Actually, this is the peripheral side of a remote IEEE1284 read 410 * 411 * The first part of the negociation (IEEE1284 device detection) is 412 * done at interrupt level, then the remaining is done by the writing 413 * process 414 * 415 * Once negociation done, transfer data 416 */ 417 static int 418 ppiwrite(dev_t dev, struct uio *uio, int ioflag) 419 { 420 #ifdef PERIPH_1284 421 u_int unit = minor(dev); 422 struct ppi_data *ppi = UNITOSOFTC(unit); 423 device_t ppidev = UNITODEVICE(unit); 424 device_t ppbus = device_get_parent(ppidev); 425 int len, error = 0, sent; 426 427 #if 0 428 int ret; 429 430 #define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR) 431 #define LENGTH MS_PARAM(0, 1, MS_TYP_INT) 432 433 struct ppb_microseq msq[] = { 434 { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } }, 435 MS_RET(0) 436 }; 437 438 /* negociate ECP mode */ 439 if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) { 440 printf("ppiwrite: ECP negociation failed\n"); 441 } 442 443 while (!error && (len = min(uio->uio_resid, BUFSIZE))) { 444 uiomove(ppi->ppi_buffer, len, uio); 445 446 ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len); 447 448 error = ppb_MS_microseq(ppbus, msq, &ret); 449 } 450 #endif 451 452 /* we have to be peripheral to be able to send data, so 453 * wait for the appropriate state 454 */ 455 if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION) 456 ppb_1284_terminate(ppbus); 457 458 while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) { 459 /* XXX should check a variable before sleeping */ 460 #ifdef DEBUG_1284 461 printf("s"); 462 #endif 463 464 ppi_enable_intr(ppidev); 465 466 /* sleep until IEEE1284 negociation starts */ 467 error = tsleep(ppi, PCATCH | PPBPRI, "ppiwrite", 0); 468 469 switch (error) { 470 case 0: 471 /* negociate peripheral side with BYTE mode */ 472 ppb_peripheral_negociate(ppbus, PPB_BYTE, 0); 473 break; 474 case EWOULDBLOCK: 475 break; 476 default: 477 goto error; 478 } 479 } 480 #ifdef DEBUG_1284 481 printf("N"); 482 #endif 483 484 /* negociation done, write bytes to master host */ 485 while ((len = min(uio->uio_resid, BUFSIZE)) != 0) { 486 uiomove(ppi->ppi_buffer, len, uio); 487 if ((error = byte_peripheral_write(ppbus, 488 ppi->ppi_buffer, len, &sent))) 489 goto error; 490 #ifdef DEBUG_1284 491 printf("d"); 492 #endif 493 } 494 495 error: 496 497 #else /* PERIPH_1284 */ 498 int error = ENODEV; 499 #endif 500 501 return (error); 502 } 503 504 static int 505 ppiioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct proc *p) 506 { 507 u_int unit = minor(dev); 508 device_t ppidev = UNITODEVICE(unit); 509 device_t ppbus = device_get_parent(ppidev); 510 int error = 0; 511 u_int8_t *val = (u_int8_t *)data; 512 513 switch (cmd) { 514 515 case PPIGDATA: /* get data register */ 516 *val = ppb_rdtr(ppbus); 517 break; 518 case PPIGSTATUS: /* get status bits */ 519 *val = ppb_rstr(ppbus); 520 break; 521 case PPIGCTRL: /* get control bits */ 522 *val = ppb_rctr(ppbus); 523 break; 524 case PPIGEPPD: /* get EPP data bits */ 525 *val = ppb_repp_D(ppbus); 526 break; 527 case PPIGECR: /* get ECP bits */ 528 *val = ppb_recr(ppbus); 529 break; 530 case PPIGFIFO: /* read FIFO */ 531 *val = ppb_rfifo(ppbus); 532 break; 533 case PPISDATA: /* set data register */ 534 ppb_wdtr(ppbus, *val); 535 break; 536 case PPISSTATUS: /* set status bits */ 537 ppb_wstr(ppbus, *val); 538 break; 539 case PPISCTRL: /* set control bits */ 540 ppb_wctr(ppbus, *val); 541 break; 542 case PPISEPPD: /* set EPP data bits */ 543 ppb_wepp_D(ppbus, *val); 544 break; 545 case PPISECR: /* set ECP bits */ 546 ppb_wecr(ppbus, *val); 547 break; 548 case PPISFIFO: /* write FIFO */ 549 ppb_wfifo(ppbus, *val); 550 break; 551 case PPIGEPPA: /* get EPP address bits */ 552 *val = ppb_repp_A(ppbus); 553 break; 554 case PPISEPPA: /* set EPP address bits */ 555 ppb_wepp_A(ppbus, *val); 556 break; 557 default: 558 error = ENOTTY; 559 break; 560 } 561 562 return (error); 563 } 564 565 static device_method_t ppi_methods[] = { 566 /* device interface */ 567 DEVMETHOD(device_identify, ppi_identify), 568 DEVMETHOD(device_probe, ppi_probe), 569 DEVMETHOD(device_attach, ppi_attach), 570 571 { 0, 0 } 572 }; 573 574 static driver_t ppi_driver = { 575 "ppi", 576 ppi_methods, 577 sizeof(struct ppi_data), 578 }; 579 DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0); 580