1 /*- 2 * Copyright (c) 1997, 1998 Nicolas Souchu, Michael Smith 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $Id: ppi.c,v 1.14 1999/05/30 16:51:35 phk Exp $ 27 * 28 */ 29 #include "ppi.h" 30 31 #if NPPI > 0 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/conf.h> 36 #include <sys/kernel.h> 37 #include <sys/uio.h> 38 #include <sys/malloc.h> 39 #include <sys/fcntl.h> 40 41 #include <machine/clock.h> 42 43 #include <dev/ppbus/ppbconf.h> 44 #include <dev/ppbus/ppb_msq.h> 45 46 #include "opt_ppb_1284.h" 47 48 #ifdef PERIPH_1284 49 #include <dev/ppbus/ppb_1284.h> 50 #endif 51 52 #include <dev/ppbus/ppi.h> 53 54 #define BUFSIZE 512 55 56 struct ppi_data { 57 58 int ppi_unit; 59 int ppi_flags; 60 #define HAVE_PPBUS (1<<0) 61 #define HAD_PPBUS (1<<1) 62 63 int ppi_count; 64 int ppi_mode; /* IEEE1284 mode */ 65 char ppi_buffer[BUFSIZE]; 66 67 struct ppb_device ppi_dev; 68 }; 69 70 #define MAXPPI 8 /* XXX not much better! */ 71 static int nppi = 0; 72 static struct ppi_data *ppidata[MAXPPI]; 73 74 /* 75 * Make ourselves visible as a ppbus driver 76 */ 77 78 static struct ppb_device *ppiprobe(struct ppb_data *ppb); 79 static int ppiattach(struct ppb_device *dev); 80 static void ppiintr(int unit); 81 82 static struct ppb_driver ppidriver = { 83 ppiprobe, ppiattach, "ppi" 84 }; 85 DATA_SET(ppbdriver_set, ppidriver); 86 87 static d_open_t ppiopen; 88 static d_close_t ppiclose; 89 static d_ioctl_t ppiioctl; 90 static d_write_t ppiwrite; 91 static d_read_t ppiread; 92 93 #define CDEV_MAJOR 82 94 static struct cdevsw ppi_cdevsw = { 95 /* open */ ppiopen, 96 /* close */ ppiclose, 97 /* read */ ppiread, 98 /* write */ ppiwrite, 99 /* ioctl */ ppiioctl, 100 /* stop */ nostop, 101 /* reset */ noreset, 102 /* devtotty */ nodevtotty, 103 /* poll */ nopoll, 104 /* mmap */ nommap, 105 /* strategy */ nostrategy, 106 /* name */ "ppi", 107 /* parms */ noparms, 108 /* maj */ CDEV_MAJOR, 109 /* dump */ nodump, 110 /* psize */ nopsize, 111 /* flags */ 0, 112 /* maxio */ 0, 113 /* bmaj */ -1 114 }; 115 116 #ifdef PERIPH_1284 117 118 static void 119 ppi_enable_intr(struct ppi_data *ppi) 120 { 121 char r; 122 123 r = ppb_rctr(&ppi->ppi_dev); 124 ppb_wctr(&ppi->ppi_dev, r | IRQENABLE); 125 126 return; 127 } 128 129 static void 130 ppi_disable_intr(struct ppi_data *ppi) 131 { 132 char r; 133 134 r = ppb_rctr(&ppi->ppi_dev); 135 ppb_wctr(&ppi->ppi_dev, r & ~IRQENABLE); 136 137 return; 138 } 139 140 #endif /* PERIPH_1284 */ 141 142 /* 143 * ppiprobe() 144 */ 145 static struct ppb_device * 146 ppiprobe(struct ppb_data *ppb) 147 { 148 struct ppi_data *ppi; 149 static int once; 150 151 if (!once++) 152 cdevsw_add(&ppi_cdevsw); 153 154 ppi = (struct ppi_data *) malloc(sizeof(struct ppi_data), 155 M_TEMP, M_NOWAIT); 156 if (!ppi) { 157 printf("ppi: cannot malloc!\n"); 158 return 0; 159 } 160 bzero(ppi, sizeof(struct ppi_data)); 161 162 ppidata[nppi] = ppi; 163 164 /* 165 * ppi dependent initialisation. 166 */ 167 ppi->ppi_unit = nppi; 168 169 /* 170 * ppbus dependent initialisation. 171 */ 172 ppi->ppi_dev.id_unit = ppi->ppi_unit; 173 ppi->ppi_dev.ppb = ppb; 174 ppi->ppi_dev.intr = ppiintr; 175 176 /* Ok, go to next device on next probe */ 177 nppi ++; 178 179 return &ppi->ppi_dev; 180 } 181 182 static int 183 ppiattach(struct ppb_device *dev) 184 { 185 /* 186 * Report ourselves 187 */ 188 printf("ppi%d: <generic parallel i/o> on ppbus %d\n", 189 dev->id_unit, dev->ppb->ppb_link->adapter_unit); 190 191 return (1); 192 } 193 194 /* 195 * Cable 196 * ----- 197 * 198 * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks: 199 * 200 * nStrobe <-> nAck 1 <-> 10 201 * nAutofd <-> Busy 11 <-> 14 202 * nSelectin <-> Select 17 <-> 13 203 * nInit <-> nFault 15 <-> 16 204 * 205 */ 206 static void 207 ppiintr(int unit) 208 { 209 #ifdef PERIPH_1284 210 struct ppi_data *ppi = ppidata[unit]; 211 212 ppi_disable_intr(ppi); 213 214 switch (ppi->ppi_dev.ppb->state) { 215 216 /* accept IEEE1284 negociation then wakeup an waiting process to 217 * continue negociation at process level */ 218 case PPB_FORWARD_IDLE: 219 /* Event 1 */ 220 if ((ppb_rstr(&ppi->ppi_dev) & (SELECT | nBUSY)) == 221 (SELECT | nBUSY)) { 222 /* IEEE1284 negociation */ 223 #ifdef DEBUG_1284 224 printf("N"); 225 #endif 226 227 /* Event 2 - prepare for reading the ext. value */ 228 ppb_wctr(&ppi->ppi_dev, (PCD | STROBE | nINIT) & ~SELECTIN); 229 230 ppi->ppi_dev.ppb->state = PPB_NEGOCIATION; 231 232 } else { 233 #ifdef DEBUG_1284 234 printf("0x%x", ppb_rstr(&ppi->ppi_dev)); 235 #endif 236 ppb_peripheral_terminate(&ppi->ppi_dev, PPB_DONTWAIT); 237 break; 238 } 239 240 /* wake up any process waiting for negociation from 241 * remote master host */ 242 243 /* XXX should set a variable to warn the process about 244 * the interrupt */ 245 246 wakeup(ppi); 247 break; 248 default: 249 #ifdef DEBUG_1284 250 printf("?%d", ppi->ppi_dev.ppb->state); 251 #endif 252 ppi->ppi_dev.ppb->state = PPB_FORWARD_IDLE; 253 ppb_set_mode(&ppi->ppi_dev, PPB_COMPATIBLE); 254 break; 255 } 256 257 ppi_enable_intr(ppi); 258 #endif /* PERIPH_1284 */ 259 260 return; 261 } 262 263 static int 264 ppiopen(dev_t dev, int flags, int fmt, struct proc *p) 265 { 266 u_int unit = minor(dev); 267 struct ppi_data *ppi = ppidata[unit]; 268 int res; 269 270 if (unit >= nppi) 271 return (ENXIO); 272 273 if (!(ppi->ppi_flags & HAVE_PPBUS)) { 274 if ((res = ppb_request_bus(&ppi->ppi_dev, 275 (flags & O_NONBLOCK) ? PPB_DONTWAIT : 276 (PPB_WAIT | PPB_INTR)))) 277 return (res); 278 279 ppi->ppi_flags |= HAVE_PPBUS; 280 } 281 ppi->ppi_count += 1; 282 283 return (0); 284 } 285 286 static int 287 ppiclose(dev_t dev, int flags, int fmt, struct proc *p) 288 { 289 u_int unit = minor(dev); 290 struct ppi_data *ppi = ppidata[unit]; 291 292 ppi->ppi_count --; 293 if (!ppi->ppi_count) { 294 295 #ifdef PERIPH_1284 296 switch (ppi->ppi_dev.ppb->state) { 297 case PPB_PERIPHERAL_IDLE: 298 ppb_peripheral_terminate(&ppi->ppi_dev, 0); 299 break; 300 case PPB_REVERSE_IDLE: 301 case PPB_EPP_IDLE: 302 case PPB_ECP_FORWARD_IDLE: 303 default: 304 ppb_1284_terminate(&ppi->ppi_dev); 305 break; 306 } 307 #endif /* PERIPH_1284 */ 308 309 ppb_release_bus(&ppi->ppi_dev); 310 ppi->ppi_flags &= ~HAVE_PPBUS; 311 } 312 313 return (0); 314 } 315 316 /* 317 * ppiread() 318 * 319 * IEEE1284 compliant read. 320 * 321 * First, try negociation to BYTE then NIBBLE mode 322 * If no data is available, wait for it otherwise transfer as much as possible 323 */ 324 static int 325 ppiread(dev_t dev, struct uio *uio, int ioflag) 326 { 327 #ifdef PERIPH_1284 328 u_int unit = minor(dev); 329 struct ppi_data *ppi = ppidata[unit]; 330 int len, error = 0; 331 332 switch (ppi->ppi_dev.ppb->state) { 333 case PPB_PERIPHERAL_IDLE: 334 ppb_peripheral_terminate(&ppi->ppi_dev, 0); 335 /* fall throught */ 336 337 case PPB_FORWARD_IDLE: 338 /* if can't negociate NIBBLE mode then try BYTE mode, 339 * the peripheral may be a computer 340 */ 341 if ((ppb_1284_negociate(&ppi->ppi_dev, 342 ppi->ppi_mode = PPB_NIBBLE, 0))) { 343 344 /* XXX Wait 2 seconds to let the remote host some 345 * time to terminate its interrupt 346 */ 347 tsleep(ppi, PPBPRI, "ppiread", 2*hz); 348 349 if ((error = ppb_1284_negociate(&ppi->ppi_dev, 350 ppi->ppi_mode = PPB_BYTE, 0))) 351 return (error); 352 } 353 break; 354 355 case PPB_REVERSE_IDLE: 356 case PPB_EPP_IDLE: 357 case PPB_ECP_FORWARD_IDLE: 358 default: 359 break; 360 } 361 362 #ifdef DEBUG_1284 363 printf("N"); 364 #endif 365 /* read data */ 366 len = 0; 367 while (uio->uio_resid) { 368 if ((error = ppb_1284_read(&ppi->ppi_dev, ppi->ppi_mode, 369 ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid), 370 &len))) { 371 goto error; 372 } 373 374 if (!len) 375 goto error; /* no more data */ 376 377 #ifdef DEBUG_1284 378 printf("d"); 379 #endif 380 if ((error = uiomove(ppi->ppi_buffer, len, uio))) 381 goto error; 382 } 383 384 error: 385 386 #else /* PERIPH_1284 */ 387 int error = ENODEV; 388 #endif 389 390 return (error); 391 } 392 393 /* 394 * ppiwrite() 395 * 396 * IEEE1284 compliant write 397 * 398 * Actually, this is the peripheral side of a remote IEEE1284 read 399 * 400 * The first part of the negociation (IEEE1284 device detection) is 401 * done at interrupt level, then the remaining is done by the writing 402 * process 403 * 404 * Once negociation done, transfer data 405 */ 406 static int 407 ppiwrite(dev_t dev, struct uio *uio, int ioflag) 408 { 409 #ifdef PERIPH_1284 410 u_int unit = minor(dev); 411 struct ppi_data *ppi = ppidata[unit]; 412 struct ppb_data *ppb = ppi->ppi_dev.ppb; 413 int len, error = 0, sent; 414 415 #if 0 416 int ret; 417 418 #define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR) 419 #define LENGTH MS_PARAM(0, 1, MS_TYP_INT) 420 421 struct ppb_microseq msq[] = { 422 { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } }, 423 MS_RET(0) 424 }; 425 426 /* negociate ECP mode */ 427 if (ppb_1284_negociate(&ppi->ppi_dev, PPB_ECP, 0)) { 428 printf("ppiwrite: ECP negociation failed\n"); 429 } 430 431 while (!error && (len = min(uio->uio_resid, BUFSIZE))) { 432 uiomove(ppi->ppi_buffer, len, uio); 433 434 ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len); 435 436 error = ppb_MS_microseq(&ppi->ppi_dev, msq, &ret); 437 } 438 #endif 439 440 /* we have to be peripheral to be able to send data, so 441 * wait for the appropriate state 442 */ 443 if (ppb->state < PPB_PERIPHERAL_NEGOCIATION) 444 ppb_1284_terminate(&ppi->ppi_dev); 445 446 while (ppb->state != PPB_PERIPHERAL_IDLE) { 447 /* XXX should check a variable before sleeping */ 448 #ifdef DEBUG_1284 449 printf("s"); 450 #endif 451 452 ppi_enable_intr(ppi); 453 454 /* sleep until IEEE1284 negociation starts */ 455 error = tsleep(ppi, PCATCH | PPBPRI, "ppiwrite", 0); 456 457 switch (error) { 458 case 0: 459 /* negociate peripheral side with BYTE mode */ 460 ppb_peripheral_negociate(&ppi->ppi_dev, PPB_BYTE, 0); 461 break; 462 case EWOULDBLOCK: 463 break; 464 default: 465 goto error; 466 } 467 } 468 #ifdef DEBUG_1284 469 printf("N"); 470 #endif 471 472 /* negociation done, write bytes to master host */ 473 while ((len = min(uio->uio_resid, BUFSIZE)) != 0) { 474 uiomove(ppi->ppi_buffer, len, uio); 475 if ((error = byte_peripheral_write(&ppi->ppi_dev, 476 ppi->ppi_buffer, len, &sent))) 477 goto error; 478 #ifdef DEBUG_1284 479 printf("d"); 480 #endif 481 } 482 483 error: 484 485 #else /* PERIPH_1284 */ 486 int error = ENODEV; 487 #endif 488 489 return (error); 490 } 491 492 static int 493 ppiioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct proc *p) 494 { 495 u_int unit = minor(dev); 496 struct ppi_data *ppi = ppidata[unit]; 497 int error = 0; 498 u_int8_t *val = (u_int8_t *)data; 499 500 switch (cmd) { 501 502 case PPIGDATA: /* get data register */ 503 *val = ppb_rdtr(&ppi->ppi_dev); 504 break; 505 case PPIGSTATUS: /* get status bits */ 506 *val = ppb_rstr(&ppi->ppi_dev); 507 break; 508 case PPIGCTRL: /* get control bits */ 509 *val = ppb_rctr(&ppi->ppi_dev); 510 break; 511 case PPIGEPPD: /* get EPP data bits */ 512 *val = ppb_repp_D(&ppi->ppi_dev); 513 break; 514 case PPIGECR: /* get ECP bits */ 515 *val = ppb_recr(&ppi->ppi_dev); 516 break; 517 case PPIGFIFO: /* read FIFO */ 518 *val = ppb_rfifo(&ppi->ppi_dev); 519 break; 520 521 case PPISDATA: /* set data register */ 522 ppb_wdtr(&ppi->ppi_dev, *val); 523 break; 524 case PPISSTATUS: /* set status bits */ 525 ppb_wstr(&ppi->ppi_dev, *val); 526 break; 527 case PPISCTRL: /* set control bits */ 528 ppb_wctr(&ppi->ppi_dev, *val); 529 break; 530 case PPISEPPD: /* set EPP data bits */ 531 ppb_wepp_D(&ppi->ppi_dev, *val); 532 break; 533 case PPISECR: /* set ECP bits */ 534 ppb_wecr(&ppi->ppi_dev, *val); 535 break; 536 case PPISFIFO: /* write FIFO */ 537 ppb_wfifo(&ppi->ppi_dev, *val); 538 break; 539 540 case PPIGEPPA: /* get EPP address bits */ 541 *val = ppb_repp_A(&ppi->ppi_dev); 542 break; 543 case PPISEPPA: /* set EPP address bits */ 544 ppb_wepp_A(&ppi->ppi_dev, *val); 545 break; 546 default: 547 error = ENOTTY; 548 break; 549 } 550 551 return (error); 552 } 553 554 #endif /* NPPI */ 555