1 /*- 2 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 * 28 */ 29 #include "opt_ppb_1284.h" 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/module.h> 34 #include <sys/bus.h> 35 #include <sys/conf.h> 36 #include <sys/kernel.h> 37 #include <sys/uio.h> 38 #include <sys/fcntl.h> 39 40 #include <machine/clock.h> 41 #include <machine/bus.h> 42 #include <machine/resource.h> 43 #include <sys/rman.h> 44 45 #include <dev/ppbus/ppbconf.h> 46 #include <dev/ppbus/ppb_msq.h> 47 48 #ifdef PERIPH_1284 49 #include <dev/ppbus/ppb_1284.h> 50 #endif 51 52 #include <dev/ppbus/ppi.h> 53 54 #include "ppbus_if.h" 55 56 #include <dev/ppbus/ppbio.h> 57 58 #define BUFSIZE 512 59 60 struct ppi_data { 61 62 int ppi_unit; 63 int ppi_flags; 64 #define HAVE_PPBUS (1<<0) 65 #define HAD_PPBUS (1<<1) 66 67 int ppi_count; 68 int ppi_mode; /* IEEE1284 mode */ 69 char ppi_buffer[BUFSIZE]; 70 71 #ifdef PERIPH_1284 72 struct resource *intr_resource; /* interrupt resource */ 73 void *intr_cookie; /* interrupt registration cookie */ 74 #endif /* PERIPH_1284 */ 75 }; 76 77 #define DEVTOSOFTC(dev) \ 78 ((struct ppi_data *)device_get_softc(dev)) 79 #define UNITOSOFTC(unit) \ 80 ((struct ppi_data *)devclass_get_softc(ppi_devclass, (unit))) 81 #define UNITODEVICE(unit) \ 82 (devclass_get_device(ppi_devclass, (unit))) 83 84 static devclass_t ppi_devclass; 85 86 static d_open_t ppiopen; 87 static d_close_t ppiclose; 88 static d_ioctl_t ppiioctl; 89 static d_write_t ppiwrite; 90 static d_read_t ppiread; 91 92 #define CDEV_MAJOR 82 93 static struct cdevsw ppi_cdevsw = { 94 /* open */ ppiopen, 95 /* close */ ppiclose, 96 /* read */ ppiread, 97 /* write */ ppiwrite, 98 /* ioctl */ ppiioctl, 99 /* poll */ nopoll, 100 /* mmap */ nommap, 101 /* strategy */ nostrategy, 102 /* name */ "ppi", 103 /* maj */ CDEV_MAJOR, 104 /* dump */ nodump, 105 /* psize */ nopsize, 106 /* flags */ 0, 107 /* bmaj */ -1 108 }; 109 110 #ifdef PERIPH_1284 111 112 static void 113 ppi_enable_intr(device_t ppidev) 114 { 115 char r; 116 device_t ppbus = device_get_parent(ppidev); 117 118 r = ppb_rctr(ppbus); 119 ppb_wctr(ppbus, r | IRQENABLE); 120 121 return; 122 } 123 124 static void 125 ppi_disable_intr(device_t ppidev) 126 { 127 char r; 128 device_t ppbus = device_get_parent(ppidev); 129 130 r = ppb_rctr(ppbus); 131 ppb_wctr(ppbus, r & ~IRQENABLE); 132 133 return; 134 } 135 136 #endif /* PERIPH_1284 */ 137 138 static void 139 ppi_identify(driver_t *driver, device_t parent) 140 { 141 142 BUS_ADD_CHILD(parent, 0, "ppi", 0); 143 } 144 145 /* 146 * ppi_probe() 147 */ 148 static int 149 ppi_probe(device_t dev) 150 { 151 struct ppi_data *ppi; 152 153 /* probe is always ok */ 154 device_set_desc(dev, "Parallel I/O"); 155 156 ppi = DEVTOSOFTC(dev); 157 bzero(ppi, sizeof(struct ppi_data)); 158 159 return (0); 160 } 161 162 /* 163 * ppi_attach() 164 */ 165 static int 166 ppi_attach(device_t dev) 167 { 168 #ifdef PERIPH_1284 169 uintptr_t irq; 170 int zero = 0; 171 #endif /* PERIPH_1284 */ 172 struct ppi_data *ppi = DEVTOSOFTC(dev); 173 174 #ifdef PERIPH_1284 175 /* retrive the irq */ 176 BUS_READ_IVAR(device_get_parent(dev), dev, PPBUS_IVAR_IRQ, &irq); 177 178 /* declare our interrupt handler */ 179 ppi->intr_resource = bus_alloc_resource(dev, SYS_RES_IRQ, 180 &zero, irq, irq, 1, RF_ACTIVE); 181 #endif /* PERIPH_1284 */ 182 183 make_dev(&ppi_cdevsw, device_get_unit(dev), /* XXX cleanup */ 184 UID_ROOT, GID_WHEEL, 185 0600, "ppi%d", device_get_unit(dev)); 186 187 return (0); 188 } 189 190 #ifdef PERIPH_1284 191 /* 192 * Cable 193 * ----- 194 * 195 * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks: 196 * 197 * nStrobe <-> nAck 1 <-> 10 198 * nAutofd <-> Busy 11 <-> 14 199 * nSelectin <-> Select 17 <-> 13 200 * nInit <-> nFault 15 <-> 16 201 * 202 */ 203 static void 204 ppiintr(void *arg) 205 { 206 device_t ppidev = (device_t)arg; 207 device_t ppbus = device_get_parent(ppidev); 208 struct ppi_data *ppi = DEVTOSOFTC(ppidev); 209 210 ppi_disable_intr(ppidev); 211 212 switch (ppb_1284_get_state(ppbus)) { 213 214 /* accept IEEE1284 negociation then wakeup an waiting process to 215 * continue negociation at process level */ 216 case PPB_FORWARD_IDLE: 217 /* Event 1 */ 218 if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) == 219 (SELECT | nBUSY)) { 220 /* IEEE1284 negociation */ 221 #ifdef DEBUG_1284 222 printf("N"); 223 #endif 224 225 /* Event 2 - prepare for reading the ext. value */ 226 ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN); 227 228 ppb_1284_set_state(ppbus, PPB_NEGOCIATION); 229 230 } else { 231 #ifdef DEBUG_1284 232 printf("0x%x", ppb_rstr(ppbus)); 233 #endif 234 ppb_peripheral_terminate(ppbus, PPB_DONTWAIT); 235 break; 236 } 237 238 /* wake up any process waiting for negociation from 239 * remote master host */ 240 241 /* XXX should set a variable to warn the process about 242 * the interrupt */ 243 244 wakeup(ppi); 245 break; 246 default: 247 #ifdef DEBUG_1284 248 printf("?%d", ppb_1284_get_state(ppbus)); 249 #endif 250 ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE); 251 ppb_set_mode(ppbus, PPB_COMPATIBLE); 252 break; 253 } 254 255 ppi_enable_intr(ppidev); 256 257 return; 258 } 259 #endif /* PERIPH_1284 */ 260 261 static int 262 ppiopen(dev_t dev, int flags, int fmt, struct proc *p) 263 { 264 u_int unit = minor(dev); 265 struct ppi_data *ppi = UNITOSOFTC(unit); 266 device_t ppidev = UNITODEVICE(unit); 267 device_t ppbus = device_get_parent(ppidev); 268 int res; 269 270 if (!ppi) 271 return (ENXIO); 272 273 if (!(ppi->ppi_flags & HAVE_PPBUS)) { 274 if ((res = ppb_request_bus(ppbus, ppidev, 275 (flags & O_NONBLOCK) ? PPB_DONTWAIT : 276 (PPB_WAIT | PPB_INTR)))) 277 return (res); 278 279 ppi->ppi_flags |= HAVE_PPBUS; 280 281 #ifdef PERIPH_1284 282 if (ppi->intr_resource) { 283 /* register our interrupt handler */ 284 BUS_SETUP_INTR(device_get_parent(ppidev), ppidev, ppi->intr_resource, 285 INTR_TYPE_TTY, ppiintr, dev, &ppi->intr_cookie); 286 } 287 #endif /* PERIPH_1284 */ 288 } 289 ppi->ppi_count += 1; 290 291 return (0); 292 } 293 294 static int 295 ppiclose(dev_t dev, int flags, int fmt, struct proc *p) 296 { 297 u_int unit = minor(dev); 298 struct ppi_data *ppi = UNITOSOFTC(unit); 299 device_t ppidev = UNITODEVICE(unit); 300 device_t ppbus = device_get_parent(ppidev); 301 302 ppi->ppi_count --; 303 if (!ppi->ppi_count) { 304 305 #ifdef PERIPH_1284 306 switch (ppb_1284_get_state(ppbus)) { 307 case PPB_PERIPHERAL_IDLE: 308 ppb_peripheral_terminate(ppbus, 0); 309 break; 310 case PPB_REVERSE_IDLE: 311 case PPB_EPP_IDLE: 312 case PPB_ECP_FORWARD_IDLE: 313 default: 314 ppb_1284_terminate(ppbus); 315 break; 316 } 317 #endif /* PERIPH_1284 */ 318 319 /* unregistration of interrupt forced by release */ 320 ppb_release_bus(ppbus, ppidev); 321 322 ppi->ppi_flags &= ~HAVE_PPBUS; 323 } 324 325 return (0); 326 } 327 328 /* 329 * ppiread() 330 * 331 * IEEE1284 compliant read. 332 * 333 * First, try negociation to BYTE then NIBBLE mode 334 * If no data is available, wait for it otherwise transfer as much as possible 335 */ 336 static int 337 ppiread(dev_t dev, struct uio *uio, int ioflag) 338 { 339 #ifdef PERIPH_1284 340 u_int unit = minor(dev); 341 struct ppi_data *ppi = UNITOSOFTC(unit); 342 device_t ppidev = UNITODEVICE(unit); 343 device_t ppbus = device_get_parent(ppidev); 344 int len, error = 0; 345 346 switch (ppb_1284_get_state(ppbus)) { 347 case PPB_PERIPHERAL_IDLE: 348 ppb_peripheral_terminate(ppbus, 0); 349 /* fall throught */ 350 351 case PPB_FORWARD_IDLE: 352 /* if can't negociate NIBBLE mode then try BYTE mode, 353 * the peripheral may be a computer 354 */ 355 if ((ppb_1284_negociate(ppbus, 356 ppi->ppi_mode = PPB_NIBBLE, 0))) { 357 358 /* XXX Wait 2 seconds to let the remote host some 359 * time to terminate its interrupt 360 */ 361 tsleep(ppi, PPBPRI, "ppiread", 2*hz); 362 363 if ((error = ppb_1284_negociate(ppbus, 364 ppi->ppi_mode = PPB_BYTE, 0))) 365 return (error); 366 } 367 break; 368 369 case PPB_REVERSE_IDLE: 370 case PPB_EPP_IDLE: 371 case PPB_ECP_FORWARD_IDLE: 372 default: 373 break; 374 } 375 376 #ifdef DEBUG_1284 377 printf("N"); 378 #endif 379 /* read data */ 380 len = 0; 381 while (uio->uio_resid) { 382 if ((error = ppb_1284_read(ppbus, ppi->ppi_mode, 383 ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid), 384 &len))) { 385 goto error; 386 } 387 388 if (!len) 389 goto error; /* no more data */ 390 391 #ifdef DEBUG_1284 392 printf("d"); 393 #endif 394 if ((error = uiomove(ppi->ppi_buffer, len, uio))) 395 goto error; 396 } 397 398 error: 399 400 #else /* PERIPH_1284 */ 401 int error = ENODEV; 402 #endif 403 404 return (error); 405 } 406 407 /* 408 * ppiwrite() 409 * 410 * IEEE1284 compliant write 411 * 412 * Actually, this is the peripheral side of a remote IEEE1284 read 413 * 414 * The first part of the negociation (IEEE1284 device detection) is 415 * done at interrupt level, then the remaining is done by the writing 416 * process 417 * 418 * Once negociation done, transfer data 419 */ 420 static int 421 ppiwrite(dev_t dev, struct uio *uio, int ioflag) 422 { 423 #ifdef PERIPH_1284 424 u_int unit = minor(dev); 425 struct ppi_data *ppi = UNITOSOFTC(unit); 426 device_t ppidev = UNITODEVICE(unit); 427 device_t ppbus = device_get_parent(ppidev); 428 int len, error = 0, sent; 429 430 #if 0 431 int ret; 432 433 #define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR) 434 #define LENGTH MS_PARAM(0, 1, MS_TYP_INT) 435 436 struct ppb_microseq msq[] = { 437 { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } }, 438 MS_RET(0) 439 }; 440 441 /* negociate ECP mode */ 442 if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) { 443 printf("ppiwrite: ECP negociation failed\n"); 444 } 445 446 while (!error && (len = min(uio->uio_resid, BUFSIZE))) { 447 uiomove(ppi->ppi_buffer, len, uio); 448 449 ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len); 450 451 error = ppb_MS_microseq(ppbus, msq, &ret); 452 } 453 #endif 454 455 /* we have to be peripheral to be able to send data, so 456 * wait for the appropriate state 457 */ 458 if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION) 459 ppb_1284_terminate(ppbus); 460 461 while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) { 462 /* XXX should check a variable before sleeping */ 463 #ifdef DEBUG_1284 464 printf("s"); 465 #endif 466 467 ppi_enable_intr(ppidev); 468 469 /* sleep until IEEE1284 negociation starts */ 470 error = tsleep(ppi, PCATCH | PPBPRI, "ppiwrite", 0); 471 472 switch (error) { 473 case 0: 474 /* negociate peripheral side with BYTE mode */ 475 ppb_peripheral_negociate(ppbus, PPB_BYTE, 0); 476 break; 477 case EWOULDBLOCK: 478 break; 479 default: 480 goto error; 481 } 482 } 483 #ifdef DEBUG_1284 484 printf("N"); 485 #endif 486 487 /* negociation done, write bytes to master host */ 488 while ((len = min(uio->uio_resid, BUFSIZE)) != 0) { 489 uiomove(ppi->ppi_buffer, len, uio); 490 if ((error = byte_peripheral_write(ppbus, 491 ppi->ppi_buffer, len, &sent))) 492 goto error; 493 #ifdef DEBUG_1284 494 printf("d"); 495 #endif 496 } 497 498 error: 499 500 #else /* PERIPH_1284 */ 501 int error = ENODEV; 502 #endif 503 504 return (error); 505 } 506 507 static int 508 ppiioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct proc *p) 509 { 510 u_int unit = minor(dev); 511 device_t ppidev = UNITODEVICE(unit); 512 device_t ppbus = device_get_parent(ppidev); 513 int error = 0; 514 u_int8_t *val = (u_int8_t *)data; 515 516 switch (cmd) { 517 518 case PPIGDATA: /* get data register */ 519 *val = ppb_rdtr(ppbus); 520 break; 521 case PPIGSTATUS: /* get status bits */ 522 *val = ppb_rstr(ppbus); 523 break; 524 case PPIGCTRL: /* get control bits */ 525 *val = ppb_rctr(ppbus); 526 break; 527 case PPIGEPPD: /* get EPP data bits */ 528 *val = ppb_repp_D(ppbus); 529 break; 530 case PPIGECR: /* get ECP bits */ 531 *val = ppb_recr(ppbus); 532 break; 533 case PPIGFIFO: /* read FIFO */ 534 *val = ppb_rfifo(ppbus); 535 break; 536 case PPISDATA: /* set data register */ 537 ppb_wdtr(ppbus, *val); 538 break; 539 case PPISSTATUS: /* set status bits */ 540 ppb_wstr(ppbus, *val); 541 break; 542 case PPISCTRL: /* set control bits */ 543 ppb_wctr(ppbus, *val); 544 break; 545 case PPISEPPD: /* set EPP data bits */ 546 ppb_wepp_D(ppbus, *val); 547 break; 548 case PPISECR: /* set ECP bits */ 549 ppb_wecr(ppbus, *val); 550 break; 551 case PPISFIFO: /* write FIFO */ 552 ppb_wfifo(ppbus, *val); 553 break; 554 case PPIGEPPA: /* get EPP address bits */ 555 *val = ppb_repp_A(ppbus); 556 break; 557 case PPISEPPA: /* set EPP address bits */ 558 ppb_wepp_A(ppbus, *val); 559 break; 560 default: 561 error = ENOTTY; 562 break; 563 } 564 565 return (error); 566 } 567 568 static device_method_t ppi_methods[] = { 569 /* device interface */ 570 DEVMETHOD(device_identify, ppi_identify), 571 DEVMETHOD(device_probe, ppi_probe), 572 DEVMETHOD(device_attach, ppi_attach), 573 574 { 0, 0 } 575 }; 576 577 static driver_t ppi_driver = { 578 "ppi", 579 ppi_methods, 580 sizeof(struct ppi_data), 581 }; 582 DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0); 583