1 /* 2 * Copyright (c) 2006 Maxim Sobolev <sobomax@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 16 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 17 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 22 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 23 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24 * POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/module.h> 32 #include <sys/bus.h> 33 #include <sys/conf.h> 34 #include <sys/kernel.h> 35 #include <sys/uio.h> 36 37 #include <dev/ofw/openfirm.h> 38 #include <dev/ofw/ofw_pci.h> 39 40 #include <machine/bus.h> 41 #include <machine/md_var.h> 42 #include <machine/nexusvar.h> 43 #include <machine/resource.h> 44 45 #include <sys/rman.h> 46 47 #include <powerpc/ofw/ofw_pci.h> 48 #include <dev/powermac_nvram/powermac_nvramvar.h> 49 50 #include <vm/vm.h> 51 #include <vm/pmap.h> 52 53 /* 54 * Device interface. 55 */ 56 static int powermac_nvram_probe(device_t); 57 static int powermac_nvram_attach(device_t); 58 static int powermac_nvram_detach(device_t); 59 60 /* Helper functions */ 61 static int powermac_nvram_check(void *data); 62 static int chrp_checksum(int sum, uint8_t *, uint8_t *); 63 static uint32_t adler_checksum(uint8_t *, int); 64 static int erase_bank(device_t, uint8_t *); 65 static int write_bank(device_t, uint8_t *, uint8_t *); 66 67 /* 68 * Driver methods. 69 */ 70 static device_method_t powermac_nvram_methods[] = { 71 /* Device interface */ 72 DEVMETHOD(device_probe, powermac_nvram_probe), 73 DEVMETHOD(device_attach, powermac_nvram_attach), 74 DEVMETHOD(device_detach, powermac_nvram_detach), 75 76 { 0, 0 } 77 }; 78 79 static driver_t powermac_nvram_driver = { 80 "powermac_nvram", 81 powermac_nvram_methods, 82 sizeof(struct powermac_nvram_softc) 83 }; 84 85 static devclass_t powermac_nvram_devclass; 86 87 DRIVER_MODULE(powermac_nvram, nexus, powermac_nvram_driver, powermac_nvram_devclass, 0, 0); 88 89 /* 90 * Cdev methods. 91 */ 92 93 #define NVRAM_UNIT(dev) minor(dev) 94 #define NVRAM_SOFTC(unit) ((struct powermac_nvram_softc *) \ 95 devclass_get_softc(powermac_nvram_devclass, unit)) 96 97 static d_open_t powermac_nvram_open; 98 static d_close_t powermac_nvram_close; 99 static d_read_t powermac_nvram_read; 100 static d_write_t powermac_nvram_write; 101 102 static struct cdevsw powermac_nvram_cdevsw = { 103 .d_version = D_VERSION, 104 .d_flags = D_NEEDGIANT, 105 .d_open = powermac_nvram_open, 106 .d_close = powermac_nvram_close, 107 .d_read = powermac_nvram_read, 108 .d_write = powermac_nvram_write, 109 .d_name = "powermac_nvram", 110 }; 111 112 static int 113 powermac_nvram_probe(device_t dev) 114 { 115 char *type, *compatible; 116 117 type = nexus_get_device_type(dev); 118 compatible = nexus_get_compatible(dev); 119 120 if (type == NULL || compatible == NULL) 121 return ENXIO; 122 123 if (strcmp(type, "nvram") != 0 || strcmp(compatible, "amd-0137") != 0) 124 return ENXIO; 125 126 device_set_desc(dev, "Apple NVRAM"); 127 return 0; 128 } 129 130 static int 131 powermac_nvram_attach(device_t dev) 132 { 133 struct powermac_nvram_softc *sc; 134 phandle_t node; 135 u_int32_t reg[2]; 136 int gen0, gen1; 137 138 node = nexus_get_node(dev); 139 sc = device_get_softc(dev); 140 141 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8) 142 return ENXIO; 143 144 sc->sc_dev = dev; 145 sc->sc_node = node; 146 147 sc->sc_bank0 = (vm_offset_t)pmap_mapdev(reg[0], NVRAM_SIZE * 2); 148 sc->sc_bank1 = sc->sc_bank0 + NVRAM_SIZE; 149 150 gen0 = powermac_nvram_check((void *)sc->sc_bank0); 151 gen1 = powermac_nvram_check((void *)sc->sc_bank1); 152 153 if (gen0 == -1 && gen1 == -1) { 154 if ((void *)sc->sc_bank0 != NULL) 155 pmap_unmapdev(sc->sc_bank0, NVRAM_SIZE * 2); 156 device_printf(dev, "both banks appear to be corrupt\n"); 157 return ENXIO; 158 } 159 device_printf(dev, "bank0 generation %d, bank1 generation %d\n", 160 gen0, gen1); 161 162 sc->sc_bank = (gen0 > gen1) ? sc->sc_bank0 : sc->sc_bank1; 163 bcopy((void *)sc->sc_bank, (void *)sc->sc_data, NVRAM_SIZE); 164 165 sc->sc_cdev = make_dev(&powermac_nvram_cdevsw, 0, 0, 0, 0600, 166 "powermac_nvram"); 167 168 return 0; 169 } 170 171 static int 172 powermac_nvram_detach(device_t dev) 173 { 174 struct powermac_nvram_softc *sc; 175 176 sc = device_get_softc(dev); 177 178 if ((void *)sc->sc_bank0 != NULL) 179 pmap_unmapdev(sc->sc_bank0, NVRAM_SIZE * 2); 180 181 if (sc->sc_cdev != NULL) 182 destroy_dev(sc->sc_cdev); 183 184 return 0; 185 } 186 187 static int 188 powermac_nvram_open(struct cdev *dev, int flags, int fmt, struct thread *td) 189 { 190 struct powermac_nvram_softc *sc; 191 192 sc = NVRAM_SOFTC(NVRAM_UNIT(dev)); 193 if (sc->sc_isopen) 194 return EBUSY; 195 sc->sc_isopen = 1; 196 sc->sc_rpos = sc->sc_wpos = 0; 197 return 0; 198 } 199 200 static int 201 powermac_nvram_close(struct cdev *dev, int fflag, int devtype, struct thread *td) 202 { 203 struct powermac_nvram_softc *sc; 204 struct core99_header *header; 205 vm_offset_t bank; 206 207 sc = NVRAM_SOFTC(NVRAM_UNIT(dev)); 208 209 if (sc->sc_wpos != sizeof(sc->sc_data)) { 210 /* Short write, restore in-memory copy */ 211 bcopy((void *)sc->sc_bank, (void *)sc->sc_data, NVRAM_SIZE); 212 sc->sc_isopen = 0; 213 return 0; 214 } 215 216 header = (struct core99_header *)sc->sc_data; 217 218 header->generation = ((struct core99_header *)sc->sc_bank)->generation; 219 header->generation++; 220 header->chrp_header.signature = CORE99_SIGNATURE; 221 222 header->adler_checksum = 223 adler_checksum((uint8_t *)&(header->generation), 224 NVRAM_SIZE - offsetof(struct core99_header, generation)); 225 header->chrp_header.chrp_checksum = chrp_checksum(header->chrp_header.signature, 226 (uint8_t *)&(header->chrp_header.length), 227 (uint8_t *)&(header->adler_checksum)); 228 229 bank = (sc->sc_bank == sc->sc_bank0) ? sc->sc_bank1 : sc->sc_bank0; 230 if (erase_bank(sc->sc_dev, (uint8_t *)bank) != 0 || 231 write_bank(sc->sc_dev, (uint8_t *)bank, sc->sc_data) != 0) { 232 sc->sc_isopen = 0; 233 return ENOSPC; 234 } 235 sc->sc_bank = bank; 236 sc->sc_isopen = 0; 237 return 0; 238 } 239 240 static int 241 powermac_nvram_read(struct cdev *dev, struct uio *uio, int ioflag) 242 { 243 int rv, amnt, data_available; 244 struct powermac_nvram_softc *sc; 245 246 sc = NVRAM_SOFTC(NVRAM_UNIT(dev)); 247 248 rv = 0; 249 while (uio->uio_resid > 0) { 250 data_available = sizeof(sc->sc_data) - sc->sc_rpos; 251 if (data_available > 0) { 252 amnt = MIN(uio->uio_resid, data_available); 253 rv = uiomove((void *)(sc->sc_data + sc->sc_rpos), 254 amnt, uio); 255 if (rv != 0) 256 break; 257 sc->sc_rpos += amnt; 258 } else { 259 break; 260 } 261 } 262 return rv; 263 } 264 265 static int 266 powermac_nvram_write(struct cdev *dev, struct uio *uio, int ioflag) 267 { 268 int rv, amnt, data_available; 269 struct powermac_nvram_softc *sc; 270 271 sc = NVRAM_SOFTC(NVRAM_UNIT(dev)); 272 273 if (sc->sc_wpos >= sizeof(sc->sc_data)) 274 return EINVAL; 275 276 rv = 0; 277 while (uio->uio_resid > 0) { 278 data_available = sizeof(sc->sc_data) - sc->sc_wpos; 279 if (data_available > 0) { 280 amnt = MIN(uio->uio_resid, data_available); 281 rv = uiomove((void *)(sc->sc_data + sc->sc_wpos), 282 amnt, uio); 283 if (rv != 0) 284 break; 285 sc->sc_wpos += amnt; 286 } else { 287 break; 288 } 289 } 290 return rv; 291 } 292 293 static int 294 powermac_nvram_check(void *data) 295 { 296 struct core99_header *header; 297 298 header = (struct core99_header *)data; 299 300 if (header->chrp_header.signature != CORE99_SIGNATURE) 301 return -1; 302 if (header->chrp_header.chrp_checksum != 303 chrp_checksum(header->chrp_header.signature, 304 (uint8_t *)&(header->chrp_header.length), 305 (uint8_t *)&(header->adler_checksum))) 306 return -1; 307 if (header->adler_checksum != 308 adler_checksum((uint8_t *)&(header->generation), 309 NVRAM_SIZE - offsetof(struct core99_header, generation))) 310 return -1; 311 return header->generation; 312 } 313 314 static int 315 chrp_checksum(int sum, uint8_t *data, uint8_t *end) 316 { 317 318 for (; data < end; data++) 319 sum += data[0]; 320 while (sum > 0xff) 321 sum = (sum & 0xff) + (sum >> 8); 322 return sum; 323 } 324 325 static uint32_t 326 adler_checksum(uint8_t *data, int len) 327 { 328 uint32_t low, high; 329 int i; 330 331 low = 1; 332 high = 0; 333 for (i = 0; i < len; i++) { 334 if ((i % 5000) == 0) { 335 high %= 65521UL; 336 high %= 65521UL; 337 } 338 low += data[i]; 339 high += low; 340 } 341 low %= 65521UL; 342 high %= 65521UL; 343 344 return (high << 16) | low; 345 } 346 347 #define OUTB_DELAY(a, v) outb(a, v); DELAY(1); 348 349 static int 350 wait_operation_complete(uint8_t *bank) 351 { 352 int i; 353 354 for (i = 1000000; i != 0; i--) 355 if ((inb(bank) ^ inb(bank)) == 0) 356 return 0; 357 return -1; 358 } 359 360 static int 361 erase_bank(device_t dev, uint8_t *bank) 362 { 363 unsigned int i; 364 365 /* Unlock 1 */ 366 OUTB_DELAY(bank + 0x555, 0xaa); 367 /* Unlock 2 */ 368 OUTB_DELAY(bank + 0x2aa, 0x55); 369 370 /* Sector-Erase */ 371 OUTB_DELAY(bank + 0x555, 0x80); 372 OUTB_DELAY(bank + 0x555, 0xaa); 373 OUTB_DELAY(bank + 0x2aa, 0x55); 374 OUTB_DELAY(bank, 0x30); 375 376 if (wait_operation_complete(bank) != 0) { 377 device_printf(dev, "flash erase timeout\n"); 378 return -1; 379 } 380 381 /* Reset */ 382 OUTB_DELAY(bank, 0xf0); 383 384 for (i = 0; i < NVRAM_SIZE; i++) { 385 if (bank[i] != 0xff) { 386 device_printf(dev, "flash erase has failed\n"); 387 return -1; 388 } 389 } 390 return 0; 391 } 392 393 static int 394 write_bank(device_t dev, uint8_t *bank, uint8_t *data) 395 { 396 unsigned int i; 397 398 for (i = 0; i < NVRAM_SIZE; i++) { 399 /* Unlock 1 */ 400 OUTB_DELAY(bank + 0x555, 0xaa); 401 /* Unlock 2 */ 402 OUTB_DELAY(bank + 0x2aa, 0x55); 403 404 /* Write single word */ 405 OUTB_DELAY(bank + 0x555, 0xa0); 406 OUTB_DELAY(bank + i, data[i]); 407 if (wait_operation_complete(bank) != 0) { 408 device_printf(dev, "flash write timeout\n"); 409 return -1; 410 } 411 } 412 413 /* Reset */ 414 OUTB_DELAY(bank, 0xf0); 415 416 for (i = 0; i < NVRAM_SIZE; i++) { 417 if (bank[i] != data[i]) { 418 device_printf(dev, "flash write has failed\n"); 419 return -1; 420 } 421 } 422 return 0; 423 } 424