1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2005 John Baldwin <jhb@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 /* 30 * Simple driver for PCI VGA display devices. Drivers such as agp(4) and 31 * drm(4) should attach as children of this device. 32 * 33 * XXX: The vgapci name is a hack until we somehow merge the isa vga driver 34 * in or rename it. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/bus.h> 39 #include <sys/kernel.h> 40 #include <sys/module.h> 41 #include <sys/rman.h> 42 #include <sys/sysctl.h> 43 #include <sys/systm.h> 44 45 #if defined(__amd64__) || defined(__i386__) 46 #include <vm/vm.h> 47 #include <vm/pmap.h> 48 #endif 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 53 #include <compat/x86bios/x86bios.h> /* To re-POST the card. */ 54 55 struct vga_resource { 56 struct resource *vr_res; 57 int vr_refs; 58 }; 59 60 struct vga_pci_softc { 61 device_t vga_msi_child; /* Child driver using MSI. */ 62 struct vga_resource vga_bars[PCIR_MAX_BAR_0 + 1]; 63 struct vga_resource vga_bios; 64 }; 65 66 SYSCTL_DECL(_hw_pci); 67 68 static struct vga_resource *lookup_res(struct vga_pci_softc *sc, int rid); 69 static struct resource *vga_pci_alloc_resource(device_t dev, device_t child, 70 int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count, 71 u_int flags); 72 static int vga_pci_release_resource(device_t dev, device_t child, 73 struct resource *r); 74 75 int vga_pci_default_unit = -1; 76 SYSCTL_INT(_hw_pci, OID_AUTO, default_vgapci_unit, CTLFLAG_RDTUN, 77 &vga_pci_default_unit, -1, "Default VGA-compatible display"); 78 79 int 80 vga_pci_is_boot_display(device_t dev) 81 { 82 int unit; 83 device_t pcib; 84 uint16_t config; 85 86 /* Check that the given device is a video card */ 87 if ((pci_get_class(dev) != PCIC_DISPLAY && 88 (pci_get_class(dev) != PCIC_OLD || 89 pci_get_subclass(dev) != PCIS_OLD_VGA))) 90 return (0); 91 92 unit = device_get_unit(dev); 93 94 if (vga_pci_default_unit >= 0) { 95 /* 96 * The boot display device was determined by a previous 97 * call to this function, or the user forced it using 98 * the hw.pci.default_vgapci_unit tunable. 99 */ 100 return (vga_pci_default_unit == unit); 101 } 102 103 /* 104 * The primary video card used as a boot display must have the 105 * "I/O" and "Memory Address Space Decoding" bits set in its 106 * Command register. 107 * 108 * Furthermore, if the card is attached to a bridge, instead of 109 * the root PCI bus, the bridge must have the "VGA Enable" bit 110 * set in its Control register. 111 */ 112 113 pcib = device_get_parent(device_get_parent(dev)); 114 if (device_get_devclass(device_get_parent(pcib)) == 115 devclass_find("pci")) { 116 /* 117 * The parent bridge is a PCI-to-PCI bridge: check the 118 * value of the "VGA Enable" bit. 119 */ 120 config = pci_read_config(pcib, PCIR_BRIDGECTL_1, 2); 121 if ((config & PCIB_BCR_VGA_ENABLE) == 0) 122 return (0); 123 } 124 125 config = pci_read_config(dev, PCIR_COMMAND, 2); 126 if ((config & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) == 0) 127 return (0); 128 129 /* 130 * Disable interrupts until a chipset driver is loaded for 131 * this PCI device. Else unhandled display adapter interrupts 132 * might freeze the CPU. 133 */ 134 pci_write_config(dev, PCIR_COMMAND, config | PCIM_CMD_INTxDIS, 2); 135 136 /* This video card is the boot display: record its unit number. */ 137 vga_pci_default_unit = unit; 138 device_set_flags(dev, 1); 139 140 return (1); 141 } 142 143 static void 144 vga_pci_reset(device_t dev) 145 { 146 int ps; 147 /* 148 * FLR is unsupported on GPUs so attempt a power-management reset by cycling 149 * the device in/out of D3 state. 150 * PCI spec says we can only go into D3 state from D0 state. 151 * Transition from D[12] into D0 before going to D3 state. 152 */ 153 ps = pci_get_powerstate(dev); 154 if (ps != PCI_POWERSTATE_D0 && ps != PCI_POWERSTATE_D3) 155 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 156 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D3) 157 pci_set_powerstate(dev, PCI_POWERSTATE_D3); 158 pci_set_powerstate(dev, ps); 159 } 160 161 void * 162 vga_pci_map_bios(device_t dev, size_t *size) 163 { 164 struct vga_resource *vr; 165 struct resource *res; 166 device_t pcib; 167 uint32_t rom_addr; 168 uint16_t config; 169 volatile unsigned char *bios; 170 int i, rid, found; 171 172 #if defined(__amd64__) || defined(__i386__) 173 if (vga_pci_is_boot_display(dev)) { 174 /* 175 * On x86, the System BIOS copy the default display 176 * device's Video BIOS at a fixed location in system 177 * memory (0xC0000, 128 kBytes long) at boot time. 178 * 179 * We use this copy for the default boot device, because 180 * the original ROM may not be valid after boot. 181 */ 182 183 *size = VGA_PCI_BIOS_SHADOW_SIZE; 184 return (pmap_mapbios(VGA_PCI_BIOS_SHADOW_ADDR, *size)); 185 } 186 #endif 187 188 pcib = device_get_parent(device_get_parent(dev)); 189 if (device_get_devclass(device_get_parent(pcib)) == 190 devclass_find("pci")) { 191 /* 192 * The parent bridge is a PCI-to-PCI bridge: check the 193 * value of the "VGA Enable" bit. 194 */ 195 config = pci_read_config(pcib, PCIR_BRIDGECTL_1, 2); 196 if ((config & PCIB_BCR_VGA_ENABLE) == 0) { 197 config |= PCIB_BCR_VGA_ENABLE; 198 pci_write_config(pcib, PCIR_BRIDGECTL_1, config, 2); 199 } 200 } 201 202 switch(pci_read_config(dev, PCIR_HDRTYPE, 1)) { 203 case PCIM_HDRTYPE_BRIDGE: 204 rid = PCIR_BIOS_1; 205 break; 206 case PCIM_HDRTYPE_CARDBUS: 207 rid = 0; 208 break; 209 default: 210 rid = PCIR_BIOS; 211 break; 212 } 213 if (rid == 0) 214 return (NULL); 215 res = vga_pci_alloc_resource(dev, NULL, SYS_RES_MEMORY, &rid, 0, 216 ~0, 1, RF_ACTIVE); 217 218 if (res == NULL) { 219 device_printf(dev, "vga_pci_alloc_resource failed\n"); 220 return (NULL); 221 } 222 bios = rman_get_virtual(res); 223 *size = rman_get_size(res); 224 for (found = i = 0; i < hz; i++) { 225 found = (bios[0] == 0x55 && bios[1] == 0xaa); 226 if (found) 227 break; 228 pause("vgabios", 1); 229 } 230 if (found) 231 return (__DEVOLATILE(void *, bios)); 232 if (bootverbose) 233 device_printf(dev, "initial ROM mapping failed -- resetting\n"); 234 235 /* 236 * Enable ROM decode 237 */ 238 vga_pci_reset(dev); 239 rom_addr = pci_read_config(dev, rid, 4); 240 rom_addr &= 0x7ff; 241 rom_addr |= rman_get_start(res) | 0x1; 242 pci_write_config(dev, rid, rom_addr, 4); 243 vr = lookup_res(device_get_softc(dev), rid); 244 vga_pci_release_resource(dev, NULL, vr->vr_res); 245 246 /* 247 * re-allocate 248 */ 249 res = vga_pci_alloc_resource(dev, NULL, SYS_RES_MEMORY, &rid, 0, 250 ~0, 1, RF_ACTIVE); 251 if (res == NULL) { 252 device_printf(dev, "vga_pci_alloc_resource failed\n"); 253 return (NULL); 254 } 255 bios = rman_get_virtual(res); 256 *size = rman_get_size(res); 257 for (found = i = 0; i < 3*hz; i++) { 258 found = (bios[0] == 0x55 && bios[1] == 0xaa); 259 if (found) 260 break; 261 pause("vgabios", 1); 262 } 263 if (found) 264 return (__DEVOLATILE(void *, bios)); 265 device_printf(dev, "ROM mapping failed\n"); 266 vr = lookup_res(device_get_softc(dev), rid); 267 vga_pci_release_resource(dev, NULL, vr->vr_res); 268 return (NULL); 269 } 270 271 void 272 vga_pci_unmap_bios(device_t dev, void *bios) 273 { 274 struct vga_resource *vr; 275 int rid; 276 277 if (bios == NULL) { 278 return; 279 } 280 281 #if defined(__amd64__) || defined(__i386__) 282 if (vga_pci_is_boot_display(dev)) { 283 /* We mapped the BIOS shadow copy located at 0xC0000. */ 284 pmap_unmapdev(bios, VGA_PCI_BIOS_SHADOW_SIZE); 285 286 return; 287 } 288 #endif 289 switch(pci_read_config(dev, PCIR_HDRTYPE, 1)) { 290 case PCIM_HDRTYPE_BRIDGE: 291 rid = PCIR_BIOS_1; 292 break; 293 case PCIM_HDRTYPE_CARDBUS: 294 rid = 0; 295 break; 296 default: 297 rid = PCIR_BIOS; 298 break; 299 } 300 if (rid == 0) 301 return; 302 /* 303 * Look up the PCIR_BIOS resource in our softc. It should match 304 * the address we returned previously. 305 */ 306 vr = lookup_res(device_get_softc(dev), rid); 307 KASSERT(vr->vr_res != NULL, ("vga_pci_unmap_bios: bios not mapped")); 308 KASSERT(rman_get_virtual(vr->vr_res) == bios, 309 ("vga_pci_unmap_bios: mismatch")); 310 vga_pci_release_resource(dev, NULL, vr->vr_res); 311 } 312 313 int 314 vga_pci_repost(device_t dev) 315 { 316 #if defined(__amd64__) || defined(__i386__) 317 x86regs_t regs; 318 319 if (!vga_pci_is_boot_display(dev)) 320 return (EINVAL); 321 322 if (x86bios_get_orm(VGA_PCI_BIOS_SHADOW_ADDR) == NULL) 323 return (ENOTSUP); 324 325 x86bios_init_regs(®s); 326 327 regs.R_AH = pci_get_bus(dev); 328 regs.R_AL = (pci_get_slot(dev) << 3) | (pci_get_function(dev) & 0x07); 329 regs.R_DL = 0x80; 330 331 device_printf(dev, "REPOSTing\n"); 332 x86bios_call(®s, X86BIOS_PHYSTOSEG(VGA_PCI_BIOS_SHADOW_ADDR + 3), 333 X86BIOS_PHYSTOOFF(VGA_PCI_BIOS_SHADOW_ADDR + 3)); 334 335 x86bios_get_intr(0x10); 336 337 return (0); 338 #else 339 return (ENOTSUP); 340 #endif 341 } 342 343 static int 344 vga_pci_probe(device_t dev) 345 { 346 347 switch (pci_get_class(dev)) { 348 case PCIC_DISPLAY: 349 break; 350 case PCIC_OLD: 351 if (pci_get_subclass(dev) != PCIS_OLD_VGA) 352 return (ENXIO); 353 break; 354 default: 355 return (ENXIO); 356 } 357 358 /* Probe default display. */ 359 vga_pci_is_boot_display(dev); 360 361 device_set_desc(dev, "VGA-compatible display"); 362 return (BUS_PROBE_GENERIC); 363 } 364 365 static int 366 vga_pci_attach(device_t dev) 367 { 368 369 bus_identify_children(dev); 370 371 /* Always create a drmn child for now to make it easier on drm. */ 372 device_add_child(dev, "drmn", DEVICE_UNIT_ANY); 373 bus_attach_children(dev); 374 375 if (vga_pci_is_boot_display(dev)) 376 device_printf(dev, "Boot video device\n"); 377 378 return (0); 379 } 380 381 static int 382 vga_pci_detach(device_t dev) 383 { 384 int error; 385 386 error = bus_generic_detach(dev); 387 if (error == 0) 388 error = device_delete_children(dev); 389 return (error); 390 } 391 392 /* Bus interface. */ 393 394 static int 395 vga_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 396 { 397 398 return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result)); 399 } 400 401 static int 402 vga_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 403 { 404 405 return (EINVAL); 406 } 407 408 static int 409 vga_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 410 int flags, driver_filter_t *filter, driver_intr_t *intr, void *arg, 411 void **cookiep) 412 { 413 return (BUS_SETUP_INTR(device_get_parent(dev), dev, irq, flags, 414 filter, intr, arg, cookiep)); 415 } 416 417 static int 418 vga_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 419 void *cookie) 420 { 421 return (BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie)); 422 } 423 424 static struct vga_resource * 425 lookup_res(struct vga_pci_softc *sc, int rid) 426 { 427 int bar; 428 429 if (rid == PCIR_BIOS) 430 return (&sc->vga_bios); 431 bar = PCI_RID2BAR(rid); 432 if (bar >= 0 && bar <= PCIR_MAX_BAR_0) 433 return (&sc->vga_bars[bar]); 434 return (NULL); 435 } 436 437 static struct resource * 438 vga_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 439 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 440 { 441 struct vga_resource *vr; 442 443 switch (type) { 444 case SYS_RES_MEMORY: 445 case SYS_RES_IOPORT: 446 /* 447 * For BARs, we cache the resource so that we only allocate it 448 * from the PCI bus once. 449 */ 450 vr = lookup_res(device_get_softc(dev), *rid); 451 if (vr == NULL) 452 return (NULL); 453 if (vr->vr_res == NULL) 454 vr->vr_res = bus_alloc_resource(dev, type, rid, start, 455 end, count, flags); 456 if (vr->vr_res != NULL) 457 vr->vr_refs++; 458 return (vr->vr_res); 459 } 460 return (bus_alloc_resource(dev, type, rid, start, end, count, flags)); 461 } 462 463 static int 464 vga_pci_release_resource(device_t dev, device_t child, struct resource *r) 465 { 466 struct vga_resource *vr; 467 int error; 468 469 switch (rman_get_type(r)) { 470 case SYS_RES_MEMORY: 471 case SYS_RES_IOPORT: 472 /* 473 * For BARs, we release the resource from the PCI bus 474 * when the last child reference goes away. 475 */ 476 vr = lookup_res(device_get_softc(dev), rman_get_rid(r)); 477 if (vr == NULL) 478 return (EINVAL); 479 if (vr->vr_res == NULL) 480 return (EINVAL); 481 KASSERT(vr->vr_res == r, ("vga_pci resource mismatch")); 482 if (vr->vr_refs > 1) { 483 vr->vr_refs--; 484 return (0); 485 } 486 KASSERT(vr->vr_refs > 0, 487 ("vga_pci resource reference count underflow")); 488 error = bus_release_resource(dev, r); 489 if (error == 0) { 490 vr->vr_res = NULL; 491 vr->vr_refs = 0; 492 } 493 return (error); 494 } 495 496 return (bus_release_resource(dev, r)); 497 } 498 499 /* PCI interface. */ 500 501 static uint32_t 502 vga_pci_read_config(device_t dev, device_t child, int reg, int width) 503 { 504 505 return (pci_read_config(dev, reg, width)); 506 } 507 508 static void 509 vga_pci_write_config(device_t dev, device_t child, int reg, 510 uint32_t val, int width) 511 { 512 513 pci_write_config(dev, reg, val, width); 514 } 515 516 static int 517 vga_pci_enable_busmaster(device_t dev, device_t child) 518 { 519 520 return (pci_enable_busmaster(dev)); 521 } 522 523 static int 524 vga_pci_disable_busmaster(device_t dev, device_t child) 525 { 526 527 return (pci_disable_busmaster(dev)); 528 } 529 530 static int 531 vga_pci_enable_io(device_t dev, device_t child, int space) 532 { 533 534 device_printf(dev, "child %s requested pci_enable_io\n", 535 device_get_nameunit(child)); 536 return (pci_enable_io(dev, space)); 537 } 538 539 static int 540 vga_pci_disable_io(device_t dev, device_t child, int space) 541 { 542 543 device_printf(dev, "child %s requested pci_disable_io\n", 544 device_get_nameunit(child)); 545 return (pci_disable_io(dev, space)); 546 } 547 548 static int 549 vga_pci_get_vpd_ident(device_t dev, device_t child, const char **identptr) 550 { 551 552 return (pci_get_vpd_ident(dev, identptr)); 553 } 554 555 static int 556 vga_pci_get_vpd_readonly(device_t dev, device_t child, const char *kw, 557 const char **vptr) 558 { 559 560 return (pci_get_vpd_readonly(dev, kw, vptr)); 561 } 562 563 static int 564 vga_pci_set_powerstate(device_t dev, device_t child, int state) 565 { 566 567 device_printf(dev, "child %s requested pci_set_powerstate\n", 568 device_get_nameunit(child)); 569 return (pci_set_powerstate(dev, state)); 570 } 571 572 static int 573 vga_pci_get_powerstate(device_t dev, device_t child) 574 { 575 576 device_printf(dev, "child %s requested pci_get_powerstate\n", 577 device_get_nameunit(child)); 578 return (pci_get_powerstate(dev)); 579 } 580 581 static int 582 vga_pci_assign_interrupt(device_t dev, device_t child) 583 { 584 585 device_printf(dev, "child %s requested pci_assign_interrupt\n", 586 device_get_nameunit(child)); 587 return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev)); 588 } 589 590 static int 591 vga_pci_find_cap(device_t dev, device_t child, int capability, 592 int *capreg) 593 { 594 595 return (pci_find_cap(dev, capability, capreg)); 596 } 597 598 static int 599 vga_pci_find_next_cap(device_t dev, device_t child, int capability, 600 int start, int *capreg) 601 { 602 603 return (pci_find_next_cap(dev, capability, start, capreg)); 604 } 605 606 static int 607 vga_pci_find_extcap(device_t dev, device_t child, int capability, 608 int *capreg) 609 { 610 611 return (pci_find_extcap(dev, capability, capreg)); 612 } 613 614 static int 615 vga_pci_find_next_extcap(device_t dev, device_t child, int capability, 616 int start, int *capreg) 617 { 618 619 return (pci_find_next_extcap(dev, capability, start, capreg)); 620 } 621 622 static int 623 vga_pci_find_htcap(device_t dev, device_t child, int capability, 624 int *capreg) 625 { 626 627 return (pci_find_htcap(dev, capability, capreg)); 628 } 629 630 static int 631 vga_pci_find_next_htcap(device_t dev, device_t child, int capability, 632 int start, int *capreg) 633 { 634 635 return (pci_find_next_htcap(dev, capability, start, capreg)); 636 } 637 638 static int 639 vga_pci_alloc_msi(device_t dev, device_t child, int *count) 640 { 641 struct vga_pci_softc *sc; 642 int error; 643 644 sc = device_get_softc(dev); 645 if (sc->vga_msi_child != NULL) 646 return (EBUSY); 647 error = pci_alloc_msi(dev, count); 648 if (error == 0) 649 sc->vga_msi_child = child; 650 return (error); 651 } 652 653 static int 654 vga_pci_alloc_msix(device_t dev, device_t child, int *count) 655 { 656 struct vga_pci_softc *sc; 657 int error; 658 659 sc = device_get_softc(dev); 660 if (sc->vga_msi_child != NULL) 661 return (EBUSY); 662 error = pci_alloc_msix(dev, count); 663 if (error == 0) 664 sc->vga_msi_child = child; 665 return (error); 666 } 667 668 static int 669 vga_pci_remap_msix(device_t dev, device_t child, int count, 670 const u_int *vectors) 671 { 672 struct vga_pci_softc *sc; 673 674 sc = device_get_softc(dev); 675 if (sc->vga_msi_child != child) 676 return (ENXIO); 677 return (pci_remap_msix(dev, count, vectors)); 678 } 679 680 static int 681 vga_pci_release_msi(device_t dev, device_t child) 682 { 683 struct vga_pci_softc *sc; 684 int error; 685 686 sc = device_get_softc(dev); 687 if (sc->vga_msi_child != child) 688 return (ENXIO); 689 error = pci_release_msi(dev); 690 if (error == 0) 691 sc->vga_msi_child = NULL; 692 return (error); 693 } 694 695 static int 696 vga_pci_msi_count(device_t dev, device_t child) 697 { 698 699 return (pci_msi_count(dev)); 700 } 701 702 static int 703 vga_pci_msix_count(device_t dev, device_t child) 704 { 705 706 return (pci_msix_count(dev)); 707 } 708 709 static bus_dma_tag_t 710 vga_pci_get_dma_tag(device_t bus, device_t child) 711 { 712 713 return (bus_get_dma_tag(bus)); 714 } 715 716 static device_method_t vga_pci_methods[] = { 717 /* Device interface */ 718 DEVMETHOD(device_probe, vga_pci_probe), 719 DEVMETHOD(device_attach, vga_pci_attach), 720 DEVMETHOD(device_shutdown, bus_generic_shutdown), 721 DEVMETHOD(device_suspend, bus_generic_suspend), 722 DEVMETHOD(device_detach, vga_pci_detach), 723 DEVMETHOD(device_resume, bus_generic_resume), 724 725 /* Bus interface */ 726 DEVMETHOD(bus_read_ivar, vga_pci_read_ivar), 727 DEVMETHOD(bus_write_ivar, vga_pci_write_ivar), 728 DEVMETHOD(bus_setup_intr, vga_pci_setup_intr), 729 DEVMETHOD(bus_teardown_intr, vga_pci_teardown_intr), 730 DEVMETHOD(bus_alloc_resource, vga_pci_alloc_resource), 731 DEVMETHOD(bus_release_resource, vga_pci_release_resource), 732 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 733 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 734 DEVMETHOD(bus_get_dma_tag, vga_pci_get_dma_tag), 735 736 /* PCI interface */ 737 DEVMETHOD(pci_read_config, vga_pci_read_config), 738 DEVMETHOD(pci_write_config, vga_pci_write_config), 739 DEVMETHOD(pci_enable_busmaster, vga_pci_enable_busmaster), 740 DEVMETHOD(pci_disable_busmaster, vga_pci_disable_busmaster), 741 DEVMETHOD(pci_enable_io, vga_pci_enable_io), 742 DEVMETHOD(pci_disable_io, vga_pci_disable_io), 743 DEVMETHOD(pci_get_vpd_ident, vga_pci_get_vpd_ident), 744 DEVMETHOD(pci_get_vpd_readonly, vga_pci_get_vpd_readonly), 745 DEVMETHOD(pci_get_powerstate, vga_pci_get_powerstate), 746 DEVMETHOD(pci_set_powerstate, vga_pci_set_powerstate), 747 DEVMETHOD(pci_assign_interrupt, vga_pci_assign_interrupt), 748 DEVMETHOD(pci_find_cap, vga_pci_find_cap), 749 DEVMETHOD(pci_find_next_cap, vga_pci_find_next_cap), 750 DEVMETHOD(pci_find_extcap, vga_pci_find_extcap), 751 DEVMETHOD(pci_find_next_extcap, vga_pci_find_next_extcap), 752 DEVMETHOD(pci_find_htcap, vga_pci_find_htcap), 753 DEVMETHOD(pci_find_next_htcap, vga_pci_find_next_htcap), 754 DEVMETHOD(pci_alloc_msi, vga_pci_alloc_msi), 755 DEVMETHOD(pci_alloc_msix, vga_pci_alloc_msix), 756 DEVMETHOD(pci_remap_msix, vga_pci_remap_msix), 757 DEVMETHOD(pci_release_msi, vga_pci_release_msi), 758 DEVMETHOD(pci_msi_count, vga_pci_msi_count), 759 DEVMETHOD(pci_msix_count, vga_pci_msix_count), 760 { 0, 0 } 761 }; 762 763 static driver_t vga_pci_driver = { 764 "vgapci", 765 vga_pci_methods, 766 sizeof(struct vga_pci_softc), 767 }; 768 769 DRIVER_MODULE(vgapci, pci, vga_pci_driver, 0, 0); 770 MODULE_DEPEND(vgapci, x86bios, 1, 1, 1); 771