1 /************************************************************************** 2 ** 3 ** $Id: pcireg.h,v 1.1 1994/10/12 02:25:03 se Exp $ 4 ** 5 ** Declarations for pci bus drivers. 6 ** 7 ** 386bsd / FreeBSD 8 ** 9 **------------------------------------------------------------------------- 10 ** 11 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved. 12 ** 13 ** Redistribution and use in source and binary forms, with or without 14 ** modification, are permitted provided that the following conditions 15 ** are met: 16 ** 1. Redistributions of source code must retain the above copyright 17 ** notice, this list of conditions and the following disclaimer. 18 ** 2. Redistributions in binary form must reproduce the above copyright 19 ** notice, this list of conditions and the following disclaimer in the 20 ** documentation and/or other materials provided with the distribution. 21 ** 3. The name of the author may not be used to endorse or promote products 22 ** derived from this software without specific prior written permission. 23 ** 24 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 ** 35 *************************************************************************** 36 */ 37 38 #ifndef __PCI_REG_H__ 39 #define __PCI_REG_H__ 40 41 /*----------------------------------------------------------------- 42 ** 43 ** main pci initialization function. 44 ** called at boot time from autoconf.c 45 ** 46 **----------------------------------------------------------------- 47 */ 48 49 void pci_configure (void); 50 51 /*----------------------------------------------------------------- 52 ** 53 ** The pci configuration id describes a pci device on the bus. 54 ** It is constructed from: bus, device & function numbers. 55 ** 56 **----------------------------------------------------------------- 57 */ 58 59 typedef union { 60 u_long cfg1; 61 struct { 62 u_char enable; 63 u_char forward; 64 u_short port; 65 } cfg2; 66 } pcici_t; 67 68 /*----------------------------------------------------------------- 69 ** 70 ** Each pci device has an unique device id. 71 ** It is used to find a matching driver. 72 ** 73 **----------------------------------------------------------------- 74 */ 75 76 typedef u_long pcidi_t; 77 78 /*----------------------------------------------------------------- 79 ** 80 ** The pci driver structure. 81 ** 82 ** probe: Checks if the driver can support a device 83 ** with this type. The tag may be used to get 84 ** more info with pci_read_conf(). See below. 85 ** It returns a string with the devices name, 86 ** or a NULL pointer, if the driver cannot 87 ** support this device. 88 ** 89 ** attach: Allocate a control structure and prepare 90 ** it. This function may use the pci mapping 91 ** functions. See below. 92 ** (configuration id) or type. 93 ** 94 ** count: A pointer to a unit counter. 95 ** It's used by the pci configurator to 96 ** allocate unit numbers. 97 ** 98 **----------------------------------------------------------------- 99 */ 100 101 struct pci_driver { 102 char* (*probe ) (pcici_t tag, pcidi_t type); 103 void (*attach) (pcici_t tag, int unit); 104 u_long *count; 105 }; 106 107 /*----------------------------------------------------------------- 108 ** 109 ** The pci-devconf interface. 110 ** 111 **----------------------------------------------------------------- 112 */ 113 114 struct pci_info { 115 u_short pi_bus; 116 u_short pi_device; 117 }; 118 119 #define PCI_EXT_CONF_LEN (16) 120 #define PCI_EXTERNAL_LEN (sizeof(struct pci_externalize_buffer)) 121 122 struct pci_externalize_buffer { 123 struct pci_info peb_pci_info; 124 u_long peb_config[PCI_EXT_CONF_LEN]; 125 }; 126 127 128 /*----------------------------------------------------------------- 129 ** 130 ** Per device structure. 131 ** 132 ** An array of this structure should be created by the 133 ** config utility and live in "ioconf.c". 134 ** 135 ** At the moment it's created by hand and lives in 136 ** pci_config.c 137 ** 138 ** pd_driver: 139 ** a pointer to the driver structure. 140 ** 141 ** pd_name: 142 ** the name of the devices which are supported 143 ** by this driver for kernel messages. 144 ** 145 ** pd_flags: 146 ** for further study. 147 ** 148 **----------------------------------------------------------------- 149 */ 150 151 struct pci_device { 152 struct 153 pci_driver* pd_driver; 154 const char * pd_name; 155 int pd_flags; 156 }; 157 158 /*----------------------------------------------------------------- 159 ** 160 ** This table should be generated in file "ioconf.c" 161 ** by the config program. 162 ** It is used at boot time by the configuration function 163 ** pci_configure() 164 ** 165 **----------------------------------------------------------------- 166 */ 167 168 extern struct pci_device pci_devtab[]; 169 170 /*----------------------------------------------------------------- 171 ** 172 ** Map a pci device to physical and virtual memory. 173 ** 174 ** The va and pa addresses are "in/out" parameters. 175 ** If they are 0 on entry, the function assigns an address. 176 ** 177 ** Entry selects the register in the pci configuration 178 ** space, which supplies the size of the region, and 179 ** receives the physical address. 180 ** 181 ** If there is any error, a message is written, and 182 ** the function returns with zero. 183 ** Else it returns with a value different to zero. 184 ** 185 **----------------------------------------------------------------- 186 */ 187 188 int pci_map_mem (pcici_t tag, u_long entry, u_long * va, u_long * pa); 189 190 /*----------------------------------------------------------------- 191 ** 192 ** Map a pci device to an io port area. 193 ** 194 ** *pa is an "in/out" parameter. 195 ** If it's 0 on entry, the function assigns an port number.. 196 ** 197 ** Entry selects the register in the pci configuration 198 ** space, which supplies the size of the region, and 199 ** receives the port number. 200 ** 201 ** If there is any error, a message is written, and 202 ** the function returns with zero. 203 ** Else it returns with a value different to zero. 204 ** 205 **----------------------------------------------------------------- 206 */ 207 208 int pci_map_port(pcici_t tag, u_long entry, u_short * pa); 209 210 /*----------------------------------------------------------------- 211 ** 212 ** Map a pci interrupt to an isa irq line, 213 ** and enable the interrupt. 214 ** 215 ** func is the interrupt handler, arg is the argument 216 ** to this function. 217 ** 218 ** The maskptr argument should be &bio_imask, 219 ** &net_imask etc. or NULL. 220 ** 221 ** If there is any error, a message is written, and 222 ** the function returns with zero. 223 ** Else it returns with a value different to zero. 224 ** 225 ** A word of caution for FreeBSD 2.0: 226 ** 227 ** We use the register_intr() function. 228 ** 229 ** The interrupt line of the selected device is included 230 ** into the supplied mask: after the corresponding splXXX 231 ** this drivers interrupts are blocked. 232 ** 233 ** But in the interrupt handlers startup code ONLY 234 ** the interrupt of the driver is blocked, and NOT 235 ** all interrupts of the spl group. 236 ** 237 ** It may be required to additional block the group 238 ** interrupts by splXXX() inside the interrupt handler. 239 ** 240 ** In pre 2.0 kernels we emulate the register_intr 241 ** function. The emulating function blocks all interrupts 242 ** of the group in the interrupt handler prefix code. 243 ** 244 **----------------------------------------------------------------- 245 */ 246 247 int pci_map_int (pcici_t tag, int (*func)(), void* arg, unsigned * maskptr); 248 249 /*----------------------------------------------------------------- 250 ** 251 ** The following functions are provided by the pci bios. 252 ** They are used only by the pci configuration. 253 ** 254 ** pci_conf_mode(): 255 ** Probes for a pci system. 256 ** Returns 1 or 2 for pci configuration mechanism. 257 ** Returns 0 if no pci system. 258 ** 259 ** pcitag(): 260 ** Gets a handle for accessing the pci configuration 261 ** space. 262 ** This handle is given to the mapping functions (see 263 ** above) or to the read/write functions. 264 ** 265 ** pci_conf_read(): 266 ** Read a long word from the pci configuration space. 267 ** Requires a tag (from pcitag) and the register 268 ** number (should be a long word alligned one). 269 ** 270 ** pci_conf_write(): 271 ** Writes a long word to the pci configuration space. 272 ** Requires a tag (from pcitag), the register number 273 ** (should be a long word alligned one), and a value. 274 ** 275 **----------------------------------------------------------------- 276 */ 277 278 int pci_conf_mode (void); 279 280 pcici_t pcitag (unsigned char bus, 281 unsigned char device, 282 unsigned char func); 283 284 u_long pci_conf_read (pcici_t tag, u_long reg ); 285 void pci_conf_write (pcici_t tag, u_long reg, u_long data); 286 287 288 /*------------------------------------------------------------------ 289 ** 290 ** Names for PCI configuration space registers. 291 ** 292 ** Copyright (c) 1994 Charles Hannum. All rights reserved. 293 ** 294 **------------------------------------------------------------------ 295 */ 296 297 /* 298 * Device identification register; contains a vendor ID and a device ID. 299 * We have little need to distinguish the two parts. 300 */ 301 #define PCI_ID_REG 0x00 302 303 /* 304 * Command and status register. 305 */ 306 #define PCI_COMMAND_STATUS_REG 0x04 307 308 #define PCI_COMMAND_IO_ENABLE 0x00000001 309 #define PCI_COMMAND_MEM_ENABLE 0x00000002 310 #define PCI_COMMAND_MASTER_ENABLE 0x00000004 311 #define PCI_COMMAND_SPECIAL_ENABLE 0x00000008 312 #define PCI_COMMAND_INVALIDATE_ENABLE 0x00000010 313 #define PCI_COMMAND_PALETTE_ENABLE 0x00000020 314 #define PCI_COMMAND_PARITY_ENABLE 0x00000040 315 #define PCI_COMMAND_STEPPING_ENABLE 0x00000080 316 #define PCI_COMMAND_SERR_ENABLE 0x00000100 317 #define PCI_COMMAND_BACKTOBACK_ENABLE 0x00000200 318 319 #define PCI_STATUS_BACKTOBACK_OKAY 0x00800000 320 #define PCI_STATUS_PARITY_ERROR 0x01000000 321 #define PCI_STATUS_DEVSEL_FAST 0x00000000 322 #define PCI_STATUS_DEVSEL_MEDIUM 0x02000000 323 #define PCI_STATUS_DEVSEL_SLOW 0x04000000 324 #define PCI_STATUS_DEVSEL_MASK 0x06000000 325 #define PCI_STATUS_TARGET_TARGET_ABORT 0x08000000 326 #define PCI_STATUS_MASTER_TARGET_ABORT 0x10000000 327 #define PCI_STATUS_MASTER_ABORT 0x20000000 328 #define PCI_STATUS_SPECIAL_ERROR 0x40000000 329 #define PCI_STATUS_PARITY_DETECT 0x80000000 330 331 /* 332 * Class register; defines basic type of device. 333 */ 334 #define PCI_CLASS_REG 0x08 335 336 #define PCI_CLASS_MASK 0xff000000 337 #define PCI_SUBCLASS_MASK 0x00ff0000 338 339 /* base classes */ 340 #define PCI_CLASS_PREHISTORIC 0x00000000 341 #define PCI_CLASS_MASS_STORAGE 0x01000000 342 #define PCI_CLASS_NETWORK 0x02000000 343 #define PCI_CLASS_DISPLAY 0x03000000 344 #define PCI_CLASS_MULTIMEDIA 0x04000000 345 #define PCI_CLASS_MEMORY 0x05000000 346 #define PCI_CLASS_BRIDGE 0x06000000 347 #define PCI_CLASS_UNDEFINED 0xff000000 348 349 /* 0x00 prehistoric subclasses */ 350 #define PCI_SUBCLASS_PREHISTORIC_MISC 0x00000000 351 #define PCI_SUBCLASS_PREHISTORIC_VGA 0x00010000 352 353 /* 0x01 mass storage subclasses */ 354 #define PCI_SUBCLASS_MASS_STORAGE_SCSI 0x00000000 355 #define PCI_SUBCLASS_MASS_STORAGE_IDE 0x00010000 356 #define PCI_SUBCLASS_MASS_STORAGE_FLOPPY 0x00020000 357 #define PCI_SUBCLASS_MASS_STORAGE_IPI 0x00030000 358 #define PCI_SUBCLASS_MASS_STORAGE_MISC 0x00800000 359 360 /* 0x02 network subclasses */ 361 #define PCI_SUBCLASS_NETWORK_ETHERNET 0x00000000 362 #define PCI_SUBCLASS_NETWORK_TOKENRING 0x00010000 363 #define PCI_SUBCLASS_NETWORK_FDDI 0x00020000 364 #define PCI_SUBCLASS_NETWORK_MISC 0x00800000 365 366 /* 0x03 display subclasses */ 367 #define PCI_SUBCLASS_DISPLAY_VGA 0x00000000 368 #define PCI_SUBCLASS_DISPLAY_XGA 0x00010000 369 #define PCI_SUBCLASS_DISPLAY_MISC 0x00800000 370 371 /* 0x04 multimedia subclasses */ 372 #define PCI_SUBCLASS_MULTIMEDIA_VIDEO 0x00000000 373 #define PCI_SUBCLASS_MULTIMEDIA_AUDIO 0x00010000 374 #define PCI_SUBCLASS_MULTIMEDIA_MISC 0x00800000 375 376 /* 0x05 memory subclasses */ 377 #define PCI_SUBCLASS_MEMORY_RAM 0x00000000 378 #define PCI_SUBCLASS_MEMORY_FLASH 0x00010000 379 #define PCI_SUBCLASS_MEMORY_MISC 0x00800000 380 381 /* 0x06 bridge subclasses */ 382 #define PCI_SUBCLASS_BRIDGE_HOST 0x00000000 383 #define PCI_SUBCLASS_BRIDGE_ISA 0x00010000 384 #define PCI_SUBCLASS_BRIDGE_EISA 0x00020000 385 #define PCI_SUBCLASS_BRIDGE_MC 0x00030000 386 #define PCI_SUBCLASS_BRIDGE_PCI 0x00040000 387 #define PCI_SUBCLASS_BRIDGE_PCMCIA 0x00050000 388 #define PCI_SUBCLASS_BRIDGE_MISC 0x00800000 389 390 /* 391 * Mapping registers 392 */ 393 #define PCI_MAP_REG_START 0x10 394 #define PCI_MAP_REG_END 0x28 395 396 #define PCI_MAP_MEMORY 0x00000000 397 #define PCI_MAP_IO 0x00000001 398 399 #define PCI_MAP_MEMORY_TYPE_32BIT 0x00000000 400 #define PCI_MAP_MEMORY_TYPE_32BIT_1M 0x00000002 401 #define PCI_MAP_MEMORY_TYPE_64BIT 0x00000004 402 #define PCI_MAP_MEMORY_TYPE_MASK 0x00000006 403 #define PCI_MAP_MEMORY_CACHABLE 0x00000008 404 #define PCI_MAP_MEMORY_ADDRESS_MASK 0xfffffff0 405 406 /* 407 * Interrupt configuration register 408 */ 409 #define PCI_INTERRUPT_REG 0x3c 410 411 #define PCI_INTERRUPT_PIN_MASK 0x0000ff00 412 #define PCI_INTERRUPT_PIN_EXTRACT(x) ((((x) & PCI_INTERRUPT_PIN_MASK) >> 8) & 0xff) 413 #define PCI_INTERRUPT_PIN_NONE 0x00 414 #define PCI_INTERRUPT_PIN_A 0x01 415 #define PCI_INTERRUPT_PIN_B 0x02 416 #define PCI_INTERRUPT_PIN_C 0x03 417 #define PCI_INTERRUPT_PIN_D 0x04 418 419 #define PCI_INTERRUPT_LINE_MASK 0x000000ff 420 #define PCI_INTERRUPT_LINE_EXTRACT(x) ((((x) & PCI_INTERRUPT_LINE_MASK) >> 0) & 0xff) 421 #define PCI_INTERRUPT_LINE_INSERT(x,v) (((x) & ~PCI_INTERRUPT_LINE_MASK) | ((v) << 0)) 422 423 #endif /* __PCI_REG_H__ */ 424