xref: /freebsd/sys/dev/pci/pcib_private.h (revision 5dae51da3da0cc94d17bd67b308fad304ebec7e0)
1 /*-
2  * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3  * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4  * Copyright (c) 2000 BSDi
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of the author may not be used to endorse or promote products
16  *    derived from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * $FreeBSD$
31  */
32 
33 #ifndef __PCIB_PRIVATE_H__
34 #define	__PCIB_PRIVATE_H__
35 
36 #include <sys/_callout.h>
37 #include <sys/_task.h>
38 
39 #ifdef NEW_PCIB
40 /*
41  * Data structure and routines that Host to PCI bridge drivers can use
42  * to restrict allocations for child devices to ranges decoded by the
43  * bridge.
44  */
45 struct pcib_host_resources {
46 	device_t	hr_pcib;
47 	struct resource_list hr_rl;
48 };
49 
50 int		pcib_host_res_init(device_t pcib,
51 		    struct pcib_host_resources *hr);
52 int		pcib_host_res_free(device_t pcib,
53 		    struct pcib_host_resources *hr);
54 int		pcib_host_res_decodes(struct pcib_host_resources *hr, int type,
55 		    rman_res_t start, rman_res_t end, u_int flags);
56 struct resource *pcib_host_res_alloc(struct pcib_host_resources *hr,
57 		    device_t dev, int type, int *rid, rman_res_t start,
58 		    rman_res_t end, rman_res_t count, u_int flags);
59 int		pcib_host_res_adjust(struct pcib_host_resources *hr,
60 		    device_t dev, int type, struct resource *r, rman_res_t start,
61 		    rman_res_t end);
62 #endif
63 
64 /*
65  * Export portions of generic PCI:PCI bridge support so that it can be
66  * used by subclasses.
67  */
68 DECLARE_CLASS(pcib_driver);
69 
70 #ifdef NEW_PCIB
71 #define	WIN_IO		0x1
72 #define	WIN_MEM		0x2
73 #define	WIN_PMEM	0x4
74 
75 struct pcib_window {
76 	pci_addr_t	base;		/* base address */
77 	pci_addr_t	limit;		/* topmost address */
78 	struct rman	rman;
79 	struct resource **res;
80 	int		count;		/* size of 'res' array */
81 	int		reg;		/* resource id from parent */
82 	int		valid;
83 	int		mask;		/* WIN_* bitmask of this window */
84 	int		step;		/* log_2 of window granularity */
85 	const char	*name;
86 };
87 #endif
88 
89 struct pcib_secbus {
90 	u_int		sec;
91 	u_int		sub;
92 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
93 	device_t	dev;
94 	struct rman	rman;
95 	struct resource	*res;
96 	const char	*name;
97 	int		sub_reg;
98 #endif
99 };
100 
101 /*
102  * Bridge-specific data.
103  */
104 struct pcib_softc
105 {
106     device_t	dev;
107     device_t	child;
108     uint32_t	flags;		/* flags */
109 #define	PCIB_SUBTRACTIVE	0x1
110 #define	PCIB_DISABLE_MSI	0x2
111 #define	PCIB_DISABLE_MSIX	0x4
112 #define	PCIB_ENABLE_ARI		0x8
113 #define	PCIB_HOTPLUG		0x10
114 #define	PCIB_HOTPLUG_CMD_PENDING 0x20
115 #define	PCIB_DETACH_PENDING	0x40
116 #define	PCIB_DETACHING		0x80
117     u_int	domain;		/* domain number */
118     u_int	pribus;		/* primary bus number */
119     struct pcib_secbus bus;	/* secondary bus numbers */
120 #ifdef NEW_PCIB
121     struct pcib_window io;	/* I/O port window */
122     struct pcib_window mem;	/* memory window */
123     struct pcib_window pmem;	/* prefetchable memory window */
124 #else
125     pci_addr_t	pmembase;	/* base address of prefetchable memory */
126     pci_addr_t	pmemlimit;	/* topmost address of prefetchable memory */
127     pci_addr_t	membase;	/* base address of memory window */
128     pci_addr_t	memlimit;	/* topmost address of memory window */
129     uint32_t	iobase;		/* base address of port window */
130     uint32_t	iolimit;	/* topmost address of port window */
131 #endif
132     uint16_t	bridgectl;	/* bridge control register */
133     uint16_t	pcie_link_sta;
134     uint16_t	pcie_slot_sta;
135     uint32_t	pcie_link_cap;
136     uint32_t	pcie_slot_cap;
137     struct resource *pcie_irq;
138     void	*pcie_ihand;
139     struct task	pcie_hp_task;
140     struct callout pcie_ab_timer;
141     struct callout pcie_cc_timer;
142     struct callout pcie_dll_timer;
143 };
144 
145 #define	PCIB_SUPPORTED_ARI_VER	1
146 
147 typedef uint32_t pci_read_config_fn(int b, int s, int f, int reg, int width);
148 
149 int		host_pcib_get_busno(pci_read_config_fn read_config, int bus,
150     int slot, int func, uint8_t *busnum);
151 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
152 struct resource *pci_domain_alloc_bus(int domain, device_t dev, int *rid,
153 		    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags);
154 int		pci_domain_adjust_bus(int domain, device_t dev,
155 		    struct resource *r, rman_res_t start, rman_res_t end);
156 int		pci_domain_release_bus(int domain, device_t dev, int rid,
157 		    struct resource *r);
158 struct resource *pcib_alloc_subbus(struct pcib_secbus *bus, device_t child,
159 		    int *rid, rman_res_t start, rman_res_t end, rman_res_t count,
160 		    u_int flags);
161 void		pcib_free_secbus(device_t dev, struct pcib_secbus *bus);
162 void		pcib_setup_secbus(device_t dev, struct pcib_secbus *bus,
163     int min_count);
164 #endif
165 int		pcib_attach(device_t dev);
166 int		pcib_attach_child(device_t dev);
167 void		pcib_attach_common(device_t dev);
168 void		pcib_bridge_init(device_t dev);
169 #ifdef NEW_PCIB
170 const char	*pcib_child_name(device_t child);
171 #endif
172 int		pcib_child_present(device_t dev, device_t child);
173 int		pcib_detach(device_t dev);
174 int		pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result);
175 int		pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);
176 struct resource *pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
177 					    rman_res_t start, rman_res_t end,
178 					    rman_res_t count, u_int flags);
179 #ifdef NEW_PCIB
180 int		pcib_adjust_resource(device_t bus, device_t child, int type,
181     struct resource *r, rman_res_t start, rman_res_t end);
182 int		pcib_release_resource(device_t dev, device_t child, int type, int rid,
183     struct resource *r);
184 #endif
185 int		pcib_maxslots(device_t dev);
186 int		pcib_maxfuncs(device_t dev);
187 int		pcib_route_interrupt(device_t pcib, device_t dev, int pin);
188 int		pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs);
189 int		pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs);
190 int		pcib_alloc_msix(device_t pcib, device_t dev, int *irq);
191 int		pcib_release_msix(device_t pcib, device_t dev, int irq);
192 int		pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, uint32_t *data);
193 int		pcib_get_id(device_t pcib, device_t dev, enum pci_id_type type,
194 		    uintptr_t *id);
195 void		pcib_decode_rid(device_t pcib, uint16_t rid, int *bus,
196 		    int *slot, int *func);
197 
198 #endif
199