1#- 2# Copyright (c) 2000 Doug Rabson 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions 7# are met: 8# 1. Redistributions of source code must retain the above copyright 9# notice, this list of conditions and the following disclaimer. 10# 2. Redistributions in binary form must reproduce the above copyright 11# notice, this list of conditions and the following disclaimer in the 12# documentation and/or other materials provided with the distribution. 13# 14# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24# SUCH DAMAGE. 25# 26# 27 28#include <sys/bus.h> 29#include <sys/rman.h> 30#include <dev/pci/pcivar.h> 31#include <dev/pci/pcib_private.h> 32 33INTERFACE pcib; 34 35CODE { 36 static int 37 null_route_interrupt(device_t pcib, device_t dev, int pin) 38 { 39 return (PCI_INVALID_IRQ); 40 } 41 42 static int 43 pcib_null_ari_enabled(device_t pcib) 44 { 45 46 return (0); 47 } 48}; 49 50HEADER { 51 #include "pci_if.h" 52}; 53 54# 55# Return the number of slots on the attached PCI bus. 56# 57METHOD int maxslots { 58 device_t dev; 59}; 60 61# 62# 63# Return the number of functions on the attached PCI bus. 64# 65METHOD int maxfuncs { 66 device_t dev; 67} DEFAULT pcib_maxfuncs; 68 69# 70# Read configuration space on the PCI bus. The bus, slot and func 71# arguments determine the device which is being read and the reg 72# argument is a byte offset into configuration space for that 73# device. The width argument (which should be 1, 2 or 4) specifies how 74# many byte of configuration space to read from that offset. 75# 76METHOD u_int32_t read_config { 77 device_t dev; 78 u_int bus; 79 u_int slot; 80 u_int func; 81 u_int reg; 82 int width; 83}; 84 85# 86# Write configuration space on the PCI bus. The bus, slot and func 87# arguments determine the device which is being written and the reg 88# argument is a byte offset into configuration space for that 89# device. The value field is written to the configuration space, with 90# the number of bytes written depending on the width argument. 91# 92METHOD void write_config { 93 device_t dev; 94 u_int bus; 95 u_int slot; 96 u_int func; 97 u_int reg; 98 u_int32_t value; 99 int width; 100}; 101 102# 103# Route an interrupt. Returns a value suitable for stuffing into 104# a device's interrupt register. 105# 106METHOD int route_interrupt { 107 device_t pcib; 108 device_t dev; 109 int pin; 110} DEFAULT null_route_interrupt; 111 112# 113# Allocate 'count' MSI messsages mapped onto 'count' IRQs. 'irq' points 114# to an array of at least 'count' ints. The max number of messages this 115# device supports is included so that the MD code can take that into 116# account when assigning resources so that the proper number of low bits 117# are clear in the resulting message data value. 118# 119METHOD int alloc_msi { 120 device_t pcib; 121 device_t dev; 122 int count; 123 int maxcount; 124 int *irqs; 125}; 126 127# 128# Release 'count' MSI messages mapped onto 'count' IRQs stored in the 129# array pointed to by 'irqs'. 130# 131METHOD int release_msi { 132 device_t pcib; 133 device_t dev; 134 int count; 135 int *irqs; 136}; 137 138# 139# Allocate a single MSI-X message mapped onto '*irq'. 140# 141METHOD int alloc_msix { 142 device_t pcib; 143 device_t dev; 144 int *irq; 145}; 146 147# 148# Release a single MSI-X message mapped onto 'irq'. 149# 150METHOD int release_msix { 151 device_t pcib; 152 device_t dev; 153 int irq; 154}; 155 156# 157# Determine the MSI/MSI-X message address and data for 'irq'. The address 158# is returned in '*addr', and the data in '*data'. 159# 160METHOD int map_msi { 161 device_t pcib; 162 device_t dev; 163 int irq; 164 uint64_t *addr; 165 uint32_t *data; 166}; 167 168# 169# Return the device power state to be used during a system sleep state 170# transition such as suspend and resume. 171# 172METHOD int power_for_sleep { 173 device_t pcib; 174 device_t dev; 175 int *pstate; 176}; 177 178# 179# Return the PCI Routing Identifier (RID) for the device. 180# 181METHOD int get_id { 182 device_t pcib; 183 device_t dev; 184 enum pci_id_type type; 185 uintptr_t *id; 186} DEFAULT pcib_get_id; 187 188# 189# Enable Alternative RID Interpretation if both the downstream port (pcib) 190# and the endpoint device (dev) both support it. 191# 192METHOD int try_enable_ari { 193 device_t pcib; 194 device_t dev; 195}; 196 197# 198# Return non-zero if PCI ARI is enabled, or zero otherwise 199# 200METHOD int ari_enabled { 201 device_t pcib; 202} DEFAULT pcib_null_ari_enabled; 203 204# 205# Decode a PCI Routing Identifier (RID) into PCI bus/slot/function 206# 207METHOD void decode_rid { 208 device_t pcib; 209 uint16_t rid; 210 int *bus; 211 int *slot; 212 int *func; 213} DEFAULT pcib_decode_rid; 214 215# 216# Request control of PCI features from host firmware, if any. 217# 218METHOD int request_feature { 219 device_t pcib; 220 device_t dev; 221 enum pci_feature feature; 222}; 223