xref: /freebsd/sys/dev/pci/pcib_if.m (revision 4232f826683298e85d469c0ef17259cecd13b2c7)
1#-
2# Copyright (c) 2000 Doug Rabson
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8# 1. Redistributions of source code must retain the above copyright
9#    notice, this list of conditions and the following disclaimer.
10# 2. Redistributions in binary form must reproduce the above copyright
11#    notice, this list of conditions and the following disclaimer in the
12#    documentation and/or other materials provided with the distribution.
13#
14# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24# SUCH DAMAGE.
25#
26# $FreeBSD$
27#
28
29#include <sys/bus.h>
30#include <sys/rman.h>
31#include <dev/pci/pcivar.h>
32#include <dev/pci/pcib_private.h>
33
34INTERFACE pcib;
35
36CODE {
37	static int
38	null_route_interrupt(device_t pcib, device_t dev, int pin)
39	{
40		return (PCI_INVALID_IRQ);
41	}
42
43	static int
44	pcib_null_ari_enabled(device_t pcib)
45	{
46
47		return (0);
48	}
49};
50
51#
52# Return the number of slots on the attached PCI bus.
53#
54METHOD int maxslots {
55	device_t	dev;
56};
57
58#
59#
60# Return the number of functions on the attached PCI bus.
61#
62METHOD int maxfuncs {
63	device_t	dev;
64} DEFAULT pcib_maxfuncs;
65
66#
67# Read configuration space on the PCI bus. The bus, slot and func
68# arguments determine the device which is being read and the reg
69# argument is a byte offset into configuration space for that
70# device. The width argument (which should be 1, 2 or 4) specifies how
71# many byte of configuration space to read from that offset.
72#
73METHOD u_int32_t read_config {
74	device_t	dev;
75	u_int		bus;
76	u_int		slot;
77	u_int		func;
78	u_int		reg;
79	int		width;
80};
81
82#
83# Write configuration space on the PCI bus. The bus, slot and func
84# arguments determine the device which is being written and the reg
85# argument is a byte offset into configuration space for that
86# device. The value field is written to the configuration space, with
87# the number of bytes written depending on the width argument.
88#
89METHOD void write_config {
90	device_t	dev;
91	u_int		bus;
92	u_int		slot;
93	u_int		func;
94	u_int		reg;
95	u_int32_t	value;
96	int		width;
97};
98
99#
100# Route an interrupt.  Returns a value suitable for stuffing into
101# a device's interrupt register.
102#
103METHOD int route_interrupt {
104	device_t	pcib;
105	device_t	dev;
106	int		pin;
107} DEFAULT null_route_interrupt;
108
109#
110# Allocate 'count' MSI messsages mapped onto 'count' IRQs.  'irq' points
111# to an array of at least 'count' ints.  The max number of messages this
112# device supports is included so that the MD code can take that into
113# account when assigning resources so that the proper number of low bits
114# are clear in the resulting message data value.
115#
116METHOD int alloc_msi {
117	device_t	pcib;
118	device_t	dev;
119	int		count;
120	int		maxcount;
121	int		*irqs;
122};
123
124#
125# Release 'count' MSI messages mapped onto 'count' IRQs stored in the
126# array pointed to by 'irqs'.
127#
128METHOD int release_msi {
129	device_t	pcib;
130	device_t	dev;
131	int		count;
132	int		*irqs;
133};
134
135#
136# Allocate a single MSI-X message mapped onto '*irq'.
137#
138METHOD int alloc_msix {
139	device_t	pcib;
140	device_t	dev;
141	int		*irq;
142};
143
144#
145# Release a single MSI-X message mapped onto 'irq'.
146#
147METHOD int release_msix {
148	device_t	pcib;
149	device_t	dev;
150	int		irq;
151};
152
153#
154# Determine the MSI/MSI-X message address and data for 'irq'.  The address
155# is returned in '*addr', and the data in '*data'.
156#
157METHOD int map_msi {
158	device_t	pcib;
159	device_t	dev;
160	int		irq;
161	uint64_t	*addr;
162	uint32_t	*data;
163};
164
165#
166# Return the device power state to be used during a system sleep state
167# transition such as suspend and resume.
168#
169METHOD int power_for_sleep {
170	device_t	pcib;
171	device_t	dev;
172	int		*pstate;
173};
174
175#
176# Return the PCI Routing Identifier (RID) for the device.
177#
178METHOD uint16_t get_rid {
179	device_t	pcib;
180	device_t	dev;
181} DEFAULT pcib_get_rid;
182
183#
184# Enable Alternative RID Interpretation if both the downstream port (pcib)
185# and the endpoint device (dev) both support it.
186#
187METHOD int try_enable_ari {
188	device_t	pcib;
189	device_t	dev;
190};
191
192#
193# Return non-zero if PCI ARI is enabled, or zero otherwise
194#
195METHOD int ari_enabled {
196	device_t	pcib;
197} DEFAULT pcib_null_ari_enabled;
198
199#
200# Decode a PCI Routing Identifier (RID) into PCI bus/slot/function
201#
202METHOD void decode_rid {
203	device_t	pcib;
204	uint16_t	rid;
205	int 		*bus;
206	int 		*slot;
207	int 		*func;
208} DEFAULT pcib_decode_rid;
209
210