1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2011 Hudson River Trading LLC 5 * Written by: John H. Baldwin <jhb@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 /* 32 * Support APIs for Host to PCI bridge drivers and drivers that 33 * provide PCI domains. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 #include <sys/malloc.h> 39 #include <sys/rman.h> 40 #include <sys/systm.h> 41 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcivar.h> 44 #include <dev/pci/pcib_private.h> 45 46 /* 47 * Try to read the bus number of a host-PCI bridge using appropriate config 48 * registers. 49 */ 50 int 51 host_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func, 52 uint8_t *busnum) 53 { 54 uint32_t id; 55 56 id = read_config(0, bus, slot, func, PCIR_DEVVENDOR, 4); 57 if (id == 0xffffffff) 58 return (0); 59 60 switch (id) { 61 case 0x12258086: 62 /* Intel 824?? */ 63 /* XXX This is a guess */ 64 /* *busnum = read_config(0, bus, slot, func, 0x41, 1); */ 65 *busnum = bus; 66 break; 67 case 0x84c48086: 68 /* Intel 82454KX/GX (Orion) */ 69 *busnum = read_config(0, bus, slot, func, 0x4a, 1); 70 break; 71 case 0x84ca8086: 72 /* 73 * For the 450nx chipset, there is a whole bundle of 74 * things pretending to be host bridges. The MIOC will 75 * be seen first and isn't really a pci bridge (the 76 * actual buses are attached to the PXB's). We need to 77 * read the registers of the MIOC to figure out the 78 * bus numbers for the PXB channels. 79 * 80 * Since the MIOC doesn't have a pci bus attached, we 81 * pretend it wasn't there. 82 */ 83 return (0); 84 case 0x84cb8086: 85 switch (slot) { 86 case 0x12: 87 /* Intel 82454NX PXB#0, Bus#A */ 88 *busnum = read_config(0, bus, 0x10, func, 0xd0, 1); 89 break; 90 case 0x13: 91 /* Intel 82454NX PXB#0, Bus#B */ 92 *busnum = read_config(0, bus, 0x10, func, 0xd1, 1) + 1; 93 break; 94 case 0x14: 95 /* Intel 82454NX PXB#1, Bus#A */ 96 *busnum = read_config(0, bus, 0x10, func, 0xd3, 1); 97 break; 98 case 0x15: 99 /* Intel 82454NX PXB#1, Bus#B */ 100 *busnum = read_config(0, bus, 0x10, func, 0xd4, 1) + 1; 101 break; 102 } 103 break; 104 105 /* ServerWorks -- vendor 0x1166 */ 106 case 0x00051166: 107 case 0x00061166: 108 case 0x00081166: 109 case 0x00091166: 110 case 0x00101166: 111 case 0x00111166: 112 case 0x00171166: 113 case 0x01011166: 114 case 0x010f1014: 115 case 0x01101166: 116 case 0x02011166: 117 case 0x02251166: 118 case 0x03021014: 119 *busnum = read_config(0, bus, slot, func, 0x44, 1); 120 break; 121 122 /* Compaq/HP -- vendor 0x0e11 */ 123 case 0x60100e11: 124 *busnum = read_config(0, bus, slot, func, 0xc8, 1); 125 break; 126 default: 127 /* Don't know how to read bus number. */ 128 return 0; 129 } 130 131 return 1; 132 } 133 134 /* 135 * Return a pointer to a pretty name for a PCI device. If the device 136 * has a driver attached, the device's name is used, otherwise a name 137 * is generated from the device's PCI address. 138 */ 139 const char * 140 pcib_child_name(device_t child) 141 { 142 static char buf[64]; 143 144 if (device_get_nameunit(child) != NULL) 145 return (device_get_nameunit(child)); 146 snprintf(buf, sizeof(buf), "pci%d:%d:%d:%d", pci_get_domain(child), 147 pci_get_bus(child), pci_get_slot(child), pci_get_function(child)); 148 return (buf); 149 } 150 151 /* 152 * Some Host-PCI bridge drivers know which resource ranges they can 153 * decode and should only allocate subranges to child PCI devices. 154 * This API provides a way to manage this. The bridge driver should 155 * initialize this structure during attach and call 156 * pcib_host_res_decodes() on each resource range it decodes. It can 157 * then use pcib_host_res_alloc() and pcib_host_res_adjust() as helper 158 * routines for BUS_ALLOC_RESOURCE() and BUS_ADJUST_RESOURCE(). This 159 * API assumes that resources for any decoded ranges can be safely 160 * allocated from the parent via bus_generic_alloc_resource(). 161 */ 162 int 163 pcib_host_res_init(device_t pcib, struct pcib_host_resources *hr) 164 { 165 166 hr->hr_pcib = pcib; 167 resource_list_init(&hr->hr_rl); 168 return (0); 169 } 170 171 int 172 pcib_host_res_free(device_t pcib, struct pcib_host_resources *hr) 173 { 174 175 resource_list_free(&hr->hr_rl); 176 return (0); 177 } 178 179 int 180 pcib_host_res_decodes(struct pcib_host_resources *hr, int type, rman_res_t start, 181 rman_res_t end, u_int flags) 182 { 183 struct resource_list_entry *rle; 184 int rid; 185 186 if (bootverbose) 187 device_printf(hr->hr_pcib, "decoding %d %srange %#jx-%#jx\n", 188 type, flags & RF_PREFETCHABLE ? "prefetchable ": "", start, 189 end); 190 rid = resource_list_add_next(&hr->hr_rl, type, start, end, 191 end - start + 1); 192 if (flags & RF_PREFETCHABLE) { 193 KASSERT(type == SYS_RES_MEMORY, 194 ("only memory is prefetchable")); 195 rle = resource_list_find(&hr->hr_rl, type, rid); 196 rle->flags = RLE_PREFETCH; 197 } 198 return (0); 199 } 200 201 struct resource * 202 pcib_host_res_alloc(struct pcib_host_resources *hr, device_t dev, int type, 203 int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 204 { 205 struct resource_list_entry *rle; 206 struct resource *r; 207 rman_res_t new_start, new_end; 208 209 if (flags & RF_PREFETCHABLE) 210 KASSERT(type == SYS_RES_MEMORY, 211 ("only memory is prefetchable")); 212 213 rle = resource_list_find(&hr->hr_rl, type, 0); 214 if (rle == NULL) { 215 /* 216 * No decoding ranges for this resource type, just pass 217 * the request up to the parent. 218 */ 219 return (bus_generic_alloc_resource(hr->hr_pcib, dev, type, rid, 220 start, end, count, flags)); 221 } 222 223 restart: 224 /* Try to allocate from each decoded range. */ 225 for (; rle != NULL; rle = STAILQ_NEXT(rle, link)) { 226 if (rle->type != type) 227 continue; 228 if (((flags & RF_PREFETCHABLE) != 0) != 229 ((rle->flags & RLE_PREFETCH) != 0)) 230 continue; 231 new_start = ummax(start, rle->start); 232 new_end = ummin(end, rle->end); 233 if (new_start > new_end || 234 new_start + count - 1 > new_end || 235 new_start + count < new_start) 236 continue; 237 r = bus_generic_alloc_resource(hr->hr_pcib, dev, type, rid, 238 new_start, new_end, count, flags); 239 if (r != NULL) { 240 if (bootverbose) 241 device_printf(hr->hr_pcib, 242 "allocated type %d (%#jx-%#jx) for rid %x of %s\n", 243 type, rman_get_start(r), rman_get_end(r), 244 *rid, pcib_child_name(dev)); 245 return (r); 246 } 247 } 248 249 /* 250 * If we failed to find a prefetch range for a memory 251 * resource, try again without prefetch. 252 */ 253 if (flags & RF_PREFETCHABLE) { 254 flags &= ~RF_PREFETCHABLE; 255 rle = resource_list_find(&hr->hr_rl, type, 0); 256 goto restart; 257 } 258 return (NULL); 259 } 260 261 int 262 pcib_host_res_adjust(struct pcib_host_resources *hr, device_t dev, 263 struct resource *r, rman_res_t start, rman_res_t end) 264 { 265 struct resource_list_entry *rle; 266 267 rle = resource_list_find(&hr->hr_rl, rman_get_type(r), 0); 268 if (rle == NULL) { 269 /* 270 * No decoding ranges for this resource type, just pass 271 * the request up to the parent. 272 */ 273 return (bus_generic_adjust_resource(hr->hr_pcib, dev, r, start, 274 end)); 275 } 276 277 /* Only allow adjustments that stay within a decoded range. */ 278 for (; rle != NULL; rle = STAILQ_NEXT(rle, link)) { 279 if (rle->start <= start && rle->end >= end) 280 return (bus_generic_adjust_resource(hr->hr_pcib, dev, 281 r, start, end)); 282 } 283 return (ERANGE); 284 } 285 286 #ifdef PCI_RES_BUS 287 struct pci_domain { 288 int pd_domain; 289 struct rman pd_bus_rman; 290 TAILQ_ENTRY(pci_domain) pd_link; 291 }; 292 293 static TAILQ_HEAD(, pci_domain) domains = TAILQ_HEAD_INITIALIZER(domains); 294 295 /* 296 * Each PCI domain maintains its own resource manager for PCI bus 297 * numbers in that domain. Domain objects are created on first use. 298 * Host to PCI bridge drivers and PCI-PCI bridge drivers should 299 * allocate their bus ranges from their domain. 300 */ 301 static struct pci_domain * 302 pci_find_domain(int domain) 303 { 304 struct pci_domain *d; 305 char buf[64]; 306 int error; 307 308 TAILQ_FOREACH(d, &domains, pd_link) { 309 if (d->pd_domain == domain) 310 return (d); 311 } 312 313 snprintf(buf, sizeof(buf), "PCI domain %d bus numbers", domain); 314 d = malloc(sizeof(*d) + strlen(buf) + 1, M_DEVBUF, M_WAITOK | M_ZERO); 315 d->pd_domain = domain; 316 d->pd_bus_rman.rm_start = 0; 317 d->pd_bus_rman.rm_end = PCI_BUSMAX; 318 d->pd_bus_rman.rm_type = RMAN_ARRAY; 319 strcpy((char *)(d + 1), buf); 320 d->pd_bus_rman.rm_descr = (char *)(d + 1); 321 error = rman_init(&d->pd_bus_rman); 322 if (error == 0) 323 error = rman_manage_region(&d->pd_bus_rman, 0, PCI_BUSMAX); 324 if (error) 325 panic("Failed to initialize PCI domain %d rman", domain); 326 TAILQ_INSERT_TAIL(&domains, d, pd_link); 327 return (d); 328 } 329 330 struct resource * 331 pci_domain_alloc_bus(int domain, device_t dev, int *rid, rman_res_t start, 332 rman_res_t end, rman_res_t count, u_int flags) 333 { 334 struct pci_domain *d; 335 struct resource *res; 336 337 if (domain < 0 || domain > PCI_DOMAINMAX) 338 return (NULL); 339 d = pci_find_domain(domain); 340 res = rman_reserve_resource(&d->pd_bus_rman, start, end, count, flags, 341 dev); 342 if (res == NULL) 343 return (NULL); 344 345 rman_set_rid(res, *rid); 346 rman_set_type(res, PCI_RES_BUS); 347 return (res); 348 } 349 350 int 351 pci_domain_adjust_bus(int domain, device_t dev, struct resource *r, 352 rman_res_t start, rman_res_t end) 353 { 354 #ifdef INVARIANTS 355 struct pci_domain *d; 356 #endif 357 358 if (domain < 0 || domain > PCI_DOMAINMAX) 359 return (EINVAL); 360 #ifdef INVARIANTS 361 d = pci_find_domain(domain); 362 KASSERT(rman_is_region_manager(r, &d->pd_bus_rman), ("bad resource")); 363 #endif 364 return (rman_adjust_resource(r, start, end)); 365 } 366 367 int 368 pci_domain_release_bus(int domain, device_t dev, struct resource *r) 369 { 370 #ifdef INVARIANTS 371 struct pci_domain *d; 372 #endif 373 374 if (domain < 0 || domain > PCI_DOMAINMAX) 375 return (EINVAL); 376 #ifdef INVARIANTS 377 d = pci_find_domain(domain); 378 KASSERT(rman_is_region_manager(r, &d->pd_bus_rman), ("bad resource")); 379 #endif 380 return (rman_release_resource(r)); 381 } 382 383 int 384 pci_domain_activate_bus(int domain, device_t dev, struct resource *r) 385 { 386 #ifdef INVARIANTS 387 struct pci_domain *d; 388 #endif 389 390 if (domain < 0 || domain > PCI_DOMAINMAX) 391 return (EINVAL); 392 #ifdef INVARIANTS 393 d = pci_find_domain(domain); 394 KASSERT(rman_is_region_manager(r, &d->pd_bus_rman), ("bad resource")); 395 #endif 396 return (rman_activate_resource(r)); 397 } 398 399 int 400 pci_domain_deactivate_bus(int domain, device_t dev, struct resource *r) 401 { 402 #ifdef INVARIANTS 403 struct pci_domain *d; 404 #endif 405 406 if (domain < 0 || domain > PCI_DOMAINMAX) 407 return (EINVAL); 408 #ifdef INVARIANTS 409 d = pci_find_domain(domain); 410 KASSERT(rman_is_region_manager(r, &d->pd_bus_rman), ("bad resource")); 411 #endif 412 return (rman_deactivate_resource(r)); 413 } 414 #endif /* PCI_RES_BUS */ 415