1 /*- 2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 3 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000, BSDi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 * 30 */ 31 32 #ifndef _PCI_PRIVATE_H_ 33 #define _PCI_PRIVATE_H_ 34 35 /* 36 * Export definitions of the pci bus so that we can more easily share 37 * it with "subclass" busses. 38 */ 39 DECLARE_CLASS(pci_driver); 40 41 struct pci_softc { 42 bus_dma_tag_t sc_dma_tag; 43 #ifdef PCI_RES_BUS 44 struct resource *sc_bus; 45 #endif 46 }; 47 48 extern int pci_do_power_resume; 49 extern int pci_do_power_suspend; 50 51 void pci_add_children(device_t dev, int domain, int busno, 52 size_t dinfo_size); 53 void pci_add_child(device_t bus, struct pci_devinfo *dinfo); 54 device_t pci_add_iov_child(device_t bus, device_t pf, size_t dinfo_size, 55 uint16_t rid, uint16_t vid, uint16_t did); 56 void pci_add_resources(device_t bus, device_t dev, int force, 57 uint32_t prefetchmask); 58 int pci_attach_common(device_t dev); 59 void pci_delete_child(device_t dev, device_t child); 60 void pci_driver_added(device_t dev, driver_t *driver); 61 int pci_print_child(device_t dev, device_t child); 62 void pci_probe_nomatch(device_t dev, device_t child); 63 int pci_read_ivar(device_t dev, device_t child, int which, 64 uintptr_t *result); 65 int pci_write_ivar(device_t dev, device_t child, int which, 66 uintptr_t value); 67 int pci_setup_intr(device_t dev, device_t child, 68 struct resource *irq, int flags, driver_filter_t *filter, 69 driver_intr_t *intr, void *arg, void **cookiep); 70 int pci_teardown_intr(device_t dev, device_t child, 71 struct resource *irq, void *cookie); 72 int pci_get_vpd_ident_method(device_t dev, device_t child, 73 const char **identptr); 74 int pci_get_vpd_readonly_method(device_t dev, device_t child, 75 const char *kw, const char **vptr); 76 int pci_set_powerstate_method(device_t dev, device_t child, 77 int state); 78 int pci_get_powerstate_method(device_t dev, device_t child); 79 uint32_t pci_read_config_method(device_t dev, device_t child, 80 int reg, int width); 81 void pci_write_config_method(device_t dev, device_t child, 82 int reg, uint32_t val, int width); 83 int pci_enable_busmaster_method(device_t dev, device_t child); 84 int pci_disable_busmaster_method(device_t dev, device_t child); 85 int pci_enable_io_method(device_t dev, device_t child, int space); 86 int pci_disable_io_method(device_t dev, device_t child, int space); 87 int pci_find_cap_method(device_t dev, device_t child, 88 int capability, int *capreg); 89 int pci_find_extcap_method(device_t dev, device_t child, 90 int capability, int *capreg); 91 int pci_find_htcap_method(device_t dev, device_t child, 92 int capability, int *capreg); 93 int pci_alloc_msi_method(device_t dev, device_t child, int *count); 94 int pci_alloc_msix_method(device_t dev, device_t child, int *count); 95 void pci_enable_msi_method(device_t dev, device_t child, 96 uint64_t address, uint16_t data); 97 void pci_enable_msix_method(device_t dev, device_t child, 98 u_int index, uint64_t address, uint32_t data); 99 void pci_disable_msi_method(device_t dev, device_t child); 100 int pci_remap_msix_method(device_t dev, device_t child, 101 int count, const u_int *vectors); 102 int pci_release_msi_method(device_t dev, device_t child); 103 int pci_msi_count_method(device_t dev, device_t child); 104 int pci_msix_count_method(device_t dev, device_t child); 105 struct resource *pci_alloc_resource(device_t dev, device_t child, 106 int type, int *rid, u_long start, u_long end, u_long count, 107 u_int flags); 108 int pci_release_resource(device_t dev, device_t child, int type, 109 int rid, struct resource *r); 110 int pci_activate_resource(device_t dev, device_t child, int type, 111 int rid, struct resource *r); 112 int pci_deactivate_resource(device_t dev, device_t child, int type, 113 int rid, struct resource *r); 114 void pci_delete_resource(device_t dev, device_t child, 115 int type, int rid); 116 struct resource_list *pci_get_resource_list (device_t dev, device_t child); 117 struct pci_devinfo *pci_read_device(device_t pcib, int d, int b, int s, int f, 118 size_t size); 119 void pci_print_verbose(struct pci_devinfo *dinfo); 120 int pci_freecfg(struct pci_devinfo *dinfo); 121 void pci_child_detached(device_t dev, device_t child); 122 int pci_child_location_str_method(device_t cbdev, device_t child, 123 char *buf, size_t buflen); 124 int pci_child_pnpinfo_str_method(device_t cbdev, device_t child, 125 char *buf, size_t buflen); 126 int pci_assign_interrupt_method(device_t dev, device_t child); 127 int pci_resume(device_t dev); 128 int pci_resume_child(device_t dev, device_t child); 129 int pci_suspend_child(device_t dev, device_t child); 130 bus_dma_tag_t pci_get_dma_tag(device_t bus, device_t dev); 131 void pci_child_added_method(device_t dev, device_t child); 132 133 /** Restore the config register state. The state must be previously 134 * saved with pci_cfg_save. However, the pci bus driver takes care of 135 * that. This function will also return the device to PCI_POWERSTATE_D0 136 * if it is currently in a lower power mode. 137 */ 138 void pci_cfg_restore(device_t, struct pci_devinfo *); 139 140 /** Save the config register state. Optionally set the power state to D3 141 * if the third argument is non-zero. 142 */ 143 void pci_cfg_save(device_t, struct pci_devinfo *, int); 144 145 int pci_mapsize(uint64_t testval); 146 void pci_read_bar(device_t dev, int reg, pci_addr_t *mapp, 147 pci_addr_t *testvalp, int *bar64); 148 struct pci_map *pci_add_bar(device_t dev, int reg, pci_addr_t value, 149 pci_addr_t size); 150 151 struct resource *pci_alloc_multi_resource(device_t dev, device_t child, 152 int type, int *rid, u_long start, u_long end, u_long count, 153 u_long num, u_int flags); 154 155 int pci_iov_attach_method(device_t bus, device_t dev, 156 struct nvlist *pf_schema, struct nvlist *vf_schema); 157 int pci_iov_detach_method(device_t bus, device_t dev); 158 159 device_t pci_create_iov_child_method(device_t bus, device_t pf, 160 uint16_t rid, uint16_t vid, uint16_t did); 161 162 struct resource *pci_vf_alloc_mem_resource(device_t dev, device_t child, 163 int *rid, u_long start, u_long end, u_long count, 164 u_int flags); 165 int pci_vf_release_mem_resource(device_t dev, device_t child, 166 int rid, struct resource *r); 167 #endif /* _PCI_PRIVATE_H_ */ 168