1 /*- 2 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 3 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000, BSDi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice unmodified, this list of conditions, and the following 12 * disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 * 30 */ 31 32 #ifndef _PCI_PRIVATE_H_ 33 #define _PCI_PRIVATE_H_ 34 35 /* 36 * Export definitions of the pci bus so that we can more easily share 37 * it with "subclass" busses. 38 */ 39 DECLARE_CLASS(pci_driver); 40 41 struct pci_softc { 42 bus_dma_tag_t sc_dma_tag; 43 #ifdef PCI_RES_BUS 44 struct resource *sc_bus; 45 #endif 46 }; 47 48 extern int pci_do_power_resume; 49 extern int pci_do_power_suspend; 50 51 void pci_add_children(device_t dev, int domain, int busno, 52 size_t dinfo_size); 53 void pci_add_child(device_t bus, struct pci_devinfo *dinfo); 54 device_t pci_add_iov_child(device_t bus, device_t pf, size_t dinfo_size, 55 uint16_t rid, uint16_t vid, uint16_t did); 56 void pci_add_resources(device_t bus, device_t dev, int force, 57 uint32_t prefetchmask); 58 void pci_add_resources_ea(device_t bus, device_t dev, int alloc_iov); 59 int pci_attach_common(device_t dev); 60 void pci_delete_child(device_t dev, device_t child); 61 void pci_driver_added(device_t dev, driver_t *driver); 62 int pci_ea_is_enabled(device_t dev, int rid); 63 int pci_print_child(device_t dev, device_t child); 64 void pci_probe_nomatch(device_t dev, device_t child); 65 int pci_read_ivar(device_t dev, device_t child, int which, 66 uintptr_t *result); 67 int pci_write_ivar(device_t dev, device_t child, int which, 68 uintptr_t value); 69 int pci_setup_intr(device_t dev, device_t child, 70 struct resource *irq, int flags, driver_filter_t *filter, 71 driver_intr_t *intr, void *arg, void **cookiep); 72 int pci_teardown_intr(device_t dev, device_t child, 73 struct resource *irq, void *cookie); 74 int pci_get_vpd_ident_method(device_t dev, device_t child, 75 const char **identptr); 76 int pci_get_vpd_readonly_method(device_t dev, device_t child, 77 const char *kw, const char **vptr); 78 int pci_set_powerstate_method(device_t dev, device_t child, 79 int state); 80 int pci_get_powerstate_method(device_t dev, device_t child); 81 uint32_t pci_read_config_method(device_t dev, device_t child, 82 int reg, int width); 83 void pci_write_config_method(device_t dev, device_t child, 84 int reg, uint32_t val, int width); 85 int pci_enable_busmaster_method(device_t dev, device_t child); 86 int pci_disable_busmaster_method(device_t dev, device_t child); 87 int pci_enable_io_method(device_t dev, device_t child, int space); 88 int pci_disable_io_method(device_t dev, device_t child, int space); 89 int pci_find_cap_method(device_t dev, device_t child, 90 int capability, int *capreg); 91 int pci_find_extcap_method(device_t dev, device_t child, 92 int capability, int *capreg); 93 int pci_find_htcap_method(device_t dev, device_t child, 94 int capability, int *capreg); 95 int pci_alloc_msi_method(device_t dev, device_t child, int *count); 96 int pci_alloc_msix_method(device_t dev, device_t child, int *count); 97 void pci_enable_msi_method(device_t dev, device_t child, 98 uint64_t address, uint16_t data); 99 void pci_enable_msix_method(device_t dev, device_t child, 100 u_int index, uint64_t address, uint32_t data); 101 void pci_disable_msi_method(device_t dev, device_t child); 102 int pci_remap_msix_method(device_t dev, device_t child, 103 int count, const u_int *vectors); 104 int pci_release_msi_method(device_t dev, device_t child); 105 int pci_msi_count_method(device_t dev, device_t child); 106 int pci_msix_count_method(device_t dev, device_t child); 107 int pci_msix_pba_bar_method(device_t dev, device_t child); 108 int pci_msix_table_bar_method(device_t dev, device_t child); 109 struct resource *pci_alloc_resource(device_t dev, device_t child, 110 int type, int *rid, rman_res_t start, rman_res_t end, 111 rman_res_t count, u_int flags); 112 int pci_release_resource(device_t dev, device_t child, int type, 113 int rid, struct resource *r); 114 int pci_activate_resource(device_t dev, device_t child, int type, 115 int rid, struct resource *r); 116 int pci_deactivate_resource(device_t dev, device_t child, int type, 117 int rid, struct resource *r); 118 void pci_delete_resource(device_t dev, device_t child, 119 int type, int rid); 120 struct resource_list *pci_get_resource_list (device_t dev, device_t child); 121 struct pci_devinfo *pci_read_device(device_t pcib, int d, int b, int s, int f, 122 size_t size); 123 void pci_print_verbose(struct pci_devinfo *dinfo); 124 int pci_freecfg(struct pci_devinfo *dinfo); 125 void pci_child_detached(device_t dev, device_t child); 126 int pci_child_location_str_method(device_t cbdev, device_t child, 127 char *buf, size_t buflen); 128 int pci_child_pnpinfo_str_method(device_t cbdev, device_t child, 129 char *buf, size_t buflen); 130 int pci_assign_interrupt_method(device_t dev, device_t child); 131 int pci_resume(device_t dev); 132 int pci_resume_child(device_t dev, device_t child); 133 int pci_suspend_child(device_t dev, device_t child); 134 bus_dma_tag_t pci_get_dma_tag(device_t bus, device_t dev); 135 void pci_child_added_method(device_t dev, device_t child); 136 137 /** Restore the config register state. The state must be previously 138 * saved with pci_cfg_save. However, the pci bus driver takes care of 139 * that. This function will also return the device to PCI_POWERSTATE_D0 140 * if it is currently in a lower power mode. 141 */ 142 void pci_cfg_restore(device_t, struct pci_devinfo *); 143 144 /** Save the config register state. Optionally set the power state to D3 145 * if the third argument is non-zero. 146 */ 147 void pci_cfg_save(device_t, struct pci_devinfo *, int); 148 149 int pci_mapsize(uint64_t testval); 150 void pci_read_bar(device_t dev, int reg, pci_addr_t *mapp, 151 pci_addr_t *testvalp, int *bar64); 152 struct pci_map *pci_add_bar(device_t dev, int reg, pci_addr_t value, 153 pci_addr_t size); 154 155 struct resource *pci_alloc_multi_resource(device_t dev, device_t child, 156 int type, int *rid, rman_res_t start, rman_res_t end, 157 rman_res_t count, u_long num, u_int flags); 158 159 int pci_iov_attach_method(device_t bus, device_t dev, 160 struct nvlist *pf_schema, struct nvlist *vf_schema); 161 int pci_iov_detach_method(device_t bus, device_t dev); 162 163 device_t pci_create_iov_child_method(device_t bus, device_t pf, 164 uint16_t rid, uint16_t vid, uint16_t did); 165 166 struct resource *pci_vf_alloc_mem_resource(device_t dev, device_t child, 167 int *rid, rman_res_t start, rman_res_t end, 168 rman_res_t count, u_int flags); 169 int pci_vf_release_mem_resource(device_t dev, device_t child, 170 int rid, struct resource *r); 171 #endif /* _PCI_PRIVATE_H_ */ 172