1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> 5 * Copyright (c) 2000, Michael Smith <msmith@freebsd.org> 6 * Copyright (c) 2000, BSDi 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice unmodified, this list of conditions, and the following 14 * disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 */ 31 32 #ifndef _PCI_PRIVATE_H_ 33 #define _PCI_PRIVATE_H_ 34 35 /* 36 * Export definitions of the pci bus so that we can more easily share 37 * it with "subclass" buses. 38 */ 39 DECLARE_CLASS(pci_driver); 40 41 struct pci_softc { 42 bus_dma_tag_t sc_dma_tag; 43 struct resource *sc_bus; 44 }; 45 46 extern int pci_do_power_resume; 47 extern int pci_do_power_suspend; 48 49 50 device_attach_t pci_attach; 51 device_detach_t pci_detach; 52 device_resume_t pci_resume; 53 54 bus_print_child_t pci_print_child; 55 bus_probe_nomatch_t pci_probe_nomatch; 56 bus_read_ivar_t pci_read_ivar; 57 bus_write_ivar_t pci_write_ivar; 58 bus_driver_added_t pci_driver_added; 59 bus_setup_intr_t pci_setup_intr; 60 bus_teardown_intr_t pci_teardown_intr; 61 62 bus_get_dma_tag_t pci_get_dma_tag; 63 bus_get_resource_list_t pci_get_resource_list; 64 bus_delete_resource_t pci_delete_resource; 65 bus_alloc_resource_t pci_alloc_resource; 66 #ifdef PCI_IOV 67 bus_adjust_resource_t pci_adjust_resource; 68 #endif 69 bus_release_resource_t pci_release_resource; 70 bus_activate_resource_t pci_activate_resource; 71 bus_deactivate_resource_t pci_deactivate_resource; 72 #ifdef PCI_IOV 73 bus_map_resource_t pci_map_resource; 74 bus_unmap_resource_t pci_unmap_resource; 75 #endif 76 bus_child_deleted_t pci_child_deleted; 77 bus_child_detached_t pci_child_detached; 78 bus_child_pnpinfo_t pci_child_pnpinfo_method; 79 bus_child_location_t pci_child_location_method; 80 bus_get_device_path_t pci_get_device_path_method; 81 bus_suspend_child_t pci_suspend_child; 82 bus_resume_child_t pci_resume_child; 83 bus_rescan_t pci_rescan_method; 84 85 pci_read_config_t pci_read_config_method; 86 pci_write_config_t pci_write_config_method; 87 pci_enable_busmaster_t pci_enable_busmaster_method; 88 pci_disable_busmaster_t pci_disable_busmaster_method; 89 pci_enable_io_t pci_enable_io_method; 90 pci_disable_io_t pci_disable_io_method; 91 pci_get_vpd_ident_t pci_get_vpd_ident_method; 92 pci_get_vpd_readonly_t pci_get_vpd_readonly_method; 93 pci_get_powerstate_t pci_get_powerstate_method; 94 pci_set_powerstate_t pci_set_powerstate_method; 95 pci_assign_interrupt_t pci_assign_interrupt_method; 96 pci_find_cap_t pci_find_cap_method; 97 pci_find_next_cap_t pci_find_next_cap_method; 98 pci_find_extcap_t pci_find_extcap_method; 99 pci_find_next_extcap_t pci_find_next_extcap_method; 100 pci_find_htcap_t pci_find_htcap_method; 101 pci_find_next_htcap_t pci_find_next_htcap_method; 102 pci_alloc_msi_t pci_alloc_msi_method; 103 pci_alloc_msix_t pci_alloc_msix_method; 104 pci_enable_msi_t pci_enable_msi_method; 105 pci_enable_msix_t pci_enable_msix_method; 106 pci_disable_msi_t pci_disable_msi_method; 107 pci_remap_msix_t pci_remap_msix_method; 108 pci_release_msi_t pci_release_msi_method; 109 pci_msi_count_t pci_msi_count_method; 110 pci_msix_count_t pci_msix_count_method; 111 pci_msix_pba_bar_t pci_msix_pba_bar_method; 112 pci_msix_table_bar_t pci_msix_table_bar_method; 113 pci_alloc_devinfo_t pci_alloc_devinfo_method; 114 pci_child_added_t pci_child_added_method; 115 #ifdef PCI_IOV 116 pci_iov_attach_t pci_iov_attach_method; 117 pci_iov_detach_t pci_iov_detach_method; 118 pci_create_iov_child_t pci_create_iov_child_method; 119 #endif 120 121 void pci_add_children(device_t dev, int domain, int busno); 122 void pci_add_child(device_t bus, struct pci_devinfo *dinfo); 123 device_t pci_add_iov_child(device_t bus, device_t pf, uint16_t rid, 124 uint16_t vid, uint16_t did); 125 void pci_add_resources(device_t bus, device_t dev, int force, 126 uint32_t prefetchmask); 127 void pci_add_resources_ea(device_t bus, device_t dev, int alloc_iov); 128 int pci_attach_common(device_t dev); 129 int pci_ea_is_enabled(device_t dev, int rid); 130 struct pci_devinfo *pci_read_device(device_t pcib, device_t bus, int d, int b, 131 int s, int f); 132 void pci_print_verbose(struct pci_devinfo *dinfo); 133 int pci_freecfg(struct pci_devinfo *dinfo); 134 135 /** Restore the config register state. The state must be previously 136 * saved with pci_cfg_save. However, the pci bus driver takes care of 137 * that. This function will also return the device to PCI_POWERSTATE_D0 138 * if it is currently in a lower power mode. 139 */ 140 void pci_cfg_restore(device_t, struct pci_devinfo *); 141 142 /** Save the config register state. Optionally set the power state to D3 143 * if the third argument is non-zero. 144 */ 145 void pci_cfg_save(device_t, struct pci_devinfo *, int); 146 147 int pci_mapsize(uint64_t testval); 148 void pci_read_bar(device_t dev, int reg, pci_addr_t *mapp, 149 pci_addr_t *testvalp, int *bar64); 150 struct pci_map *pci_add_bar(device_t dev, int reg, pci_addr_t value, 151 pci_addr_t size); 152 153 struct resource *pci_reserve_map(device_t dev, device_t child, int type, 154 int *rid, rman_res_t start, rman_res_t end, 155 rman_res_t count, u_int num, u_int flags); 156 157 struct resource *pci_alloc_multi_resource(device_t dev, device_t child, 158 int type, int *rid, rman_res_t start, rman_res_t end, 159 rman_res_t count, u_long num, u_int flags); 160 161 struct resource *pci_vf_alloc_mem_resource(device_t dev, device_t child, 162 int *rid, rman_res_t start, rman_res_t end, 163 rman_res_t count, u_int flags); 164 int pci_vf_release_mem_resource(device_t dev, device_t child, 165 struct resource *r); 166 int pci_vf_activate_mem_resource(device_t dev, device_t child, 167 struct resource *r); 168 int pci_vf_deactivate_mem_resource(device_t dev, device_t child, 169 struct resource *r); 170 int pci_vf_adjust_mem_resource(device_t dev, device_t child, 171 struct resource *r, rman_res_t start, rman_res_t end); 172 int pci_vf_map_mem_resource(device_t dev, device_t child, 173 struct resource *r, struct resource_map_request *argsp, 174 struct resource_map *map); 175 int pci_vf_unmap_mem_resource(device_t dev, device_t child, 176 struct resource *r, struct resource_map *map); 177 178 #endif /* _PCI_PRIVATE_H_ */ 179