xref: /freebsd/sys/dev/pci/pci_pci.c (revision 5db2a4a8129dcf4b2d4c6ddfe4ad980a4c8657e2)
1bb0d0a8eSMike Smith /*-
2718cf2ccSPedro F. Giffuni  * SPDX-License-Identifier: BSD-3-Clause
3718cf2ccSPedro F. Giffuni  *
4bb0d0a8eSMike Smith  * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
5bb0d0a8eSMike Smith  * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
6bb0d0a8eSMike Smith  * Copyright (c) 2000 BSDi
7bb0d0a8eSMike Smith  * All rights reserved.
8bb0d0a8eSMike Smith  *
9bb0d0a8eSMike Smith  * Redistribution and use in source and binary forms, with or without
10bb0d0a8eSMike Smith  * modification, are permitted provided that the following conditions
11bb0d0a8eSMike Smith  * are met:
12bb0d0a8eSMike Smith  * 1. Redistributions of source code must retain the above copyright
13bb0d0a8eSMike Smith  *    notice, this list of conditions and the following disclaimer.
14bb0d0a8eSMike Smith  * 2. Redistributions in binary form must reproduce the above copyright
15bb0d0a8eSMike Smith  *    notice, this list of conditions and the following disclaimer in the
16bb0d0a8eSMike Smith  *    documentation and/or other materials provided with the distribution.
17bb0d0a8eSMike Smith  * 3. The name of the author may not be used to endorse or promote products
18bb0d0a8eSMike Smith  *    derived from this software without specific prior written permission.
19bb0d0a8eSMike Smith  *
20bb0d0a8eSMike Smith  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21bb0d0a8eSMike Smith  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22bb0d0a8eSMike Smith  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23bb0d0a8eSMike Smith  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24bb0d0a8eSMike Smith  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25bb0d0a8eSMike Smith  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26bb0d0a8eSMike Smith  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27bb0d0a8eSMike Smith  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28bb0d0a8eSMike Smith  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29bb0d0a8eSMike Smith  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30bb0d0a8eSMike Smith  * SUCH DAMAGE.
31bb0d0a8eSMike Smith  */
32bb0d0a8eSMike Smith 
33aad970f1SDavid E. O'Brien #include <sys/cdefs.h>
34aad970f1SDavid E. O'Brien __FBSDID("$FreeBSD$");
35aad970f1SDavid E. O'Brien 
36bb0d0a8eSMike Smith /*
37bb0d0a8eSMike Smith  * PCI:PCI bridge support.
38bb0d0a8eSMike Smith  */
39bb0d0a8eSMike Smith 
4082cb5c3bSJohn Baldwin #include "opt_pci.h"
4182cb5c3bSJohn Baldwin 
42bb0d0a8eSMike Smith #include <sys/param.h>
43bb0d0a8eSMike Smith #include <sys/bus.h>
4483c41143SJohn Baldwin #include <sys/kernel.h>
4583c41143SJohn Baldwin #include <sys/malloc.h>
4683c41143SJohn Baldwin #include <sys/module.h>
47*5db2a4a8SKonstantin Belousov #include <sys/pciio.h>
48a8b354a8SWarner Losh #include <sys/rman.h>
491c54ff33SMatthew N. Dodd #include <sys/sysctl.h>
5083c41143SJohn Baldwin #include <sys/systm.h>
5182cb5c3bSJohn Baldwin #include <sys/taskqueue.h>
52bb0d0a8eSMike Smith 
5338d8c994SWarner Losh #include <dev/pci/pcivar.h>
5438d8c994SWarner Losh #include <dev/pci/pcireg.h>
5562508c53SJohn Baldwin #include <dev/pci/pci_private.h>
5638d8c994SWarner Losh #include <dev/pci/pcib_private.h>
57bb0d0a8eSMike Smith 
58bb0d0a8eSMike Smith #include "pcib_if.h"
59bb0d0a8eSMike Smith 
60bb0d0a8eSMike Smith static int		pcib_probe(device_t dev);
61e36af292SJung-uk Kim static int		pcib_suspend(device_t dev);
62e36af292SJung-uk Kim static int		pcib_resume(device_t dev);
6362508c53SJohn Baldwin static int		pcib_power_for_sleep(device_t pcib, device_t dev,
6462508c53SJohn Baldwin 			    int *pstate);
65d7be980dSAndrew Turner static int		pcib_ari_get_id(device_t pcib, device_t dev,
66d7be980dSAndrew Turner     enum pci_id_type type, uintptr_t *id);
6755d3ea17SRyan Stone static uint32_t		pcib_read_config(device_t dev, u_int b, u_int s,
6855d3ea17SRyan Stone     u_int f, u_int reg, int width);
6955d3ea17SRyan Stone static void		pcib_write_config(device_t dev, u_int b, u_int s,
7055d3ea17SRyan Stone     u_int f, u_int reg, uint32_t val, int width);
7155d3ea17SRyan Stone static int		pcib_ari_maxslots(device_t dev);
7255d3ea17SRyan Stone static int		pcib_ari_maxfuncs(device_t dev);
7355d3ea17SRyan Stone static int		pcib_try_enable_ari(device_t pcib, device_t dev);
742397d2d8SRyan Stone static int		pcib_ari_enabled(device_t pcib);
752397d2d8SRyan Stone static void		pcib_ari_decode_rid(device_t pcib, uint16_t rid,
762397d2d8SRyan Stone 			    int *bus, int *slot, int *func);
7782cb5c3bSJohn Baldwin #ifdef PCI_HP
7882cb5c3bSJohn Baldwin static void		pcib_pcie_ab_timeout(void *arg);
7982cb5c3bSJohn Baldwin static void		pcib_pcie_cc_timeout(void *arg);
8082cb5c3bSJohn Baldwin static void		pcib_pcie_dll_timeout(void *arg);
8182cb5c3bSJohn Baldwin #endif
821ffd07bdSJohn Baldwin static int		pcib_request_feature_default(device_t pcib, device_t dev,
834cb67729SWarner Losh 			    enum pci_feature feature);
84*5db2a4a8SKonstantin Belousov static int		pcib_reset_child(device_t dev, device_t child, int flags);
85bb0d0a8eSMike Smith 
86bb0d0a8eSMike Smith static device_method_t pcib_methods[] = {
87bb0d0a8eSMike Smith     /* Device interface */
88bb0d0a8eSMike Smith     DEVMETHOD(device_probe,		pcib_probe),
89bb0d0a8eSMike Smith     DEVMETHOD(device_attach,		pcib_attach),
906f33eaa5SJohn Baldwin     DEVMETHOD(device_detach,		pcib_detach),
91bb0d0a8eSMike Smith     DEVMETHOD(device_shutdown,		bus_generic_shutdown),
92e36af292SJung-uk Kim     DEVMETHOD(device_suspend,		pcib_suspend),
93e36af292SJung-uk Kim     DEVMETHOD(device_resume,		pcib_resume),
94bb0d0a8eSMike Smith 
95bb0d0a8eSMike Smith     /* Bus interface */
9682cb5c3bSJohn Baldwin     DEVMETHOD(bus_child_present,	pcib_child_present),
97bb0d0a8eSMike Smith     DEVMETHOD(bus_read_ivar,		pcib_read_ivar),
98bb0d0a8eSMike Smith     DEVMETHOD(bus_write_ivar,		pcib_write_ivar),
99bb0d0a8eSMike Smith     DEVMETHOD(bus_alloc_resource,	pcib_alloc_resource),
10083c41143SJohn Baldwin #ifdef NEW_PCIB
10183c41143SJohn Baldwin     DEVMETHOD(bus_adjust_resource,	pcib_adjust_resource),
10283c41143SJohn Baldwin     DEVMETHOD(bus_release_resource,	pcib_release_resource),
10383c41143SJohn Baldwin #else
104d2c9344fSJohn Baldwin     DEVMETHOD(bus_adjust_resource,	bus_generic_adjust_resource),
105bb0d0a8eSMike Smith     DEVMETHOD(bus_release_resource,	bus_generic_release_resource),
10683c41143SJohn Baldwin #endif
107bb0d0a8eSMike Smith     DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
108bb0d0a8eSMike Smith     DEVMETHOD(bus_deactivate_resource,	bus_generic_deactivate_resource),
109bb0d0a8eSMike Smith     DEVMETHOD(bus_setup_intr,		bus_generic_setup_intr),
110bb0d0a8eSMike Smith     DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
111*5db2a4a8SKonstantin Belousov     DEVMETHOD(bus_reset_child,		pcib_reset_child),
112bb0d0a8eSMike Smith 
113bb0d0a8eSMike Smith     /* pcib interface */
11455d3ea17SRyan Stone     DEVMETHOD(pcib_maxslots,		pcib_ari_maxslots),
11555d3ea17SRyan Stone     DEVMETHOD(pcib_maxfuncs,		pcib_ari_maxfuncs),
116bb0d0a8eSMike Smith     DEVMETHOD(pcib_read_config,		pcib_read_config),
117bb0d0a8eSMike Smith     DEVMETHOD(pcib_write_config,	pcib_write_config),
118bb0d0a8eSMike Smith     DEVMETHOD(pcib_route_interrupt,	pcib_route_interrupt),
1199bf4c9c1SJohn Baldwin     DEVMETHOD(pcib_alloc_msi,		pcib_alloc_msi),
1209bf4c9c1SJohn Baldwin     DEVMETHOD(pcib_release_msi,		pcib_release_msi),
1219bf4c9c1SJohn Baldwin     DEVMETHOD(pcib_alloc_msix,		pcib_alloc_msix),
1229bf4c9c1SJohn Baldwin     DEVMETHOD(pcib_release_msix,	pcib_release_msix),
123e706f7f0SJohn Baldwin     DEVMETHOD(pcib_map_msi,		pcib_map_msi),
12462508c53SJohn Baldwin     DEVMETHOD(pcib_power_for_sleep,	pcib_power_for_sleep),
125d7be980dSAndrew Turner     DEVMETHOD(pcib_get_id,		pcib_ari_get_id),
12655d3ea17SRyan Stone     DEVMETHOD(pcib_try_enable_ari,	pcib_try_enable_ari),
1272397d2d8SRyan Stone     DEVMETHOD(pcib_ari_enabled,		pcib_ari_enabled),
1282397d2d8SRyan Stone     DEVMETHOD(pcib_decode_rid,		pcib_ari_decode_rid),
1291ffd07bdSJohn Baldwin     DEVMETHOD(pcib_request_feature,	pcib_request_feature_default),
130bb0d0a8eSMike Smith 
1314b7ec270SMarius Strobl     DEVMETHOD_END
132bb0d0a8eSMike Smith };
133bb0d0a8eSMike Smith 
13404dda605SJohn Baldwin static devclass_t pcib_devclass;
135bb0d0a8eSMike Smith 
13604dda605SJohn Baldwin DEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc));
137bfed756aSJustin Hibbits EARLY_DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, NULL, NULL,
138bfed756aSJustin Hibbits     BUS_PASS_BUS);
139bb0d0a8eSMike Smith 
1406ca2d094SBjoern A. Zeeb #if defined(NEW_PCIB) || defined(PCI_HP)
1410070c94bSJohn Baldwin SYSCTL_DECL(_hw_pci);
1426ca2d094SBjoern A. Zeeb #endif
1430070c94bSJohn Baldwin 
1446ca2d094SBjoern A. Zeeb #ifdef NEW_PCIB
1450070c94bSJohn Baldwin static int pci_clear_pcib;
1460070c94bSJohn Baldwin SYSCTL_INT(_hw_pci, OID_AUTO, clear_pcib, CTLFLAG_RDTUN, &pci_clear_pcib, 0,
1470070c94bSJohn Baldwin     "Clear firmware-assigned resources for PCI-PCI bridge I/O windows.");
14883c41143SJohn Baldwin 
14983c41143SJohn Baldwin /*
15083c41143SJohn Baldwin  * Is a resource from a child device sub-allocated from one of our
15183c41143SJohn Baldwin  * resource managers?
15283c41143SJohn Baldwin  */
15383c41143SJohn Baldwin static int
15483c41143SJohn Baldwin pcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r)
15583c41143SJohn Baldwin {
15683c41143SJohn Baldwin 
15783c41143SJohn Baldwin 	switch (type) {
1584edef187SJohn Baldwin #ifdef PCI_RES_BUS
1594edef187SJohn Baldwin 	case PCI_RES_BUS:
1604edef187SJohn Baldwin 		return (rman_is_region_manager(r, &sc->bus.rman));
1614edef187SJohn Baldwin #endif
16283c41143SJohn Baldwin 	case SYS_RES_IOPORT:
16383c41143SJohn Baldwin 		return (rman_is_region_manager(r, &sc->io.rman));
16483c41143SJohn Baldwin 	case SYS_RES_MEMORY:
16583c41143SJohn Baldwin 		/* Prefetchable resources may live in either memory rman. */
16683c41143SJohn Baldwin 		if (rman_get_flags(r) & RF_PREFETCHABLE &&
16783c41143SJohn Baldwin 		    rman_is_region_manager(r, &sc->pmem.rman))
16883c41143SJohn Baldwin 			return (1);
16983c41143SJohn Baldwin 		return (rman_is_region_manager(r, &sc->mem.rman));
17083c41143SJohn Baldwin 	}
17183c41143SJohn Baldwin 	return (0);
17283c41143SJohn Baldwin }
17383c41143SJohn Baldwin 
17483c41143SJohn Baldwin static int
17583c41143SJohn Baldwin pcib_is_window_open(struct pcib_window *pw)
17683c41143SJohn Baldwin {
17783c41143SJohn Baldwin 
17883c41143SJohn Baldwin 	return (pw->valid && pw->base < pw->limit);
17983c41143SJohn Baldwin }
18083c41143SJohn Baldwin 
18183c41143SJohn Baldwin /*
18283c41143SJohn Baldwin  * XXX: If RF_ACTIVE did not also imply allocating a bus space tag and
18383c41143SJohn Baldwin  * handle for the resource, we could pass RF_ACTIVE up to the PCI bus
18483c41143SJohn Baldwin  * when allocating the resource windows and rely on the PCI bus driver
18583c41143SJohn Baldwin  * to do this for us.
18683c41143SJohn Baldwin  */
18783c41143SJohn Baldwin static void
18883c41143SJohn Baldwin pcib_activate_window(struct pcib_softc *sc, int type)
18983c41143SJohn Baldwin {
19083c41143SJohn Baldwin 
19183c41143SJohn Baldwin 	PCI_ENABLE_IO(device_get_parent(sc->dev), sc->dev, type);
19283c41143SJohn Baldwin }
19383c41143SJohn Baldwin 
19483c41143SJohn Baldwin static void
19583c41143SJohn Baldwin pcib_write_windows(struct pcib_softc *sc, int mask)
19683c41143SJohn Baldwin {
19783c41143SJohn Baldwin 	device_t dev;
19883c41143SJohn Baldwin 	uint32_t val;
19983c41143SJohn Baldwin 
20083c41143SJohn Baldwin 	dev = sc->dev;
20183c41143SJohn Baldwin 	if (sc->io.valid && mask & WIN_IO) {
20283c41143SJohn Baldwin 		val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
20383c41143SJohn Baldwin 		if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
20483c41143SJohn Baldwin 			pci_write_config(dev, PCIR_IOBASEH_1,
20583c41143SJohn Baldwin 			    sc->io.base >> 16, 2);
20683c41143SJohn Baldwin 			pci_write_config(dev, PCIR_IOLIMITH_1,
20783c41143SJohn Baldwin 			    sc->io.limit >> 16, 2);
20883c41143SJohn Baldwin 		}
20983c41143SJohn Baldwin 		pci_write_config(dev, PCIR_IOBASEL_1, sc->io.base >> 8, 1);
21083c41143SJohn Baldwin 		pci_write_config(dev, PCIR_IOLIMITL_1, sc->io.limit >> 8, 1);
21183c41143SJohn Baldwin 	}
21283c41143SJohn Baldwin 
21383c41143SJohn Baldwin 	if (mask & WIN_MEM) {
21483c41143SJohn Baldwin 		pci_write_config(dev, PCIR_MEMBASE_1, sc->mem.base >> 16, 2);
21583c41143SJohn Baldwin 		pci_write_config(dev, PCIR_MEMLIMIT_1, sc->mem.limit >> 16, 2);
21683c41143SJohn Baldwin 	}
21783c41143SJohn Baldwin 
21883c41143SJohn Baldwin 	if (sc->pmem.valid && mask & WIN_PMEM) {
21983c41143SJohn Baldwin 		val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
22083c41143SJohn Baldwin 		if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
22183c41143SJohn Baldwin 			pci_write_config(dev, PCIR_PMBASEH_1,
22283c41143SJohn Baldwin 			    sc->pmem.base >> 32, 4);
22383c41143SJohn Baldwin 			pci_write_config(dev, PCIR_PMLIMITH_1,
22483c41143SJohn Baldwin 			    sc->pmem.limit >> 32, 4);
22583c41143SJohn Baldwin 		}
22683c41143SJohn Baldwin 		pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2);
22783c41143SJohn Baldwin 		pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2);
22883c41143SJohn Baldwin 	}
22983c41143SJohn Baldwin }
23083c41143SJohn Baldwin 
231c825d4dcSJohn Baldwin /*
232c825d4dcSJohn Baldwin  * This is used to reject I/O port allocations that conflict with an
233c825d4dcSJohn Baldwin  * ISA alias range.
234c825d4dcSJohn Baldwin  */
235c825d4dcSJohn Baldwin static int
2362dd1bdf1SJustin Hibbits pcib_is_isa_range(struct pcib_softc *sc, rman_res_t start, rman_res_t end,
2372dd1bdf1SJustin Hibbits     rman_res_t count)
238c825d4dcSJohn Baldwin {
2392dd1bdf1SJustin Hibbits 	rman_res_t next_alias;
240c825d4dcSJohn Baldwin 
241c825d4dcSJohn Baldwin 	if (!(sc->bridgectl & PCIB_BCR_ISA_ENABLE))
242c825d4dcSJohn Baldwin 		return (0);
243c825d4dcSJohn Baldwin 
244c825d4dcSJohn Baldwin 	/* Only check fixed ranges for overlap. */
245c825d4dcSJohn Baldwin 	if (start + count - 1 != end)
246c825d4dcSJohn Baldwin 		return (0);
247c825d4dcSJohn Baldwin 
248c825d4dcSJohn Baldwin 	/* ISA aliases are only in the lower 64KB of I/O space. */
249c825d4dcSJohn Baldwin 	if (start >= 65536)
250c825d4dcSJohn Baldwin 		return (0);
251c825d4dcSJohn Baldwin 
252c825d4dcSJohn Baldwin 	/* Check for overlap with 0x000 - 0x0ff as a special case. */
253c825d4dcSJohn Baldwin 	if (start < 0x100)
254c825d4dcSJohn Baldwin 		goto alias;
255c825d4dcSJohn Baldwin 
256c825d4dcSJohn Baldwin 	/*
257c825d4dcSJohn Baldwin 	 * If the start address is an alias, the range is an alias.
258c825d4dcSJohn Baldwin 	 * Otherwise, compute the start of the next alias range and
259c825d4dcSJohn Baldwin 	 * check if it is before the end of the candidate range.
260c825d4dcSJohn Baldwin 	 */
261c825d4dcSJohn Baldwin 	if ((start & 0x300) != 0)
262c825d4dcSJohn Baldwin 		goto alias;
263c825d4dcSJohn Baldwin 	next_alias = (start & ~0x3fful) | 0x100;
264c825d4dcSJohn Baldwin 	if (next_alias <= end)
265c825d4dcSJohn Baldwin 		goto alias;
266c825d4dcSJohn Baldwin 	return (0);
267c825d4dcSJohn Baldwin 
268c825d4dcSJohn Baldwin alias:
269c825d4dcSJohn Baldwin 	if (bootverbose)
270c825d4dcSJohn Baldwin 		device_printf(sc->dev,
271da1b038aSJustin Hibbits 		    "I/O range %#jx-%#jx overlaps with an ISA alias\n", start,
272c825d4dcSJohn Baldwin 		    end);
273c825d4dcSJohn Baldwin 	return (1);
274c825d4dcSJohn Baldwin }
275c825d4dcSJohn Baldwin 
276c825d4dcSJohn Baldwin static void
277c825d4dcSJohn Baldwin pcib_add_window_resources(struct pcib_window *w, struct resource **res,
278c825d4dcSJohn Baldwin     int count)
279c825d4dcSJohn Baldwin {
280c825d4dcSJohn Baldwin 	struct resource **newarray;
281c825d4dcSJohn Baldwin 	int error, i;
282c825d4dcSJohn Baldwin 
283c825d4dcSJohn Baldwin 	newarray = malloc(sizeof(struct resource *) * (w->count + count),
284c825d4dcSJohn Baldwin 	    M_DEVBUF, M_WAITOK);
285c825d4dcSJohn Baldwin 	if (w->res != NULL)
286c825d4dcSJohn Baldwin 		bcopy(w->res, newarray, sizeof(struct resource *) * w->count);
287c825d4dcSJohn Baldwin 	bcopy(res, newarray + w->count, sizeof(struct resource *) * count);
288c825d4dcSJohn Baldwin 	free(w->res, M_DEVBUF);
289c825d4dcSJohn Baldwin 	w->res = newarray;
290c825d4dcSJohn Baldwin 	w->count += count;
291c825d4dcSJohn Baldwin 
292c825d4dcSJohn Baldwin 	for (i = 0; i < count; i++) {
293c825d4dcSJohn Baldwin 		error = rman_manage_region(&w->rman, rman_get_start(res[i]),
294c825d4dcSJohn Baldwin 		    rman_get_end(res[i]));
295c825d4dcSJohn Baldwin 		if (error)
296c825d4dcSJohn Baldwin 			panic("Failed to add resource to rman");
297c825d4dcSJohn Baldwin 	}
298c825d4dcSJohn Baldwin }
299c825d4dcSJohn Baldwin 
3002dd1bdf1SJustin Hibbits typedef void (nonisa_callback)(rman_res_t start, rman_res_t end, void *arg);
301c825d4dcSJohn Baldwin 
302c825d4dcSJohn Baldwin static void
3032dd1bdf1SJustin Hibbits pcib_walk_nonisa_ranges(rman_res_t start, rman_res_t end, nonisa_callback *cb,
304c825d4dcSJohn Baldwin     void *arg)
305c825d4dcSJohn Baldwin {
3062dd1bdf1SJustin Hibbits 	rman_res_t next_end;
307c825d4dcSJohn Baldwin 
308c825d4dcSJohn Baldwin 	/*
309c825d4dcSJohn Baldwin 	 * If start is within an ISA alias range, move up to the start
310c825d4dcSJohn Baldwin 	 * of the next non-alias range.  As a special case, addresses
311c825d4dcSJohn Baldwin 	 * in the range 0x000 - 0x0ff should also be skipped since
312c825d4dcSJohn Baldwin 	 * those are used for various system I/O devices in ISA
313c825d4dcSJohn Baldwin 	 * systems.
314c825d4dcSJohn Baldwin 	 */
315c825d4dcSJohn Baldwin 	if (start <= 65535) {
316c825d4dcSJohn Baldwin 		if (start < 0x100 || (start & 0x300) != 0) {
317c825d4dcSJohn Baldwin 			start &= ~0x3ff;
318c825d4dcSJohn Baldwin 			start += 0x400;
319c825d4dcSJohn Baldwin 		}
320c825d4dcSJohn Baldwin 	}
321c825d4dcSJohn Baldwin 
322c825d4dcSJohn Baldwin 	/* ISA aliases are only in the lower 64KB of I/O space. */
323c825d4dcSJohn Baldwin 	while (start <= MIN(end, 65535)) {
324c825d4dcSJohn Baldwin 		next_end = MIN(start | 0xff, end);
325c825d4dcSJohn Baldwin 		cb(start, next_end, arg);
326c825d4dcSJohn Baldwin 		start += 0x400;
327c825d4dcSJohn Baldwin 	}
328c825d4dcSJohn Baldwin 
329c825d4dcSJohn Baldwin 	if (start <= end)
330c825d4dcSJohn Baldwin 		cb(start, end, arg);
331c825d4dcSJohn Baldwin }
332c825d4dcSJohn Baldwin 
333c825d4dcSJohn Baldwin static void
3342dd1bdf1SJustin Hibbits count_ranges(rman_res_t start, rman_res_t end, void *arg)
335c825d4dcSJohn Baldwin {
336c825d4dcSJohn Baldwin 	int *countp;
337c825d4dcSJohn Baldwin 
338c825d4dcSJohn Baldwin 	countp = arg;
339c825d4dcSJohn Baldwin 	(*countp)++;
340c825d4dcSJohn Baldwin }
341c825d4dcSJohn Baldwin 
342c825d4dcSJohn Baldwin struct alloc_state {
343c825d4dcSJohn Baldwin 	struct resource **res;
344c825d4dcSJohn Baldwin 	struct pcib_softc *sc;
345c825d4dcSJohn Baldwin 	int count, error;
346c825d4dcSJohn Baldwin };
347c825d4dcSJohn Baldwin 
348c825d4dcSJohn Baldwin static void
3492dd1bdf1SJustin Hibbits alloc_ranges(rman_res_t start, rman_res_t end, void *arg)
350c825d4dcSJohn Baldwin {
351c825d4dcSJohn Baldwin 	struct alloc_state *as;
352c825d4dcSJohn Baldwin 	struct pcib_window *w;
353c825d4dcSJohn Baldwin 	int rid;
354c825d4dcSJohn Baldwin 
355c825d4dcSJohn Baldwin 	as = arg;
356c825d4dcSJohn Baldwin 	if (as->error != 0)
357c825d4dcSJohn Baldwin 		return;
358c825d4dcSJohn Baldwin 
359c825d4dcSJohn Baldwin 	w = &as->sc->io;
360c825d4dcSJohn Baldwin 	rid = w->reg;
361c825d4dcSJohn Baldwin 	if (bootverbose)
362c825d4dcSJohn Baldwin 		device_printf(as->sc->dev,
363da1b038aSJustin Hibbits 		    "allocating non-ISA range %#jx-%#jx\n", start, end);
364c825d4dcSJohn Baldwin 	as->res[as->count] = bus_alloc_resource(as->sc->dev, SYS_RES_IOPORT,
365c825d4dcSJohn Baldwin 	    &rid, start, end, end - start + 1, 0);
366c825d4dcSJohn Baldwin 	if (as->res[as->count] == NULL)
367c825d4dcSJohn Baldwin 		as->error = ENXIO;
368c825d4dcSJohn Baldwin 	else
369c825d4dcSJohn Baldwin 		as->count++;
370c825d4dcSJohn Baldwin }
371c825d4dcSJohn Baldwin 
372c825d4dcSJohn Baldwin static int
3732dd1bdf1SJustin Hibbits pcib_alloc_nonisa_ranges(struct pcib_softc *sc, rman_res_t start, rman_res_t end)
374c825d4dcSJohn Baldwin {
375c825d4dcSJohn Baldwin 	struct alloc_state as;
376c825d4dcSJohn Baldwin 	int i, new_count;
377c825d4dcSJohn Baldwin 
378c825d4dcSJohn Baldwin 	/* First, see how many ranges we need. */
379c825d4dcSJohn Baldwin 	new_count = 0;
380c825d4dcSJohn Baldwin 	pcib_walk_nonisa_ranges(start, end, count_ranges, &new_count);
381c825d4dcSJohn Baldwin 
382c825d4dcSJohn Baldwin 	/* Second, allocate the ranges. */
383c825d4dcSJohn Baldwin 	as.res = malloc(sizeof(struct resource *) * new_count, M_DEVBUF,
384c825d4dcSJohn Baldwin 	    M_WAITOK);
385c825d4dcSJohn Baldwin 	as.sc = sc;
386c825d4dcSJohn Baldwin 	as.count = 0;
387c825d4dcSJohn Baldwin 	as.error = 0;
388c825d4dcSJohn Baldwin 	pcib_walk_nonisa_ranges(start, end, alloc_ranges, &as);
389c825d4dcSJohn Baldwin 	if (as.error != 0) {
390c825d4dcSJohn Baldwin 		for (i = 0; i < as.count; i++)
391c825d4dcSJohn Baldwin 			bus_release_resource(sc->dev, SYS_RES_IOPORT,
392c825d4dcSJohn Baldwin 			    sc->io.reg, as.res[i]);
393c825d4dcSJohn Baldwin 		free(as.res, M_DEVBUF);
394c825d4dcSJohn Baldwin 		return (as.error);
395c825d4dcSJohn Baldwin 	}
396c825d4dcSJohn Baldwin 	KASSERT(as.count == new_count, ("%s: count mismatch", __func__));
397c825d4dcSJohn Baldwin 
398c825d4dcSJohn Baldwin 	/* Third, add the ranges to the window. */
399c825d4dcSJohn Baldwin 	pcib_add_window_resources(&sc->io, as.res, as.count);
400c825d4dcSJohn Baldwin 	free(as.res, M_DEVBUF);
401c825d4dcSJohn Baldwin 	return (0);
402c825d4dcSJohn Baldwin }
403c825d4dcSJohn Baldwin 
40483c41143SJohn Baldwin static void
40583c41143SJohn Baldwin pcib_alloc_window(struct pcib_softc *sc, struct pcib_window *w, int type,
40683c41143SJohn Baldwin     int flags, pci_addr_t max_address)
40783c41143SJohn Baldwin {
408c825d4dcSJohn Baldwin 	struct resource *res;
40983c41143SJohn Baldwin 	char buf[64];
41083c41143SJohn Baldwin 	int error, rid;
41183c41143SJohn Baldwin 
41289977ce2SJustin Hibbits 	if (max_address != (rman_res_t)max_address)
413534ccd7bSJustin Hibbits 		max_address = ~0;
41483c41143SJohn Baldwin 	w->rman.rm_start = 0;
41583c41143SJohn Baldwin 	w->rman.rm_end = max_address;
41683c41143SJohn Baldwin 	w->rman.rm_type = RMAN_ARRAY;
41783c41143SJohn Baldwin 	snprintf(buf, sizeof(buf), "%s %s window",
41883c41143SJohn Baldwin 	    device_get_nameunit(sc->dev), w->name);
41983c41143SJohn Baldwin 	w->rman.rm_descr = strdup(buf, M_DEVBUF);
42083c41143SJohn Baldwin 	error = rman_init(&w->rman);
42183c41143SJohn Baldwin 	if (error)
42283c41143SJohn Baldwin 		panic("Failed to initialize %s %s rman",
42383c41143SJohn Baldwin 		    device_get_nameunit(sc->dev), w->name);
42483c41143SJohn Baldwin 
42583c41143SJohn Baldwin 	if (!pcib_is_window_open(w))
42683c41143SJohn Baldwin 		return;
42783c41143SJohn Baldwin 
42883c41143SJohn Baldwin 	if (w->base > max_address || w->limit > max_address) {
42983c41143SJohn Baldwin 		device_printf(sc->dev,
43083c41143SJohn Baldwin 		    "initial %s window has too many bits, ignoring\n", w->name);
43183c41143SJohn Baldwin 		return;
43283c41143SJohn Baldwin 	}
433c825d4dcSJohn Baldwin 	if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE)
434c825d4dcSJohn Baldwin 		(void)pcib_alloc_nonisa_ranges(sc, w->base, w->limit);
435c825d4dcSJohn Baldwin 	else {
43683c41143SJohn Baldwin 		rid = w->reg;
437c825d4dcSJohn Baldwin 		res = bus_alloc_resource(sc->dev, type, &rid, w->base, w->limit,
43883c41143SJohn Baldwin 		    w->limit - w->base + 1, flags);
439c825d4dcSJohn Baldwin 		if (res != NULL)
440c825d4dcSJohn Baldwin 			pcib_add_window_resources(w, &res, 1);
441c825d4dcSJohn Baldwin 	}
44283c41143SJohn Baldwin 	if (w->res == NULL) {
44383c41143SJohn Baldwin 		device_printf(sc->dev,
44483c41143SJohn Baldwin 		    "failed to allocate initial %s window: %#jx-%#jx\n",
44583c41143SJohn Baldwin 		    w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
44683c41143SJohn Baldwin 		w->base = max_address;
44783c41143SJohn Baldwin 		w->limit = 0;
44883c41143SJohn Baldwin 		pcib_write_windows(sc, w->mask);
44983c41143SJohn Baldwin 		return;
45083c41143SJohn Baldwin 	}
45183c41143SJohn Baldwin 	pcib_activate_window(sc, type);
45283c41143SJohn Baldwin }
45383c41143SJohn Baldwin 
45483c41143SJohn Baldwin /*
45583c41143SJohn Baldwin  * Initialize I/O windows.
45683c41143SJohn Baldwin  */
45783c41143SJohn Baldwin static void
45883c41143SJohn Baldwin pcib_probe_windows(struct pcib_softc *sc)
45983c41143SJohn Baldwin {
46083c41143SJohn Baldwin 	pci_addr_t max;
46183c41143SJohn Baldwin 	device_t dev;
46283c41143SJohn Baldwin 	uint32_t val;
46383c41143SJohn Baldwin 
46483c41143SJohn Baldwin 	dev = sc->dev;
46583c41143SJohn Baldwin 
4660070c94bSJohn Baldwin 	if (pci_clear_pcib) {
467809923caSJustin Hibbits 		pcib_bridge_init(dev);
4680070c94bSJohn Baldwin 	}
4690070c94bSJohn Baldwin 
47083c41143SJohn Baldwin 	/* Determine if the I/O port window is implemented. */
47183c41143SJohn Baldwin 	val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
47283c41143SJohn Baldwin 	if (val == 0) {
47383c41143SJohn Baldwin 		/*
47483c41143SJohn Baldwin 		 * If 'val' is zero, then only 16-bits of I/O space
47583c41143SJohn Baldwin 		 * are supported.
47683c41143SJohn Baldwin 		 */
47783c41143SJohn Baldwin 		pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
47883c41143SJohn Baldwin 		if (pci_read_config(dev, PCIR_IOBASEL_1, 1) != 0) {
47983c41143SJohn Baldwin 			sc->io.valid = 1;
48083c41143SJohn Baldwin 			pci_write_config(dev, PCIR_IOBASEL_1, 0, 1);
48183c41143SJohn Baldwin 		}
48283c41143SJohn Baldwin 	} else
48383c41143SJohn Baldwin 		sc->io.valid = 1;
48483c41143SJohn Baldwin 
48583c41143SJohn Baldwin 	/* Read the existing I/O port window. */
48683c41143SJohn Baldwin 	if (sc->io.valid) {
48783c41143SJohn Baldwin 		sc->io.reg = PCIR_IOBASEL_1;
48883c41143SJohn Baldwin 		sc->io.step = 12;
48983c41143SJohn Baldwin 		sc->io.mask = WIN_IO;
49083c41143SJohn Baldwin 		sc->io.name = "I/O port";
49183c41143SJohn Baldwin 		if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
49283c41143SJohn Baldwin 			sc->io.base = PCI_PPBIOBASE(
49383c41143SJohn Baldwin 			    pci_read_config(dev, PCIR_IOBASEH_1, 2), val);
49483c41143SJohn Baldwin 			sc->io.limit = PCI_PPBIOLIMIT(
49583c41143SJohn Baldwin 			    pci_read_config(dev, PCIR_IOLIMITH_1, 2),
49683c41143SJohn Baldwin 			    pci_read_config(dev, PCIR_IOLIMITL_1, 1));
49783c41143SJohn Baldwin 			max = 0xffffffff;
49883c41143SJohn Baldwin 		} else {
49983c41143SJohn Baldwin 			sc->io.base = PCI_PPBIOBASE(0, val);
50083c41143SJohn Baldwin 			sc->io.limit = PCI_PPBIOLIMIT(0,
50183c41143SJohn Baldwin 			    pci_read_config(dev, PCIR_IOLIMITL_1, 1));
50283c41143SJohn Baldwin 			max = 0xffff;
50383c41143SJohn Baldwin 		}
50483c41143SJohn Baldwin 		pcib_alloc_window(sc, &sc->io, SYS_RES_IOPORT, 0, max);
50583c41143SJohn Baldwin 	}
50683c41143SJohn Baldwin 
50783c41143SJohn Baldwin 	/* Read the existing memory window. */
50883c41143SJohn Baldwin 	sc->mem.valid = 1;
50983c41143SJohn Baldwin 	sc->mem.reg = PCIR_MEMBASE_1;
51083c41143SJohn Baldwin 	sc->mem.step = 20;
51183c41143SJohn Baldwin 	sc->mem.mask = WIN_MEM;
51283c41143SJohn Baldwin 	sc->mem.name = "memory";
51383c41143SJohn Baldwin 	sc->mem.base = PCI_PPBMEMBASE(0,
51483c41143SJohn Baldwin 	    pci_read_config(dev, PCIR_MEMBASE_1, 2));
51583c41143SJohn Baldwin 	sc->mem.limit = PCI_PPBMEMLIMIT(0,
51683c41143SJohn Baldwin 	    pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
51783c41143SJohn Baldwin 	pcib_alloc_window(sc, &sc->mem, SYS_RES_MEMORY, 0, 0xffffffff);
51883c41143SJohn Baldwin 
51983c41143SJohn Baldwin 	/* Determine if the prefetchable memory window is implemented. */
52083c41143SJohn Baldwin 	val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
52183c41143SJohn Baldwin 	if (val == 0) {
52283c41143SJohn Baldwin 		/*
52383c41143SJohn Baldwin 		 * If 'val' is zero, then only 32-bits of memory space
52483c41143SJohn Baldwin 		 * are supported.
52583c41143SJohn Baldwin 		 */
52683c41143SJohn Baldwin 		pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
52783c41143SJohn Baldwin 		if (pci_read_config(dev, PCIR_PMBASEL_1, 2) != 0) {
52883c41143SJohn Baldwin 			sc->pmem.valid = 1;
52983c41143SJohn Baldwin 			pci_write_config(dev, PCIR_PMBASEL_1, 0, 2);
53083c41143SJohn Baldwin 		}
53183c41143SJohn Baldwin 	} else
53283c41143SJohn Baldwin 		sc->pmem.valid = 1;
53383c41143SJohn Baldwin 
53483c41143SJohn Baldwin 	/* Read the existing prefetchable memory window. */
53583c41143SJohn Baldwin 	if (sc->pmem.valid) {
53683c41143SJohn Baldwin 		sc->pmem.reg = PCIR_PMBASEL_1;
53783c41143SJohn Baldwin 		sc->pmem.step = 20;
53883c41143SJohn Baldwin 		sc->pmem.mask = WIN_PMEM;
53983c41143SJohn Baldwin 		sc->pmem.name = "prefetch";
54083c41143SJohn Baldwin 		if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
54183c41143SJohn Baldwin 			sc->pmem.base = PCI_PPBMEMBASE(
54283c41143SJohn Baldwin 			    pci_read_config(dev, PCIR_PMBASEH_1, 4), val);
54383c41143SJohn Baldwin 			sc->pmem.limit = PCI_PPBMEMLIMIT(
54483c41143SJohn Baldwin 			    pci_read_config(dev, PCIR_PMLIMITH_1, 4),
54583c41143SJohn Baldwin 			    pci_read_config(dev, PCIR_PMLIMITL_1, 2));
54683c41143SJohn Baldwin 			max = 0xffffffffffffffff;
54783c41143SJohn Baldwin 		} else {
54883c41143SJohn Baldwin 			sc->pmem.base = PCI_PPBMEMBASE(0, val);
54983c41143SJohn Baldwin 			sc->pmem.limit = PCI_PPBMEMLIMIT(0,
55083c41143SJohn Baldwin 			    pci_read_config(dev, PCIR_PMLIMITL_1, 2));
55183c41143SJohn Baldwin 			max = 0xffffffff;
55283c41143SJohn Baldwin 		}
55383c41143SJohn Baldwin 		pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY,
55483c41143SJohn Baldwin 		    RF_PREFETCHABLE, max);
55583c41143SJohn Baldwin 	}
55683c41143SJohn Baldwin }
55783c41143SJohn Baldwin 
5586f33eaa5SJohn Baldwin static void
5596f33eaa5SJohn Baldwin pcib_release_window(struct pcib_softc *sc, struct pcib_window *w, int type)
5606f33eaa5SJohn Baldwin {
5616f33eaa5SJohn Baldwin 	device_t dev;
5626f33eaa5SJohn Baldwin 	int error, i;
5636f33eaa5SJohn Baldwin 
5646f33eaa5SJohn Baldwin 	if (!w->valid)
5656f33eaa5SJohn Baldwin 		return;
5666f33eaa5SJohn Baldwin 
5676f33eaa5SJohn Baldwin 	dev = sc->dev;
5686f33eaa5SJohn Baldwin 	error = rman_fini(&w->rman);
5696f33eaa5SJohn Baldwin 	if (error) {
5706f33eaa5SJohn Baldwin 		device_printf(dev, "failed to release %s rman\n", w->name);
5716f33eaa5SJohn Baldwin 		return;
5726f33eaa5SJohn Baldwin 	}
5736f33eaa5SJohn Baldwin 	free(__DECONST(char *, w->rman.rm_descr), M_DEVBUF);
5746f33eaa5SJohn Baldwin 
5756f33eaa5SJohn Baldwin 	for (i = 0; i < w->count; i++) {
5766f33eaa5SJohn Baldwin 		error = bus_free_resource(dev, type, w->res[i]);
5776f33eaa5SJohn Baldwin 		if (error)
5786f33eaa5SJohn Baldwin 			device_printf(dev,
5796f33eaa5SJohn Baldwin 			    "failed to release %s resource: %d\n", w->name,
5806f33eaa5SJohn Baldwin 			    error);
5816f33eaa5SJohn Baldwin 	}
5826f33eaa5SJohn Baldwin 	free(w->res, M_DEVBUF);
5836f33eaa5SJohn Baldwin }
5846f33eaa5SJohn Baldwin 
5856f33eaa5SJohn Baldwin static void
5866f33eaa5SJohn Baldwin pcib_free_windows(struct pcib_softc *sc)
5876f33eaa5SJohn Baldwin {
5886f33eaa5SJohn Baldwin 
5896f33eaa5SJohn Baldwin 	pcib_release_window(sc, &sc->pmem, SYS_RES_MEMORY);
5906f33eaa5SJohn Baldwin 	pcib_release_window(sc, &sc->mem, SYS_RES_MEMORY);
5916f33eaa5SJohn Baldwin 	pcib_release_window(sc, &sc->io, SYS_RES_IOPORT);
5926f33eaa5SJohn Baldwin }
5936f33eaa5SJohn Baldwin 
5944edef187SJohn Baldwin #ifdef PCI_RES_BUS
5954edef187SJohn Baldwin /*
5964edef187SJohn Baldwin  * Allocate a suitable secondary bus for this bridge if needed and
5974edef187SJohn Baldwin  * initialize the resource manager for the secondary bus range.  Note
5984edef187SJohn Baldwin  * that the minimum count is a desired value and this may allocate a
5994edef187SJohn Baldwin  * smaller range.
6004edef187SJohn Baldwin  */
6014edef187SJohn Baldwin void
6024edef187SJohn Baldwin pcib_setup_secbus(device_t dev, struct pcib_secbus *bus, int min_count)
6034edef187SJohn Baldwin {
6044edef187SJohn Baldwin 	char buf[64];
605ad6f36f8SJohn Baldwin 	int error, rid, sec_reg;
6064edef187SJohn Baldwin 
6074edef187SJohn Baldwin 	switch (pci_read_config(dev, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE) {
6084edef187SJohn Baldwin 	case PCIM_HDRTYPE_BRIDGE:
609ad6f36f8SJohn Baldwin 		sec_reg = PCIR_SECBUS_1;
6104edef187SJohn Baldwin 		bus->sub_reg = PCIR_SUBBUS_1;
6114edef187SJohn Baldwin 		break;
6124edef187SJohn Baldwin 	case PCIM_HDRTYPE_CARDBUS:
613ad6f36f8SJohn Baldwin 		sec_reg = PCIR_SECBUS_2;
6144edef187SJohn Baldwin 		bus->sub_reg = PCIR_SUBBUS_2;
6154edef187SJohn Baldwin 		break;
6164edef187SJohn Baldwin 	default:
6174edef187SJohn Baldwin 		panic("not a PCI bridge");
6184edef187SJohn Baldwin 	}
619ad6f36f8SJohn Baldwin 	bus->sec = pci_read_config(dev, sec_reg, 1);
620ad6f36f8SJohn Baldwin 	bus->sub = pci_read_config(dev, bus->sub_reg, 1);
6214edef187SJohn Baldwin 	bus->dev = dev;
6224edef187SJohn Baldwin 	bus->rman.rm_start = 0;
6234edef187SJohn Baldwin 	bus->rman.rm_end = PCI_BUSMAX;
6244edef187SJohn Baldwin 	bus->rman.rm_type = RMAN_ARRAY;
6254edef187SJohn Baldwin 	snprintf(buf, sizeof(buf), "%s bus numbers", device_get_nameunit(dev));
6264edef187SJohn Baldwin 	bus->rman.rm_descr = strdup(buf, M_DEVBUF);
6274edef187SJohn Baldwin 	error = rman_init(&bus->rman);
6284edef187SJohn Baldwin 	if (error)
6294edef187SJohn Baldwin 		panic("Failed to initialize %s bus number rman",
6304edef187SJohn Baldwin 		    device_get_nameunit(dev));
6314edef187SJohn Baldwin 
6324edef187SJohn Baldwin 	/*
6334edef187SJohn Baldwin 	 * Allocate a bus range.  This will return an existing bus range
6344edef187SJohn Baldwin 	 * if one exists, or a new bus range if one does not.
6354edef187SJohn Baldwin 	 */
6364edef187SJohn Baldwin 	rid = 0;
637c47476d7SJustin Hibbits 	bus->res = bus_alloc_resource_anywhere(dev, PCI_RES_BUS, &rid,
6384edef187SJohn Baldwin 	    min_count, 0);
6394edef187SJohn Baldwin 	if (bus->res == NULL) {
6404edef187SJohn Baldwin 		/*
6414edef187SJohn Baldwin 		 * Fall back to just allocating a range of a single bus
6424edef187SJohn Baldwin 		 * number.
6434edef187SJohn Baldwin 		 */
644c47476d7SJustin Hibbits 		bus->res = bus_alloc_resource_anywhere(dev, PCI_RES_BUS, &rid,
6454edef187SJohn Baldwin 		    1, 0);
6464edef187SJohn Baldwin 	} else if (rman_get_size(bus->res) < min_count)
6474edef187SJohn Baldwin 		/*
6484edef187SJohn Baldwin 		 * Attempt to grow the existing range to satisfy the
6494edef187SJohn Baldwin 		 * minimum desired count.
6504edef187SJohn Baldwin 		 */
6514edef187SJohn Baldwin 		(void)bus_adjust_resource(dev, PCI_RES_BUS, bus->res,
6524edef187SJohn Baldwin 		    rman_get_start(bus->res), rman_get_start(bus->res) +
6534edef187SJohn Baldwin 		    min_count - 1);
6544edef187SJohn Baldwin 
6554edef187SJohn Baldwin 	/*
6564edef187SJohn Baldwin 	 * Add the initial resource to the rman.
6574edef187SJohn Baldwin 	 */
6584edef187SJohn Baldwin 	if (bus->res != NULL) {
6594edef187SJohn Baldwin 		error = rman_manage_region(&bus->rman, rman_get_start(bus->res),
6604edef187SJohn Baldwin 		    rman_get_end(bus->res));
6614edef187SJohn Baldwin 		if (error)
6624edef187SJohn Baldwin 			panic("Failed to add resource to rman");
6634edef187SJohn Baldwin 		bus->sec = rman_get_start(bus->res);
6644edef187SJohn Baldwin 		bus->sub = rman_get_end(bus->res);
6654edef187SJohn Baldwin 	}
6664edef187SJohn Baldwin }
6674edef187SJohn Baldwin 
6686f33eaa5SJohn Baldwin void
6696f33eaa5SJohn Baldwin pcib_free_secbus(device_t dev, struct pcib_secbus *bus)
6706f33eaa5SJohn Baldwin {
6716f33eaa5SJohn Baldwin 	int error;
6726f33eaa5SJohn Baldwin 
6736f33eaa5SJohn Baldwin 	error = rman_fini(&bus->rman);
6746f33eaa5SJohn Baldwin 	if (error) {
6756f33eaa5SJohn Baldwin 		device_printf(dev, "failed to release bus number rman\n");
6766f33eaa5SJohn Baldwin 		return;
6776f33eaa5SJohn Baldwin 	}
6786f33eaa5SJohn Baldwin 	free(__DECONST(char *, bus->rman.rm_descr), M_DEVBUF);
6796f33eaa5SJohn Baldwin 
6806f33eaa5SJohn Baldwin 	error = bus_free_resource(dev, PCI_RES_BUS, bus->res);
6816f33eaa5SJohn Baldwin 	if (error)
6826f33eaa5SJohn Baldwin 		device_printf(dev,
6836f33eaa5SJohn Baldwin 		    "failed to release bus numbers resource: %d\n", error);
6846f33eaa5SJohn Baldwin }
6856f33eaa5SJohn Baldwin 
6864edef187SJohn Baldwin static struct resource *
6874edef187SJohn Baldwin pcib_suballoc_bus(struct pcib_secbus *bus, device_t child, int *rid,
6882dd1bdf1SJustin Hibbits     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
6894edef187SJohn Baldwin {
6904edef187SJohn Baldwin 	struct resource *res;
6914edef187SJohn Baldwin 
6924edef187SJohn Baldwin 	res = rman_reserve_resource(&bus->rman, start, end, count, flags,
6934edef187SJohn Baldwin 	    child);
6944edef187SJohn Baldwin 	if (res == NULL)
6954edef187SJohn Baldwin 		return (NULL);
6964edef187SJohn Baldwin 
6974edef187SJohn Baldwin 	if (bootverbose)
6984edef187SJohn Baldwin 		device_printf(bus->dev,
699da1b038aSJustin Hibbits 		    "allocated bus range (%ju-%ju) for rid %d of %s\n",
7004edef187SJohn Baldwin 		    rman_get_start(res), rman_get_end(res), *rid,
7014edef187SJohn Baldwin 		    pcib_child_name(child));
7024edef187SJohn Baldwin 	rman_set_rid(res, *rid);
7034edef187SJohn Baldwin 	return (res);
7044edef187SJohn Baldwin }
7054edef187SJohn Baldwin 
7064edef187SJohn Baldwin /*
7074edef187SJohn Baldwin  * Attempt to grow the secondary bus range.  This is much simpler than
7084edef187SJohn Baldwin  * for I/O windows as the range can only be grown by increasing
7094edef187SJohn Baldwin  * subbus.
7104edef187SJohn Baldwin  */
7114edef187SJohn Baldwin static int
7122dd1bdf1SJustin Hibbits pcib_grow_subbus(struct pcib_secbus *bus, rman_res_t new_end)
7134edef187SJohn Baldwin {
7142dd1bdf1SJustin Hibbits 	rman_res_t old_end;
7154edef187SJohn Baldwin 	int error;
7164edef187SJohn Baldwin 
7174edef187SJohn Baldwin 	old_end = rman_get_end(bus->res);
7184edef187SJohn Baldwin 	KASSERT(new_end > old_end, ("attempt to shrink subbus"));
7194edef187SJohn Baldwin 	error = bus_adjust_resource(bus->dev, PCI_RES_BUS, bus->res,
7204edef187SJohn Baldwin 	    rman_get_start(bus->res), new_end);
7214edef187SJohn Baldwin 	if (error)
7224edef187SJohn Baldwin 		return (error);
7234edef187SJohn Baldwin 	if (bootverbose)
724da1b038aSJustin Hibbits 		device_printf(bus->dev, "grew bus range to %ju-%ju\n",
7254edef187SJohn Baldwin 		    rman_get_start(bus->res), rman_get_end(bus->res));
7264edef187SJohn Baldwin 	error = rman_manage_region(&bus->rman, old_end + 1,
7274edef187SJohn Baldwin 	    rman_get_end(bus->res));
7284edef187SJohn Baldwin 	if (error)
7294edef187SJohn Baldwin 		panic("Failed to add resource to rman");
7304edef187SJohn Baldwin 	bus->sub = rman_get_end(bus->res);
7314edef187SJohn Baldwin 	pci_write_config(bus->dev, bus->sub_reg, bus->sub, 1);
7324edef187SJohn Baldwin 	return (0);
7334edef187SJohn Baldwin }
7344edef187SJohn Baldwin 
7354edef187SJohn Baldwin struct resource *
7364edef187SJohn Baldwin pcib_alloc_subbus(struct pcib_secbus *bus, device_t child, int *rid,
7372dd1bdf1SJustin Hibbits     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
7384edef187SJohn Baldwin {
7394edef187SJohn Baldwin 	struct resource *res;
7402dd1bdf1SJustin Hibbits 	rman_res_t start_free, end_free, new_end;
7414edef187SJohn Baldwin 
7424edef187SJohn Baldwin 	/*
7434edef187SJohn Baldwin 	 * First, see if the request can be satisified by the existing
7444edef187SJohn Baldwin 	 * bus range.
7454edef187SJohn Baldwin 	 */
7464edef187SJohn Baldwin 	res = pcib_suballoc_bus(bus, child, rid, start, end, count, flags);
7474edef187SJohn Baldwin 	if (res != NULL)
7484edef187SJohn Baldwin 		return (res);
7494edef187SJohn Baldwin 
7504edef187SJohn Baldwin 	/*
7514edef187SJohn Baldwin 	 * Figure out a range to grow the bus range.  First, find the
7524edef187SJohn Baldwin 	 * first bus number after the last allocated bus in the rman and
7534edef187SJohn Baldwin 	 * enforce that as a minimum starting point for the range.
7544edef187SJohn Baldwin 	 */
7554edef187SJohn Baldwin 	if (rman_last_free_region(&bus->rman, &start_free, &end_free) != 0 ||
7564edef187SJohn Baldwin 	    end_free != bus->sub)
7574edef187SJohn Baldwin 		start_free = bus->sub + 1;
7584edef187SJohn Baldwin 	if (start_free < start)
7594edef187SJohn Baldwin 		start_free = start;
7604edef187SJohn Baldwin 	new_end = start_free + count - 1;
7614edef187SJohn Baldwin 
7624edef187SJohn Baldwin 	/*
7634edef187SJohn Baldwin 	 * See if this new range would satisfy the request if it
7644edef187SJohn Baldwin 	 * succeeds.
7654edef187SJohn Baldwin 	 */
7664edef187SJohn Baldwin 	if (new_end > end)
7674edef187SJohn Baldwin 		return (NULL);
7684edef187SJohn Baldwin 
7694edef187SJohn Baldwin 	/* Finally, attempt to grow the existing resource. */
7704edef187SJohn Baldwin 	if (bootverbose) {
7714edef187SJohn Baldwin 		device_printf(bus->dev,
772da1b038aSJustin Hibbits 		    "attempting to grow bus range for %ju buses\n", count);
773da1b038aSJustin Hibbits 		printf("\tback candidate range: %ju-%ju\n", start_free,
7744edef187SJohn Baldwin 		    new_end);
7754edef187SJohn Baldwin 	}
7764edef187SJohn Baldwin 	if (pcib_grow_subbus(bus, new_end) == 0)
7774edef187SJohn Baldwin 		return (pcib_suballoc_bus(bus, child, rid, start, end, count,
7784edef187SJohn Baldwin 		    flags));
7794edef187SJohn Baldwin 	return (NULL);
7804edef187SJohn Baldwin }
7814edef187SJohn Baldwin #endif
7824edef187SJohn Baldwin 
78383c41143SJohn Baldwin #else
78483c41143SJohn Baldwin 
785bb0d0a8eSMike Smith /*
786b0a2d4b8SWarner Losh  * Is the prefetch window open (eg, can we allocate memory in it?)
787b0a2d4b8SWarner Losh  */
788b0a2d4b8SWarner Losh static int
789b0a2d4b8SWarner Losh pcib_is_prefetch_open(struct pcib_softc *sc)
790b0a2d4b8SWarner Losh {
791b0a2d4b8SWarner Losh 	return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
792b0a2d4b8SWarner Losh }
793b0a2d4b8SWarner Losh 
794b0a2d4b8SWarner Losh /*
795b0a2d4b8SWarner Losh  * Is the nonprefetch window open (eg, can we allocate memory in it?)
796b0a2d4b8SWarner Losh  */
797b0a2d4b8SWarner Losh static int
798b0a2d4b8SWarner Losh pcib_is_nonprefetch_open(struct pcib_softc *sc)
799b0a2d4b8SWarner Losh {
800b0a2d4b8SWarner Losh 	return (sc->membase > 0 && sc->membase < sc->memlimit);
801b0a2d4b8SWarner Losh }
802b0a2d4b8SWarner Losh 
803b0a2d4b8SWarner Losh /*
804b0a2d4b8SWarner Losh  * Is the io window open (eg, can we allocate ports in it?)
805b0a2d4b8SWarner Losh  */
806b0a2d4b8SWarner Losh static int
807b0a2d4b8SWarner Losh pcib_is_io_open(struct pcib_softc *sc)
808b0a2d4b8SWarner Losh {
809b0a2d4b8SWarner Losh 	return (sc->iobase > 0 && sc->iobase < sc->iolimit);
810b0a2d4b8SWarner Losh }
811b0a2d4b8SWarner Losh 
812b0a2d4b8SWarner Losh /*
813e36af292SJung-uk Kim  * Get current I/O decode.
814e36af292SJung-uk Kim  */
815e36af292SJung-uk Kim static void
816e36af292SJung-uk Kim pcib_get_io_decode(struct pcib_softc *sc)
817e36af292SJung-uk Kim {
818e36af292SJung-uk Kim 	device_t	dev;
819e36af292SJung-uk Kim 	uint32_t	iolow;
820e36af292SJung-uk Kim 
821e36af292SJung-uk Kim 	dev = sc->dev;
822e36af292SJung-uk Kim 
823e36af292SJung-uk Kim 	iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1);
824e36af292SJung-uk Kim 	if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
825e36af292SJung-uk Kim 		sc->iobase = PCI_PPBIOBASE(
826e36af292SJung-uk Kim 		    pci_read_config(dev, PCIR_IOBASEH_1, 2), iolow);
827e36af292SJung-uk Kim 	else
828e36af292SJung-uk Kim 		sc->iobase = PCI_PPBIOBASE(0, iolow);
829e36af292SJung-uk Kim 
830e36af292SJung-uk Kim 	iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1);
831e36af292SJung-uk Kim 	if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
832e36af292SJung-uk Kim 		sc->iolimit = PCI_PPBIOLIMIT(
833e36af292SJung-uk Kim 		    pci_read_config(dev, PCIR_IOLIMITH_1, 2), iolow);
834e36af292SJung-uk Kim 	else
835e36af292SJung-uk Kim 		sc->iolimit = PCI_PPBIOLIMIT(0, iolow);
836e36af292SJung-uk Kim }
837e36af292SJung-uk Kim 
838e36af292SJung-uk Kim /*
839e36af292SJung-uk Kim  * Get current memory decode.
840e36af292SJung-uk Kim  */
841e36af292SJung-uk Kim static void
842e36af292SJung-uk Kim pcib_get_mem_decode(struct pcib_softc *sc)
843e36af292SJung-uk Kim {
844e36af292SJung-uk Kim 	device_t	dev;
845e36af292SJung-uk Kim 	pci_addr_t	pmemlow;
846e36af292SJung-uk Kim 
847e36af292SJung-uk Kim 	dev = sc->dev;
848e36af292SJung-uk Kim 
849e36af292SJung-uk Kim 	sc->membase = PCI_PPBMEMBASE(0,
850e36af292SJung-uk Kim 	    pci_read_config(dev, PCIR_MEMBASE_1, 2));
851e36af292SJung-uk Kim 	sc->memlimit = PCI_PPBMEMLIMIT(0,
852e36af292SJung-uk Kim 	    pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
853e36af292SJung-uk Kim 
854e36af292SJung-uk Kim 	pmemlow = pci_read_config(dev, PCIR_PMBASEL_1, 2);
855e36af292SJung-uk Kim 	if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
856e36af292SJung-uk Kim 		sc->pmembase = PCI_PPBMEMBASE(
857e36af292SJung-uk Kim 		    pci_read_config(dev, PCIR_PMBASEH_1, 4), pmemlow);
858e36af292SJung-uk Kim 	else
859e36af292SJung-uk Kim 		sc->pmembase = PCI_PPBMEMBASE(0, pmemlow);
860e36af292SJung-uk Kim 
861e36af292SJung-uk Kim 	pmemlow = pci_read_config(dev, PCIR_PMLIMITL_1, 2);
862e36af292SJung-uk Kim 	if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
863e36af292SJung-uk Kim 		sc->pmemlimit = PCI_PPBMEMLIMIT(
864e36af292SJung-uk Kim 		    pci_read_config(dev, PCIR_PMLIMITH_1, 4), pmemlow);
865e36af292SJung-uk Kim 	else
866e36af292SJung-uk Kim 		sc->pmemlimit = PCI_PPBMEMLIMIT(0, pmemlow);
867e36af292SJung-uk Kim }
868e36af292SJung-uk Kim 
869e36af292SJung-uk Kim /*
870e36af292SJung-uk Kim  * Restore previous I/O decode.
871e36af292SJung-uk Kim  */
872e36af292SJung-uk Kim static void
873e36af292SJung-uk Kim pcib_set_io_decode(struct pcib_softc *sc)
874e36af292SJung-uk Kim {
875e36af292SJung-uk Kim 	device_t	dev;
876e36af292SJung-uk Kim 	uint32_t	iohi;
877e36af292SJung-uk Kim 
878e36af292SJung-uk Kim 	dev = sc->dev;
879e36af292SJung-uk Kim 
880e36af292SJung-uk Kim 	iohi = sc->iobase >> 16;
881e36af292SJung-uk Kim 	if (iohi > 0)
882e36af292SJung-uk Kim 		pci_write_config(dev, PCIR_IOBASEH_1, iohi, 2);
883e36af292SJung-uk Kim 	pci_write_config(dev, PCIR_IOBASEL_1, sc->iobase >> 8, 1);
884e36af292SJung-uk Kim 
885e36af292SJung-uk Kim 	iohi = sc->iolimit >> 16;
886e36af292SJung-uk Kim 	if (iohi > 0)
887e36af292SJung-uk Kim 		pci_write_config(dev, PCIR_IOLIMITH_1, iohi, 2);
888e36af292SJung-uk Kim 	pci_write_config(dev, PCIR_IOLIMITL_1, sc->iolimit >> 8, 1);
889e36af292SJung-uk Kim }
890e36af292SJung-uk Kim 
891e36af292SJung-uk Kim /*
892e36af292SJung-uk Kim  * Restore previous memory decode.
893e36af292SJung-uk Kim  */
894e36af292SJung-uk Kim static void
895e36af292SJung-uk Kim pcib_set_mem_decode(struct pcib_softc *sc)
896e36af292SJung-uk Kim {
897e36af292SJung-uk Kim 	device_t	dev;
898e36af292SJung-uk Kim 	pci_addr_t	pmemhi;
899e36af292SJung-uk Kim 
900e36af292SJung-uk Kim 	dev = sc->dev;
901e36af292SJung-uk Kim 
902e36af292SJung-uk Kim 	pci_write_config(dev, PCIR_MEMBASE_1, sc->membase >> 16, 2);
903e36af292SJung-uk Kim 	pci_write_config(dev, PCIR_MEMLIMIT_1, sc->memlimit >> 16, 2);
904e36af292SJung-uk Kim 
905e36af292SJung-uk Kim 	pmemhi = sc->pmembase >> 32;
906e36af292SJung-uk Kim 	if (pmemhi > 0)
907e36af292SJung-uk Kim 		pci_write_config(dev, PCIR_PMBASEH_1, pmemhi, 4);
908e36af292SJung-uk Kim 	pci_write_config(dev, PCIR_PMBASEL_1, sc->pmembase >> 16, 2);
909e36af292SJung-uk Kim 
910e36af292SJung-uk Kim 	pmemhi = sc->pmemlimit >> 32;
911e36af292SJung-uk Kim 	if (pmemhi > 0)
912e36af292SJung-uk Kim 		pci_write_config(dev, PCIR_PMLIMITH_1, pmemhi, 4);
913e36af292SJung-uk Kim 	pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmemlimit >> 16, 2);
914e36af292SJung-uk Kim }
91583c41143SJohn Baldwin #endif
916e36af292SJung-uk Kim 
91782cb5c3bSJohn Baldwin #ifdef PCI_HP
91882cb5c3bSJohn Baldwin /*
91982cb5c3bSJohn Baldwin  * PCI-express HotPlug support.
92082cb5c3bSJohn Baldwin  */
92125a57bd6SJohn Baldwin static int pci_enable_pcie_hp = 1;
92225a57bd6SJohn Baldwin SYSCTL_INT(_hw_pci, OID_AUTO, enable_pcie_hp, CTLFLAG_RDTUN,
92325a57bd6SJohn Baldwin     &pci_enable_pcie_hp, 0,
92425a57bd6SJohn Baldwin     "Enable support for native PCI-express HotPlug.");
92525a57bd6SJohn Baldwin 
92682cb5c3bSJohn Baldwin static void
92782cb5c3bSJohn Baldwin pcib_probe_hotplug(struct pcib_softc *sc)
92882cb5c3bSJohn Baldwin {
92982cb5c3bSJohn Baldwin 	device_t dev;
93037290148SEric van Gyzen 	uint32_t link_cap;
931991d431fSEric van Gyzen 	uint16_t link_sta, slot_sta;
93282cb5c3bSJohn Baldwin 
93325a57bd6SJohn Baldwin 	if (!pci_enable_pcie_hp)
93425a57bd6SJohn Baldwin 		return;
93525a57bd6SJohn Baldwin 
93682cb5c3bSJohn Baldwin 	dev = sc->dev;
93782cb5c3bSJohn Baldwin 	if (pci_find_cap(dev, PCIY_EXPRESS, NULL) != 0)
93882cb5c3bSJohn Baldwin 		return;
93982cb5c3bSJohn Baldwin 
94082cb5c3bSJohn Baldwin 	if (!(pcie_read_config(dev, PCIER_FLAGS, 2) & PCIEM_FLAGS_SLOT))
94182cb5c3bSJohn Baldwin 		return;
94282cb5c3bSJohn Baldwin 
94382cb5c3bSJohn Baldwin 	sc->pcie_slot_cap = pcie_read_config(dev, PCIER_SLOT_CAP, 4);
94482cb5c3bSJohn Baldwin 
945991d431fSEric van Gyzen 	if ((sc->pcie_slot_cap & PCIEM_SLOT_CAP_HPC) == 0)
9462611037cSJohn Baldwin 		return;
94737290148SEric van Gyzen 	link_cap = pcie_read_config(dev, PCIER_LINK_CAP, 4);
94837290148SEric van Gyzen 	if ((link_cap & PCIEM_LINK_CAP_DL_ACTIVE) == 0)
9492ffb582aSJohn Baldwin 		return;
9502611037cSJohn Baldwin 
951991d431fSEric van Gyzen 	/*
952991d431fSEric van Gyzen 	 * Some devices report that they have an MRL when they actually
953991d431fSEric van Gyzen 	 * do not.  Since they always report that the MRL is open, child
954991d431fSEric van Gyzen 	 * devices would be ignored.  Try to detect these devices and
955991d431fSEric van Gyzen 	 * ignore their claim of HotPlug support.
956991d431fSEric van Gyzen 	 *
957991d431fSEric van Gyzen 	 * If there is an open MRL but the Data Link Layer is active,
958991d431fSEric van Gyzen 	 * the MRL is not real.
959991d431fSEric van Gyzen 	 */
96037290148SEric van Gyzen 	if ((sc->pcie_slot_cap & PCIEM_SLOT_CAP_MRLSP) != 0) {
961991d431fSEric van Gyzen 		link_sta = pcie_read_config(dev, PCIER_LINK_STA, 2);
962991d431fSEric van Gyzen 		slot_sta = pcie_read_config(dev, PCIER_SLOT_STA, 2);
963991d431fSEric van Gyzen 		if ((slot_sta & PCIEM_SLOT_STA_MRLSS) != 0 &&
964991d431fSEric van Gyzen 		    (link_sta & PCIEM_LINK_STA_DL_ACTIVE) != 0) {
965991d431fSEric van Gyzen 			return;
966991d431fSEric van Gyzen 		}
967991d431fSEric van Gyzen 	}
968991d431fSEric van Gyzen 
96928586889SWarner Losh 	/*
97028586889SWarner Losh 	 * Now that we're sure we want to do hot plug, ask the
97128586889SWarner Losh 	 * firmware, if any, if that's OK.
97228586889SWarner Losh 	 */
9731ffd07bdSJohn Baldwin 	if (pcib_request_feature(dev, PCI_FEATURE_HP) != 0) {
97428586889SWarner Losh 		if (bootverbose)
97528586889SWarner Losh 			device_printf(dev, "Unable to activate hot plug feature.\n");
97628586889SWarner Losh 		return;
97728586889SWarner Losh 	}
97828586889SWarner Losh 
97982cb5c3bSJohn Baldwin 	sc->flags |= PCIB_HOTPLUG;
98082cb5c3bSJohn Baldwin }
98182cb5c3bSJohn Baldwin 
98282cb5c3bSJohn Baldwin /*
98382cb5c3bSJohn Baldwin  * Send a HotPlug command to the slot control register.  If this slot
98407454911SJohn Baldwin  * uses command completion interrupts and a previous command is still
98507454911SJohn Baldwin  * in progress, then the command is dropped.  Once the previous
98607454911SJohn Baldwin  * command completes or times out, pcib_pcie_hotplug_update() will be
98707454911SJohn Baldwin  * invoked to post a new command based on the slot's state at that
98807454911SJohn Baldwin  * time.
98982cb5c3bSJohn Baldwin  */
99082cb5c3bSJohn Baldwin static void
99182cb5c3bSJohn Baldwin pcib_pcie_hotplug_command(struct pcib_softc *sc, uint16_t val, uint16_t mask)
99282cb5c3bSJohn Baldwin {
99382cb5c3bSJohn Baldwin 	device_t dev;
99482cb5c3bSJohn Baldwin 	uint16_t ctl, new;
99582cb5c3bSJohn Baldwin 
99682cb5c3bSJohn Baldwin 	dev = sc->dev;
99782cb5c3bSJohn Baldwin 
99807454911SJohn Baldwin 	if (sc->flags & PCIB_HOTPLUG_CMD_PENDING)
99907454911SJohn Baldwin 		return;
100007454911SJohn Baldwin 
100182cb5c3bSJohn Baldwin 	ctl = pcie_read_config(dev, PCIER_SLOT_CTL, 2);
100282cb5c3bSJohn Baldwin 	new = (ctl & ~mask) | val;
100307454911SJohn Baldwin 	if (new == ctl)
100407454911SJohn Baldwin 		return;
1005991d431fSEric van Gyzen 	if (bootverbose)
1006991d431fSEric van Gyzen 		device_printf(dev, "HotPlug command: %04x -> %04x\n", ctl, new);
100707454911SJohn Baldwin 	pcie_write_config(dev, PCIER_SLOT_CTL, new, 2);
10086f33eaa5SJohn Baldwin 	if (!(sc->pcie_slot_cap & PCIEM_SLOT_CAP_NCCS) &&
10096f33eaa5SJohn Baldwin 	    (ctl & new) & PCIEM_SLOT_CTL_CCIE) {
101082cb5c3bSJohn Baldwin 		sc->flags |= PCIB_HOTPLUG_CMD_PENDING;
101182cb5c3bSJohn Baldwin 		if (!cold)
101282cb5c3bSJohn Baldwin 			callout_reset(&sc->pcie_cc_timer, hz,
101382cb5c3bSJohn Baldwin 			    pcib_pcie_cc_timeout, sc);
101482cb5c3bSJohn Baldwin 	}
101582cb5c3bSJohn Baldwin }
101682cb5c3bSJohn Baldwin 
101782cb5c3bSJohn Baldwin static void
101882cb5c3bSJohn Baldwin pcib_pcie_hotplug_command_completed(struct pcib_softc *sc)
101982cb5c3bSJohn Baldwin {
102082cb5c3bSJohn Baldwin 	device_t dev;
102182cb5c3bSJohn Baldwin 
102282cb5c3bSJohn Baldwin 	dev = sc->dev;
102382cb5c3bSJohn Baldwin 
102482cb5c3bSJohn Baldwin 	if (bootverbose)
102582cb5c3bSJohn Baldwin 		device_printf(dev, "Command Completed\n");
102682cb5c3bSJohn Baldwin 	if (!(sc->flags & PCIB_HOTPLUG_CMD_PENDING))
102782cb5c3bSJohn Baldwin 		return;
102882cb5c3bSJohn Baldwin 	callout_stop(&sc->pcie_cc_timer);
102982cb5c3bSJohn Baldwin 	sc->flags &= ~PCIB_HOTPLUG_CMD_PENDING;
10306f33eaa5SJohn Baldwin 	wakeup(sc);
103182cb5c3bSJohn Baldwin }
103282cb5c3bSJohn Baldwin 
103382cb5c3bSJohn Baldwin /*
103482cb5c3bSJohn Baldwin  * Returns true if a card is fully inserted from the user's
103582cb5c3bSJohn Baldwin  * perspective.  It may not yet be ready for access, but the driver
103682cb5c3bSJohn Baldwin  * can now start enabling access if necessary.
103782cb5c3bSJohn Baldwin  */
103882cb5c3bSJohn Baldwin static bool
103982cb5c3bSJohn Baldwin pcib_hotplug_inserted(struct pcib_softc *sc)
104082cb5c3bSJohn Baldwin {
104182cb5c3bSJohn Baldwin 
104282cb5c3bSJohn Baldwin 	/* Pretend the card isn't present if a detach is forced. */
104382cb5c3bSJohn Baldwin 	if (sc->flags & PCIB_DETACHING)
104482cb5c3bSJohn Baldwin 		return (false);
104582cb5c3bSJohn Baldwin 
104682cb5c3bSJohn Baldwin 	/* Card must be present in the slot. */
104782cb5c3bSJohn Baldwin 	if ((sc->pcie_slot_sta & PCIEM_SLOT_STA_PDS) == 0)
104882cb5c3bSJohn Baldwin 		return (false);
104982cb5c3bSJohn Baldwin 
105082cb5c3bSJohn Baldwin 	/* A power fault implicitly turns off power to the slot. */
105182cb5c3bSJohn Baldwin 	if (sc->pcie_slot_sta & PCIEM_SLOT_STA_PFD)
105282cb5c3bSJohn Baldwin 		return (false);
105382cb5c3bSJohn Baldwin 
105482cb5c3bSJohn Baldwin 	/* If the MRL is disengaged, the slot is powered off. */
105582cb5c3bSJohn Baldwin 	if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_MRLSP &&
105682cb5c3bSJohn Baldwin 	    (sc->pcie_slot_sta & PCIEM_SLOT_STA_MRLSS) != 0)
105782cb5c3bSJohn Baldwin 		return (false);
105882cb5c3bSJohn Baldwin 
105982cb5c3bSJohn Baldwin 	return (true);
106082cb5c3bSJohn Baldwin }
106182cb5c3bSJohn Baldwin 
106282cb5c3bSJohn Baldwin /*
106382cb5c3bSJohn Baldwin  * Returns -1 if the card is fully inserted, powered, and ready for
106482cb5c3bSJohn Baldwin  * access.  Otherwise, returns 0.
106582cb5c3bSJohn Baldwin  */
106682cb5c3bSJohn Baldwin static int
106782cb5c3bSJohn Baldwin pcib_hotplug_present(struct pcib_softc *sc)
106882cb5c3bSJohn Baldwin {
106982cb5c3bSJohn Baldwin 
107082cb5c3bSJohn Baldwin 	/* Card must be inserted. */
107182cb5c3bSJohn Baldwin 	if (!pcib_hotplug_inserted(sc))
107282cb5c3bSJohn Baldwin 		return (0);
107382cb5c3bSJohn Baldwin 
107482cb5c3bSJohn Baldwin 	/*
107582cb5c3bSJohn Baldwin 	 * Require the Electromechanical Interlock to be engaged if
107682cb5c3bSJohn Baldwin 	 * present.
107782cb5c3bSJohn Baldwin 	 */
107882cb5c3bSJohn Baldwin 	if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_EIP &&
107982cb5c3bSJohn Baldwin 	    (sc->pcie_slot_sta & PCIEM_SLOT_STA_EIS) == 0)
108082cb5c3bSJohn Baldwin 		return (0);
108182cb5c3bSJohn Baldwin 
108282cb5c3bSJohn Baldwin 	/* Require the Data Link Layer to be active. */
108382cb5c3bSJohn Baldwin 	if (!(sc->pcie_link_sta & PCIEM_LINK_STA_DL_ACTIVE))
108482cb5c3bSJohn Baldwin 		return (0);
108582cb5c3bSJohn Baldwin 
108682cb5c3bSJohn Baldwin 	return (-1);
108782cb5c3bSJohn Baldwin }
108882cb5c3bSJohn Baldwin 
108982cb5c3bSJohn Baldwin static void
109082cb5c3bSJohn Baldwin pcib_pcie_hotplug_update(struct pcib_softc *sc, uint16_t val, uint16_t mask,
109182cb5c3bSJohn Baldwin     bool schedule_task)
109282cb5c3bSJohn Baldwin {
1093a1566487SEric van Gyzen 	bool card_inserted, ei_engaged;
109482cb5c3bSJohn Baldwin 
1095991d431fSEric van Gyzen 	/* Clear DETACHING if Presence Detect has cleared. */
109682cb5c3bSJohn Baldwin 	if ((sc->pcie_slot_sta & (PCIEM_SLOT_STA_PDC | PCIEM_SLOT_STA_PDS)) ==
109782cb5c3bSJohn Baldwin 	    PCIEM_SLOT_STA_PDC)
109882cb5c3bSJohn Baldwin 		sc->flags &= ~PCIB_DETACHING;
109982cb5c3bSJohn Baldwin 
110082cb5c3bSJohn Baldwin 	card_inserted = pcib_hotplug_inserted(sc);
110182cb5c3bSJohn Baldwin 
110282cb5c3bSJohn Baldwin 	/* Turn the power indicator on if a card is inserted. */
110382cb5c3bSJohn Baldwin 	if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_PIP) {
110482cb5c3bSJohn Baldwin 		mask |= PCIEM_SLOT_CTL_PIC;
110582cb5c3bSJohn Baldwin 		if (card_inserted)
110682cb5c3bSJohn Baldwin 			val |= PCIEM_SLOT_CTL_PI_ON;
110782cb5c3bSJohn Baldwin 		else if (sc->flags & PCIB_DETACH_PENDING)
110882cb5c3bSJohn Baldwin 			val |= PCIEM_SLOT_CTL_PI_BLINK;
110982cb5c3bSJohn Baldwin 		else
111082cb5c3bSJohn Baldwin 			val |= PCIEM_SLOT_CTL_PI_OFF;
111182cb5c3bSJohn Baldwin 	}
111282cb5c3bSJohn Baldwin 
111382cb5c3bSJohn Baldwin 	/* Turn the power on via the Power Controller if a card is inserted. */
111482cb5c3bSJohn Baldwin 	if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_PCP) {
111582cb5c3bSJohn Baldwin 		mask |= PCIEM_SLOT_CTL_PCC;
111682cb5c3bSJohn Baldwin 		if (card_inserted)
111782cb5c3bSJohn Baldwin 			val |= PCIEM_SLOT_CTL_PC_ON;
111882cb5c3bSJohn Baldwin 		else
111982cb5c3bSJohn Baldwin 			val |= PCIEM_SLOT_CTL_PC_OFF;
112082cb5c3bSJohn Baldwin 	}
112182cb5c3bSJohn Baldwin 
112282cb5c3bSJohn Baldwin 	/*
112382cb5c3bSJohn Baldwin 	 * If a card is inserted, enable the Electromechanical
112482cb5c3bSJohn Baldwin 	 * Interlock.  If a card is not inserted (or we are in the
112582cb5c3bSJohn Baldwin 	 * process of detaching), disable the Electromechanical
112682cb5c3bSJohn Baldwin 	 * Interlock.
112782cb5c3bSJohn Baldwin 	 */
112882cb5c3bSJohn Baldwin 	if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_EIP) {
112982cb5c3bSJohn Baldwin 		mask |= PCIEM_SLOT_CTL_EIC;
1130a1566487SEric van Gyzen 		ei_engaged = (sc->pcie_slot_sta & PCIEM_SLOT_STA_EIS) != 0;
1131a1566487SEric van Gyzen 		if (card_inserted != ei_engaged)
113282cb5c3bSJohn Baldwin 			val |= PCIEM_SLOT_CTL_EIC;
113382cb5c3bSJohn Baldwin 	}
113482cb5c3bSJohn Baldwin 
113582cb5c3bSJohn Baldwin 	/*
113682cb5c3bSJohn Baldwin 	 * Start a timer to see if the Data Link Layer times out.
1137991d431fSEric van Gyzen 	 * Note that we only start the timer if Presence Detect or MRL Sensor
113882cb5c3bSJohn Baldwin 	 * changed on this interrupt.  Stop any scheduled timer if
113982cb5c3bSJohn Baldwin 	 * the Data Link Layer is active.
114082cb5c3bSJohn Baldwin 	 */
114182cb5c3bSJohn Baldwin 	if (card_inserted &&
114282cb5c3bSJohn Baldwin 	    !(sc->pcie_link_sta & PCIEM_LINK_STA_DL_ACTIVE) &&
1143991d431fSEric van Gyzen 	    sc->pcie_slot_sta &
1144991d431fSEric van Gyzen 	    (PCIEM_SLOT_STA_MRLSC | PCIEM_SLOT_STA_PDC)) {
114582cb5c3bSJohn Baldwin 		if (cold)
114682cb5c3bSJohn Baldwin 			device_printf(sc->dev,
114782cb5c3bSJohn Baldwin 			    "Data Link Layer inactive\n");
114882cb5c3bSJohn Baldwin 		else
114982cb5c3bSJohn Baldwin 			callout_reset(&sc->pcie_dll_timer, hz,
115082cb5c3bSJohn Baldwin 			    pcib_pcie_dll_timeout, sc);
115182cb5c3bSJohn Baldwin 	} else if (sc->pcie_link_sta & PCIEM_LINK_STA_DL_ACTIVE)
115282cb5c3bSJohn Baldwin 		callout_stop(&sc->pcie_dll_timer);
115382cb5c3bSJohn Baldwin 
115482cb5c3bSJohn Baldwin 	pcib_pcie_hotplug_command(sc, val, mask);
115582cb5c3bSJohn Baldwin 
115682cb5c3bSJohn Baldwin 	/*
1157a1566487SEric van Gyzen 	 * During attach the child "pci" device is added synchronously;
115882cb5c3bSJohn Baldwin 	 * otherwise, the task is scheduled to manage the child
115982cb5c3bSJohn Baldwin 	 * device.
116082cb5c3bSJohn Baldwin 	 */
116182cb5c3bSJohn Baldwin 	if (schedule_task &&
116282cb5c3bSJohn Baldwin 	    (pcib_hotplug_present(sc) != 0) != (sc->child != NULL))
116382cb5c3bSJohn Baldwin 		taskqueue_enqueue(taskqueue_thread, &sc->pcie_hp_task);
116482cb5c3bSJohn Baldwin }
116582cb5c3bSJohn Baldwin 
116682cb5c3bSJohn Baldwin static void
11678a1926c5SWarner Losh pcib_pcie_intr_hotplug(void *arg)
116882cb5c3bSJohn Baldwin {
116982cb5c3bSJohn Baldwin 	struct pcib_softc *sc;
117082cb5c3bSJohn Baldwin 	device_t dev;
117182cb5c3bSJohn Baldwin 
117282cb5c3bSJohn Baldwin 	sc = arg;
117382cb5c3bSJohn Baldwin 	dev = sc->dev;
117482cb5c3bSJohn Baldwin 	sc->pcie_slot_sta = pcie_read_config(dev, PCIER_SLOT_STA, 2);
117582cb5c3bSJohn Baldwin 
117682cb5c3bSJohn Baldwin 	/* Clear the events just reported. */
117782cb5c3bSJohn Baldwin 	pcie_write_config(dev, PCIER_SLOT_STA, sc->pcie_slot_sta, 2);
117882cb5c3bSJohn Baldwin 
1179991d431fSEric van Gyzen 	if (bootverbose)
1180991d431fSEric van Gyzen 		device_printf(dev, "HotPlug interrupt: %#x\n",
1181991d431fSEric van Gyzen 		    sc->pcie_slot_sta);
1182991d431fSEric van Gyzen 
118382cb5c3bSJohn Baldwin 	if (sc->pcie_slot_sta & PCIEM_SLOT_STA_ABP) {
118482cb5c3bSJohn Baldwin 		if (sc->flags & PCIB_DETACH_PENDING) {
118582cb5c3bSJohn Baldwin 			device_printf(dev,
118682cb5c3bSJohn Baldwin 			    "Attention Button Pressed: Detach Cancelled\n");
118782cb5c3bSJohn Baldwin 			sc->flags &= ~PCIB_DETACH_PENDING;
118882cb5c3bSJohn Baldwin 			callout_stop(&sc->pcie_ab_timer);
118982cb5c3bSJohn Baldwin 		} else {
119082cb5c3bSJohn Baldwin 			device_printf(dev,
119182cb5c3bSJohn Baldwin 		    "Attention Button Pressed: Detaching in 5 seconds\n");
119282cb5c3bSJohn Baldwin 			sc->flags |= PCIB_DETACH_PENDING;
119382cb5c3bSJohn Baldwin 			callout_reset(&sc->pcie_ab_timer, 5 * hz,
119482cb5c3bSJohn Baldwin 			    pcib_pcie_ab_timeout, sc);
119582cb5c3bSJohn Baldwin 		}
119682cb5c3bSJohn Baldwin 	}
119782cb5c3bSJohn Baldwin 	if (sc->pcie_slot_sta & PCIEM_SLOT_STA_PFD)
119882cb5c3bSJohn Baldwin 		device_printf(dev, "Power Fault Detected\n");
119982cb5c3bSJohn Baldwin 	if (sc->pcie_slot_sta & PCIEM_SLOT_STA_MRLSC)
120082cb5c3bSJohn Baldwin 		device_printf(dev, "MRL Sensor Changed to %s\n",
120182cb5c3bSJohn Baldwin 		    sc->pcie_slot_sta & PCIEM_SLOT_STA_MRLSS ? "open" :
120282cb5c3bSJohn Baldwin 		    "closed");
120382cb5c3bSJohn Baldwin 	if (bootverbose && sc->pcie_slot_sta & PCIEM_SLOT_STA_PDC)
1204991d431fSEric van Gyzen 		device_printf(dev, "Presence Detect Changed to %s\n",
120582cb5c3bSJohn Baldwin 		    sc->pcie_slot_sta & PCIEM_SLOT_STA_PDS ? "card present" :
120682cb5c3bSJohn Baldwin 		    "empty");
120782cb5c3bSJohn Baldwin 	if (sc->pcie_slot_sta & PCIEM_SLOT_STA_CC)
120882cb5c3bSJohn Baldwin 		pcib_pcie_hotplug_command_completed(sc);
120982cb5c3bSJohn Baldwin 	if (sc->pcie_slot_sta & PCIEM_SLOT_STA_DLLSC) {
121082cb5c3bSJohn Baldwin 		sc->pcie_link_sta = pcie_read_config(dev, PCIER_LINK_STA, 2);
121182cb5c3bSJohn Baldwin 		if (bootverbose)
121282cb5c3bSJohn Baldwin 			device_printf(dev,
121382cb5c3bSJohn Baldwin 			    "Data Link Layer State Changed to %s\n",
121482cb5c3bSJohn Baldwin 			    sc->pcie_link_sta & PCIEM_LINK_STA_DL_ACTIVE ?
121582cb5c3bSJohn Baldwin 			    "active" : "inactive");
121682cb5c3bSJohn Baldwin 	}
121782cb5c3bSJohn Baldwin 
121882cb5c3bSJohn Baldwin 	pcib_pcie_hotplug_update(sc, 0, 0, true);
121982cb5c3bSJohn Baldwin }
122082cb5c3bSJohn Baldwin 
122182cb5c3bSJohn Baldwin static void
122282cb5c3bSJohn Baldwin pcib_pcie_hotplug_task(void *context, int pending)
122382cb5c3bSJohn Baldwin {
122482cb5c3bSJohn Baldwin 	struct pcib_softc *sc;
122582cb5c3bSJohn Baldwin 	device_t dev;
122682cb5c3bSJohn Baldwin 
122782cb5c3bSJohn Baldwin 	sc = context;
122882cb5c3bSJohn Baldwin 	mtx_lock(&Giant);
122982cb5c3bSJohn Baldwin 	dev = sc->dev;
123082cb5c3bSJohn Baldwin 	if (pcib_hotplug_present(sc) != 0) {
123182cb5c3bSJohn Baldwin 		if (sc->child == NULL) {
123282cb5c3bSJohn Baldwin 			sc->child = device_add_child(dev, "pci", -1);
123382cb5c3bSJohn Baldwin 			bus_generic_attach(dev);
123482cb5c3bSJohn Baldwin 		}
123582cb5c3bSJohn Baldwin 	} else {
123682cb5c3bSJohn Baldwin 		if (sc->child != NULL) {
123782cb5c3bSJohn Baldwin 			if (device_delete_child(dev, sc->child) == 0)
123882cb5c3bSJohn Baldwin 				sc->child = NULL;
123982cb5c3bSJohn Baldwin 		}
124082cb5c3bSJohn Baldwin 	}
124182cb5c3bSJohn Baldwin 	mtx_unlock(&Giant);
124282cb5c3bSJohn Baldwin }
124382cb5c3bSJohn Baldwin 
124482cb5c3bSJohn Baldwin static void
124582cb5c3bSJohn Baldwin pcib_pcie_ab_timeout(void *arg)
124682cb5c3bSJohn Baldwin {
124782cb5c3bSJohn Baldwin 	struct pcib_softc *sc;
124882cb5c3bSJohn Baldwin 
124982cb5c3bSJohn Baldwin 	sc = arg;
125082cb5c3bSJohn Baldwin 	mtx_assert(&Giant, MA_OWNED);
125182cb5c3bSJohn Baldwin 	if (sc->flags & PCIB_DETACH_PENDING) {
125282cb5c3bSJohn Baldwin 		sc->flags |= PCIB_DETACHING;
125382cb5c3bSJohn Baldwin 		sc->flags &= ~PCIB_DETACH_PENDING;
125482cb5c3bSJohn Baldwin 		pcib_pcie_hotplug_update(sc, 0, 0, true);
125582cb5c3bSJohn Baldwin 	}
125682cb5c3bSJohn Baldwin }
125782cb5c3bSJohn Baldwin 
125882cb5c3bSJohn Baldwin static void
125982cb5c3bSJohn Baldwin pcib_pcie_cc_timeout(void *arg)
126082cb5c3bSJohn Baldwin {
126182cb5c3bSJohn Baldwin 	struct pcib_softc *sc;
126282cb5c3bSJohn Baldwin 	device_t dev;
12636f33eaa5SJohn Baldwin 	uint16_t sta;
126482cb5c3bSJohn Baldwin 
126582cb5c3bSJohn Baldwin 	sc = arg;
126682cb5c3bSJohn Baldwin 	dev = sc->dev;
126782cb5c3bSJohn Baldwin 	mtx_assert(&Giant, MA_OWNED);
12686f33eaa5SJohn Baldwin 	sta = pcie_read_config(dev, PCIER_SLOT_STA, 2);
12696f33eaa5SJohn Baldwin 	if (!(sta & PCIEM_SLOT_STA_CC)) {
127082cb5c3bSJohn Baldwin 		device_printf(dev,
1271991d431fSEric van Gyzen 		    "HotPlug Command Timed Out - forcing detach\n");
127282cb5c3bSJohn Baldwin 		sc->flags &= ~(PCIB_HOTPLUG_CMD_PENDING | PCIB_DETACH_PENDING);
127382cb5c3bSJohn Baldwin 		sc->flags |= PCIB_DETACHING;
127482cb5c3bSJohn Baldwin 		pcib_pcie_hotplug_update(sc, 0, 0, true);
12756f33eaa5SJohn Baldwin 	} else {
12766f33eaa5SJohn Baldwin 		device_printf(dev,
12776f33eaa5SJohn Baldwin 	    "Missed HotPlug interrupt waiting for Command Completion\n");
12788a1926c5SWarner Losh 		pcib_pcie_intr_hotplug(sc);
127982cb5c3bSJohn Baldwin 	}
128082cb5c3bSJohn Baldwin }
128182cb5c3bSJohn Baldwin 
128282cb5c3bSJohn Baldwin static void
128382cb5c3bSJohn Baldwin pcib_pcie_dll_timeout(void *arg)
128482cb5c3bSJohn Baldwin {
128582cb5c3bSJohn Baldwin 	struct pcib_softc *sc;
128682cb5c3bSJohn Baldwin 	device_t dev;
128782cb5c3bSJohn Baldwin 	uint16_t sta;
128882cb5c3bSJohn Baldwin 
128982cb5c3bSJohn Baldwin 	sc = arg;
129082cb5c3bSJohn Baldwin 	dev = sc->dev;
129182cb5c3bSJohn Baldwin 	mtx_assert(&Giant, MA_OWNED);
129282cb5c3bSJohn Baldwin 	sta = pcie_read_config(dev, PCIER_LINK_STA, 2);
129382cb5c3bSJohn Baldwin 	if (!(sta & PCIEM_LINK_STA_DL_ACTIVE)) {
129482cb5c3bSJohn Baldwin 		device_printf(dev,
129582cb5c3bSJohn Baldwin 		    "Timed out waiting for Data Link Layer Active\n");
129682cb5c3bSJohn Baldwin 		sc->flags |= PCIB_DETACHING;
129782cb5c3bSJohn Baldwin 		pcib_pcie_hotplug_update(sc, 0, 0, true);
129882cb5c3bSJohn Baldwin 	} else if (sta != sc->pcie_link_sta) {
129982cb5c3bSJohn Baldwin 		device_printf(dev,
130082cb5c3bSJohn Baldwin 		    "Missed HotPlug interrupt waiting for DLL Active\n");
13018a1926c5SWarner Losh 		pcib_pcie_intr_hotplug(sc);
130282cb5c3bSJohn Baldwin 	}
130382cb5c3bSJohn Baldwin }
130482cb5c3bSJohn Baldwin 
130582cb5c3bSJohn Baldwin static int
130682cb5c3bSJohn Baldwin pcib_alloc_pcie_irq(struct pcib_softc *sc)
130782cb5c3bSJohn Baldwin {
130882cb5c3bSJohn Baldwin 	device_t dev;
130982cb5c3bSJohn Baldwin 	int count, error, rid;
131082cb5c3bSJohn Baldwin 
131182cb5c3bSJohn Baldwin 	rid = -1;
131282cb5c3bSJohn Baldwin 	dev = sc->dev;
131382cb5c3bSJohn Baldwin 
131482cb5c3bSJohn Baldwin 	/*
131582cb5c3bSJohn Baldwin 	 * For simplicity, only use MSI-X if there is a single message.
131682cb5c3bSJohn Baldwin 	 * To support a device with multiple messages we would have to
131782cb5c3bSJohn Baldwin 	 * use remap intr if the MSI number is not 0.
131882cb5c3bSJohn Baldwin 	 */
131982cb5c3bSJohn Baldwin 	count = pci_msix_count(dev);
132082cb5c3bSJohn Baldwin 	if (count == 1) {
132182cb5c3bSJohn Baldwin 		error = pci_alloc_msix(dev, &count);
132282cb5c3bSJohn Baldwin 		if (error == 0)
132382cb5c3bSJohn Baldwin 			rid = 1;
132482cb5c3bSJohn Baldwin 	}
132582cb5c3bSJohn Baldwin 
132682cb5c3bSJohn Baldwin 	if (rid < 0 && pci_msi_count(dev) > 0) {
132782cb5c3bSJohn Baldwin 		count = 1;
132882cb5c3bSJohn Baldwin 		error = pci_alloc_msi(dev, &count);
132982cb5c3bSJohn Baldwin 		if (error == 0)
133082cb5c3bSJohn Baldwin 			rid = 1;
133182cb5c3bSJohn Baldwin 	}
133282cb5c3bSJohn Baldwin 
133382cb5c3bSJohn Baldwin 	if (rid < 0)
133482cb5c3bSJohn Baldwin 		rid = 0;
133582cb5c3bSJohn Baldwin 
133682cb5c3bSJohn Baldwin 	sc->pcie_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
133782cb5c3bSJohn Baldwin 	    RF_ACTIVE);
133882cb5c3bSJohn Baldwin 	if (sc->pcie_irq == NULL) {
133982cb5c3bSJohn Baldwin 		device_printf(dev,
134082cb5c3bSJohn Baldwin 		    "Failed to allocate interrupt for PCI-e events\n");
134182cb5c3bSJohn Baldwin 		if (rid > 0)
134282cb5c3bSJohn Baldwin 			pci_release_msi(dev);
134382cb5c3bSJohn Baldwin 		return (ENXIO);
134482cb5c3bSJohn Baldwin 	}
134582cb5c3bSJohn Baldwin 
134682cb5c3bSJohn Baldwin 	error = bus_setup_intr(dev, sc->pcie_irq, INTR_TYPE_MISC,
13478a1926c5SWarner Losh 	    NULL, pcib_pcie_intr_hotplug, sc, &sc->pcie_ihand);
134882cb5c3bSJohn Baldwin 	if (error) {
134982cb5c3bSJohn Baldwin 		device_printf(dev, "Failed to setup PCI-e interrupt handler\n");
135082cb5c3bSJohn Baldwin 		bus_release_resource(dev, SYS_RES_IRQ, rid, sc->pcie_irq);
135182cb5c3bSJohn Baldwin 		if (rid > 0)
135282cb5c3bSJohn Baldwin 			pci_release_msi(dev);
135382cb5c3bSJohn Baldwin 		return (error);
135482cb5c3bSJohn Baldwin 	}
135582cb5c3bSJohn Baldwin 	return (0);
135682cb5c3bSJohn Baldwin }
135782cb5c3bSJohn Baldwin 
13586f33eaa5SJohn Baldwin static int
13596f33eaa5SJohn Baldwin pcib_release_pcie_irq(struct pcib_softc *sc)
13606f33eaa5SJohn Baldwin {
13616f33eaa5SJohn Baldwin 	device_t dev;
13626f33eaa5SJohn Baldwin 	int error;
13636f33eaa5SJohn Baldwin 
13646f33eaa5SJohn Baldwin 	dev = sc->dev;
13656f33eaa5SJohn Baldwin 	error = bus_teardown_intr(dev, sc->pcie_irq, sc->pcie_ihand);
13666f33eaa5SJohn Baldwin 	if (error)
13676f33eaa5SJohn Baldwin 		return (error);
13686f33eaa5SJohn Baldwin 	error = bus_free_resource(dev, SYS_RES_IRQ, sc->pcie_irq);
13696f33eaa5SJohn Baldwin 	if (error)
13706f33eaa5SJohn Baldwin 		return (error);
13716f33eaa5SJohn Baldwin 	return (pci_release_msi(dev));
13726f33eaa5SJohn Baldwin }
13736f33eaa5SJohn Baldwin 
137482cb5c3bSJohn Baldwin static void
137582cb5c3bSJohn Baldwin pcib_setup_hotplug(struct pcib_softc *sc)
137682cb5c3bSJohn Baldwin {
137782cb5c3bSJohn Baldwin 	device_t dev;
137882cb5c3bSJohn Baldwin 	uint16_t mask, val;
137982cb5c3bSJohn Baldwin 
138082cb5c3bSJohn Baldwin 	dev = sc->dev;
138182cb5c3bSJohn Baldwin 	callout_init(&sc->pcie_ab_timer, 0);
138282cb5c3bSJohn Baldwin 	callout_init(&sc->pcie_cc_timer, 0);
138382cb5c3bSJohn Baldwin 	callout_init(&sc->pcie_dll_timer, 0);
138482cb5c3bSJohn Baldwin 	TASK_INIT(&sc->pcie_hp_task, 0, pcib_pcie_hotplug_task, sc);
138582cb5c3bSJohn Baldwin 
138682cb5c3bSJohn Baldwin 	/* Allocate IRQ. */
138782cb5c3bSJohn Baldwin 	if (pcib_alloc_pcie_irq(sc) != 0)
138882cb5c3bSJohn Baldwin 		return;
138982cb5c3bSJohn Baldwin 
139082cb5c3bSJohn Baldwin 	sc->pcie_link_sta = pcie_read_config(dev, PCIER_LINK_STA, 2);
139182cb5c3bSJohn Baldwin 	sc->pcie_slot_sta = pcie_read_config(dev, PCIER_SLOT_STA, 2);
139282cb5c3bSJohn Baldwin 
13936f33eaa5SJohn Baldwin 	/* Clear any events previously pending. */
13946f33eaa5SJohn Baldwin 	pcie_write_config(dev, PCIER_SLOT_STA, sc->pcie_slot_sta, 2);
13956f33eaa5SJohn Baldwin 
139682cb5c3bSJohn Baldwin 	/* Enable HotPlug events. */
139782cb5c3bSJohn Baldwin 	mask = PCIEM_SLOT_CTL_DLLSCE | PCIEM_SLOT_CTL_HPIE |
139882cb5c3bSJohn Baldwin 	    PCIEM_SLOT_CTL_CCIE | PCIEM_SLOT_CTL_PDCE | PCIEM_SLOT_CTL_MRLSCE |
139982cb5c3bSJohn Baldwin 	    PCIEM_SLOT_CTL_PFDE | PCIEM_SLOT_CTL_ABPE;
140037290148SEric van Gyzen 	val = PCIEM_SLOT_CTL_DLLSCE | PCIEM_SLOT_CTL_HPIE | PCIEM_SLOT_CTL_PDCE;
140182cb5c3bSJohn Baldwin 	if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_APB)
140282cb5c3bSJohn Baldwin 		val |= PCIEM_SLOT_CTL_ABPE;
140382cb5c3bSJohn Baldwin 	if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_PCP)
140482cb5c3bSJohn Baldwin 		val |= PCIEM_SLOT_CTL_PFDE;
140582cb5c3bSJohn Baldwin 	if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_MRLSP)
140682cb5c3bSJohn Baldwin 		val |= PCIEM_SLOT_CTL_MRLSCE;
140782cb5c3bSJohn Baldwin 	if (!(sc->pcie_slot_cap & PCIEM_SLOT_CAP_NCCS))
140882cb5c3bSJohn Baldwin 		val |= PCIEM_SLOT_CTL_CCIE;
140982cb5c3bSJohn Baldwin 
141082cb5c3bSJohn Baldwin 	/* Turn the attention indicator off. */
141182cb5c3bSJohn Baldwin 	if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_AIP) {
141282cb5c3bSJohn Baldwin 		mask |= PCIEM_SLOT_CTL_AIC;
141382cb5c3bSJohn Baldwin 		val |= PCIEM_SLOT_CTL_AI_OFF;
141482cb5c3bSJohn Baldwin 	}
141582cb5c3bSJohn Baldwin 
141682cb5c3bSJohn Baldwin 	pcib_pcie_hotplug_update(sc, val, mask, false);
141782cb5c3bSJohn Baldwin }
14186f33eaa5SJohn Baldwin 
14196f33eaa5SJohn Baldwin static int
14206f33eaa5SJohn Baldwin pcib_detach_hotplug(struct pcib_softc *sc)
14216f33eaa5SJohn Baldwin {
14226f33eaa5SJohn Baldwin 	uint16_t mask, val;
14236f33eaa5SJohn Baldwin 	int error;
14246f33eaa5SJohn Baldwin 
14256f33eaa5SJohn Baldwin 	/* Disable the card in the slot and force it to detach. */
14266f33eaa5SJohn Baldwin 	if (sc->flags & PCIB_DETACH_PENDING) {
14276f33eaa5SJohn Baldwin 		sc->flags &= ~PCIB_DETACH_PENDING;
14286f33eaa5SJohn Baldwin 		callout_stop(&sc->pcie_ab_timer);
14296f33eaa5SJohn Baldwin 	}
14306f33eaa5SJohn Baldwin 	sc->flags |= PCIB_DETACHING;
14316f33eaa5SJohn Baldwin 
14326f33eaa5SJohn Baldwin 	if (sc->flags & PCIB_HOTPLUG_CMD_PENDING) {
14336f33eaa5SJohn Baldwin 		callout_stop(&sc->pcie_cc_timer);
14346f33eaa5SJohn Baldwin 		tsleep(sc, 0, "hpcmd", hz);
14356f33eaa5SJohn Baldwin 		sc->flags &= ~PCIB_HOTPLUG_CMD_PENDING;
14366f33eaa5SJohn Baldwin 	}
14376f33eaa5SJohn Baldwin 
14386f33eaa5SJohn Baldwin 	/* Disable HotPlug events. */
14396f33eaa5SJohn Baldwin 	mask = PCIEM_SLOT_CTL_DLLSCE | PCIEM_SLOT_CTL_HPIE |
14406f33eaa5SJohn Baldwin 	    PCIEM_SLOT_CTL_CCIE | PCIEM_SLOT_CTL_PDCE | PCIEM_SLOT_CTL_MRLSCE |
14416f33eaa5SJohn Baldwin 	    PCIEM_SLOT_CTL_PFDE | PCIEM_SLOT_CTL_ABPE;
14426f33eaa5SJohn Baldwin 	val = 0;
14436f33eaa5SJohn Baldwin 
14446f33eaa5SJohn Baldwin 	/* Turn the attention indicator off. */
14456f33eaa5SJohn Baldwin 	if (sc->pcie_slot_cap & PCIEM_SLOT_CAP_AIP) {
14466f33eaa5SJohn Baldwin 		mask |= PCIEM_SLOT_CTL_AIC;
14476f33eaa5SJohn Baldwin 		val |= PCIEM_SLOT_CTL_AI_OFF;
14486f33eaa5SJohn Baldwin 	}
14496f33eaa5SJohn Baldwin 
14506f33eaa5SJohn Baldwin 	pcib_pcie_hotplug_update(sc, val, mask, false);
14516f33eaa5SJohn Baldwin 
14526f33eaa5SJohn Baldwin 	error = pcib_release_pcie_irq(sc);
14536f33eaa5SJohn Baldwin 	if (error)
14546f33eaa5SJohn Baldwin 		return (error);
14556f33eaa5SJohn Baldwin 	taskqueue_drain(taskqueue_thread, &sc->pcie_hp_task);
14566f33eaa5SJohn Baldwin 	callout_drain(&sc->pcie_ab_timer);
14576f33eaa5SJohn Baldwin 	callout_drain(&sc->pcie_cc_timer);
14586f33eaa5SJohn Baldwin 	callout_drain(&sc->pcie_dll_timer);
14596f33eaa5SJohn Baldwin 	return (0);
14606f33eaa5SJohn Baldwin }
146182cb5c3bSJohn Baldwin #endif
146282cb5c3bSJohn Baldwin 
1463e36af292SJung-uk Kim /*
1464e36af292SJung-uk Kim  * Get current bridge configuration.
1465e36af292SJung-uk Kim  */
1466e36af292SJung-uk Kim static void
1467e36af292SJung-uk Kim pcib_cfg_save(struct pcib_softc *sc)
1468e36af292SJung-uk Kim {
1469ad6f36f8SJohn Baldwin #ifndef NEW_PCIB
1470e36af292SJung-uk Kim 	device_t	dev;
1471ad6f36f8SJohn Baldwin 	uint16_t command;
1472e36af292SJung-uk Kim 
1473e36af292SJung-uk Kim 	dev = sc->dev;
1474e36af292SJung-uk Kim 
1475ad6f36f8SJohn Baldwin 	command = pci_read_config(dev, PCIR_COMMAND, 2);
1476ad6f36f8SJohn Baldwin 	if (command & PCIM_CMD_PORTEN)
1477e36af292SJung-uk Kim 		pcib_get_io_decode(sc);
1478ad6f36f8SJohn Baldwin 	if (command & PCIM_CMD_MEMEN)
1479e36af292SJung-uk Kim 		pcib_get_mem_decode(sc);
148083c41143SJohn Baldwin #endif
1481e36af292SJung-uk Kim }
1482e36af292SJung-uk Kim 
1483e36af292SJung-uk Kim /*
1484e36af292SJung-uk Kim  * Restore previous bridge configuration.
1485e36af292SJung-uk Kim  */
1486e36af292SJung-uk Kim static void
1487e36af292SJung-uk Kim pcib_cfg_restore(struct pcib_softc *sc)
1488e36af292SJung-uk Kim {
1489ad6f36f8SJohn Baldwin #ifndef NEW_PCIB
1490ad6f36f8SJohn Baldwin 	uint16_t command;
1491ad6f36f8SJohn Baldwin #endif
1492e36af292SJung-uk Kim 
149383c41143SJohn Baldwin #ifdef NEW_PCIB
149483c41143SJohn Baldwin 	pcib_write_windows(sc, WIN_IO | WIN_MEM | WIN_PMEM);
149583c41143SJohn Baldwin #else
1496151ba793SAlexander Kabaev 	command = pci_read_config(sc->dev, PCIR_COMMAND, 2);
1497ad6f36f8SJohn Baldwin 	if (command & PCIM_CMD_PORTEN)
1498e36af292SJung-uk Kim 		pcib_set_io_decode(sc);
1499ad6f36f8SJohn Baldwin 	if (command & PCIM_CMD_MEMEN)
1500e36af292SJung-uk Kim 		pcib_set_mem_decode(sc);
150183c41143SJohn Baldwin #endif
1502e36af292SJung-uk Kim }
1503e36af292SJung-uk Kim 
1504e36af292SJung-uk Kim /*
1505bb0d0a8eSMike Smith  * Generic device interface
1506bb0d0a8eSMike Smith  */
1507bb0d0a8eSMike Smith static int
1508bb0d0a8eSMike Smith pcib_probe(device_t dev)
1509bb0d0a8eSMike Smith {
1510bb0d0a8eSMike Smith     if ((pci_get_class(dev) == PCIC_BRIDGE) &&
1511bb0d0a8eSMike Smith 	(pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) {
1512bb0d0a8eSMike Smith 	device_set_desc(dev, "PCI-PCI bridge");
1513b7cbd25bSMarcel Moolenaar 	return(-10000);
1514bb0d0a8eSMike Smith     }
1515bb0d0a8eSMike Smith     return(ENXIO);
1516bb0d0a8eSMike Smith }
1517bb0d0a8eSMike Smith 
15186f0d5884SJohn Baldwin void
15196f0d5884SJohn Baldwin pcib_attach_common(device_t dev)
1520bb0d0a8eSMike Smith {
1521bb0d0a8eSMike Smith     struct pcib_softc	*sc;
1522abf07f13SWarner Losh     struct sysctl_ctx_list *sctx;
1523abf07f13SWarner Losh     struct sysctl_oid	*soid;
1524c825d4dcSJohn Baldwin     int comma;
1525bb0d0a8eSMike Smith 
1526bb0d0a8eSMike Smith     sc = device_get_softc(dev);
1527bb0d0a8eSMike Smith     sc->dev = dev;
1528bb0d0a8eSMike Smith 
15294fa59183SMike Smith     /*
15304fa59183SMike Smith      * Get current bridge configuration.
15314fa59183SMike Smith      */
153255aaf894SMarius Strobl     sc->domain = pci_get_domain(dev);
1533ad6f36f8SJohn Baldwin #if !(defined(NEW_PCIB) && defined(PCI_RES_BUS))
1534ad6f36f8SJohn Baldwin     sc->bus.sec = pci_read_config(dev, PCIR_SECBUS_1, 1);
1535ad6f36f8SJohn Baldwin     sc->bus.sub = pci_read_config(dev, PCIR_SUBBUS_1, 1);
1536ad6f36f8SJohn Baldwin #endif
1537ad6f36f8SJohn Baldwin     sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
1538e36af292SJung-uk Kim     pcib_cfg_save(sc);
15394fa59183SMike Smith 
15404fa59183SMike Smith     /*
15414edef187SJohn Baldwin      * The primary bus register should always be the bus of the
15424edef187SJohn Baldwin      * parent.
15434edef187SJohn Baldwin      */
15444edef187SJohn Baldwin     sc->pribus = pci_get_bus(dev);
15454edef187SJohn Baldwin     pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1);
15464edef187SJohn Baldwin 
15474edef187SJohn Baldwin     /*
1548abf07f13SWarner Losh      * Setup sysctl reporting nodes
1549abf07f13SWarner Losh      */
1550abf07f13SWarner Losh     sctx = device_get_sysctl_ctx(dev);
1551abf07f13SWarner Losh     soid = device_get_sysctl_tree(dev);
1552abf07f13SWarner Losh     SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain",
1553abf07f13SWarner Losh       CTLFLAG_RD, &sc->domain, 0, "Domain number");
1554abf07f13SWarner Losh     SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus",
1555abf07f13SWarner Losh       CTLFLAG_RD, &sc->pribus, 0, "Primary bus number");
1556abf07f13SWarner Losh     SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
15574edef187SJohn Baldwin       CTLFLAG_RD, &sc->bus.sec, 0, "Secondary bus number");
1558abf07f13SWarner Losh     SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
15594edef187SJohn Baldwin       CTLFLAG_RD, &sc->bus.sub, 0, "Subordinate bus number");
1560abf07f13SWarner Losh 
1561abf07f13SWarner Losh     /*
15624fa59183SMike Smith      * Quirk handling.
15634fa59183SMike Smith      */
15644fa59183SMike Smith     switch (pci_get_devid(dev)) {
15652ae5fd15SJohn Baldwin #if !(defined(NEW_PCIB) && defined(PCI_RES_BUS))
15664fa59183SMike Smith     case 0x12258086:		/* Intel 82454KX/GX (Orion) */
15674fa59183SMike Smith 	{
1568b0cb115fSWarner Losh 	    uint8_t	supbus;
15694fa59183SMike Smith 
15704fa59183SMike Smith 	    supbus = pci_read_config(dev, 0x41, 1);
15714fa59183SMike Smith 	    if (supbus != 0xff) {
15724edef187SJohn Baldwin 		sc->bus.sec = supbus + 1;
15734edef187SJohn Baldwin 		sc->bus.sub = supbus + 1;
15744fa59183SMike Smith 	    }
15754fa59183SMike Smith 	    break;
15764fa59183SMike Smith 	}
15774edef187SJohn Baldwin #endif
15784fa59183SMike Smith 
1579e4b59fc5SWarner Losh     /*
1580e4b59fc5SWarner Losh      * The i82380FB mobile docking controller is a PCI-PCI bridge,
1581e4b59fc5SWarner Losh      * and it is a subtractive bridge.  However, the ProgIf is wrong
1582e4b59fc5SWarner Losh      * so the normal setting of PCIB_SUBTRACTIVE bit doesn't
15834718610dSZbigniew Bodek      * happen.  There are also Toshiba and Cavium ThunderX bridges
15844718610dSZbigniew Bodek      * that behave this way.
1585e4b59fc5SWarner Losh      */
15864718610dSZbigniew Bodek     case 0xa002177d:		/* Cavium ThunderX */
1587e4b59fc5SWarner Losh     case 0x124b8086:		/* Intel 82380FB Mobile */
1588e4b59fc5SWarner Losh     case 0x060513d7:		/* Toshiba ???? */
1589e4b59fc5SWarner Losh 	sc->flags |= PCIB_SUBTRACTIVE;
1590e4b59fc5SWarner Losh 	break;
1591c94d6dbeSJung-uk Kim 
15922ae5fd15SJohn Baldwin #if !(defined(NEW_PCIB) && defined(PCI_RES_BUS))
1593c94d6dbeSJung-uk Kim     /* Compaq R3000 BIOS sets wrong subordinate bus number. */
1594c94d6dbeSJung-uk Kim     case 0x00dd10de:
1595c94d6dbeSJung-uk Kim 	{
1596c94d6dbeSJung-uk Kim 	    char *cp;
1597c94d6dbeSJung-uk Kim 
15982be111bfSDavide Italiano 	    if ((cp = kern_getenv("smbios.planar.maker")) == NULL)
1599c94d6dbeSJung-uk Kim 		break;
16001def0ca6SJung-uk Kim 	    if (strncmp(cp, "Compal", 6) != 0) {
16011def0ca6SJung-uk Kim 		freeenv(cp);
1602c94d6dbeSJung-uk Kim 		break;
16031def0ca6SJung-uk Kim 	    }
16041def0ca6SJung-uk Kim 	    freeenv(cp);
16052be111bfSDavide Italiano 	    if ((cp = kern_getenv("smbios.planar.product")) == NULL)
16061def0ca6SJung-uk Kim 		break;
16071def0ca6SJung-uk Kim 	    if (strncmp(cp, "08A0", 4) != 0) {
16081def0ca6SJung-uk Kim 		freeenv(cp);
16091def0ca6SJung-uk Kim 		break;
16101def0ca6SJung-uk Kim 	    }
16111def0ca6SJung-uk Kim 	    freeenv(cp);
16124edef187SJohn Baldwin 	    if (sc->bus.sub < 0xa) {
1613c94d6dbeSJung-uk Kim 		pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1);
16144edef187SJohn Baldwin 		sc->bus.sub = pci_read_config(dev, PCIR_SUBBUS_1, 1);
1615c94d6dbeSJung-uk Kim 	    }
1616c94d6dbeSJung-uk Kim 	    break;
1617c94d6dbeSJung-uk Kim 	}
16184edef187SJohn Baldwin #endif
1619e4b59fc5SWarner Losh     }
1620e4b59fc5SWarner Losh 
162122bf1c7fSJohn Baldwin     if (pci_msi_device_blacklisted(dev))
162222bf1c7fSJohn Baldwin 	sc->flags |= PCIB_DISABLE_MSI;
162322bf1c7fSJohn Baldwin 
162468e9cbd3SMarius Strobl     if (pci_msix_device_blacklisted(dev))
162568e9cbd3SMarius Strobl 	sc->flags |= PCIB_DISABLE_MSIX;
162668e9cbd3SMarius Strobl 
1627e4b59fc5SWarner Losh     /*
1628e4b59fc5SWarner Losh      * Intel 815, 845 and other chipsets say they are PCI-PCI bridges,
1629e4b59fc5SWarner Losh      * but have a ProgIF of 0x80.  The 82801 family (AA, AB, BAM/CAM,
1630e4b59fc5SWarner Losh      * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese.
1631e4b59fc5SWarner Losh      * This means they act as if they were subtractively decoding
1632e4b59fc5SWarner Losh      * bridges and pass all transactions.  Mark them and real ProgIf 1
1633e4b59fc5SWarner Losh      * parts as subtractive.
1634e4b59fc5SWarner Losh      */
1635e4b59fc5SWarner Losh     if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 ||
1636657d9f9fSJohn Baldwin       pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE)
1637e4b59fc5SWarner Losh 	sc->flags |= PCIB_SUBTRACTIVE;
1638e4b59fc5SWarner Losh 
163982cb5c3bSJohn Baldwin #ifdef PCI_HP
164082cb5c3bSJohn Baldwin     pcib_probe_hotplug(sc);
164182cb5c3bSJohn Baldwin #endif
164283c41143SJohn Baldwin #ifdef NEW_PCIB
16434edef187SJohn Baldwin #ifdef PCI_RES_BUS
16444edef187SJohn Baldwin     pcib_setup_secbus(dev, &sc->bus, 1);
16454edef187SJohn Baldwin #endif
164683c41143SJohn Baldwin     pcib_probe_windows(sc);
164783c41143SJohn Baldwin #endif
164882cb5c3bSJohn Baldwin #ifdef PCI_HP
164982cb5c3bSJohn Baldwin     if (sc->flags & PCIB_HOTPLUG)
165082cb5c3bSJohn Baldwin 	    pcib_setup_hotplug(sc);
165182cb5c3bSJohn Baldwin #endif
1652bb0d0a8eSMike Smith     if (bootverbose) {
165355aaf894SMarius Strobl 	device_printf(dev, "  domain            %d\n", sc->domain);
16544edef187SJohn Baldwin 	device_printf(dev, "  secondary bus     %d\n", sc->bus.sec);
16554edef187SJohn Baldwin 	device_printf(dev, "  subordinate bus   %d\n", sc->bus.sub);
165683c41143SJohn Baldwin #ifdef NEW_PCIB
165783c41143SJohn Baldwin 	if (pcib_is_window_open(&sc->io))
165883c41143SJohn Baldwin 	    device_printf(dev, "  I/O decode        0x%jx-0x%jx\n",
165983c41143SJohn Baldwin 	      (uintmax_t)sc->io.base, (uintmax_t)sc->io.limit);
166083c41143SJohn Baldwin 	if (pcib_is_window_open(&sc->mem))
166183c41143SJohn Baldwin 	    device_printf(dev, "  memory decode     0x%jx-0x%jx\n",
166283c41143SJohn Baldwin 	      (uintmax_t)sc->mem.base, (uintmax_t)sc->mem.limit);
166383c41143SJohn Baldwin 	if (pcib_is_window_open(&sc->pmem))
166483c41143SJohn Baldwin 	    device_printf(dev, "  prefetched decode 0x%jx-0x%jx\n",
166583c41143SJohn Baldwin 	      (uintmax_t)sc->pmem.base, (uintmax_t)sc->pmem.limit);
166683c41143SJohn Baldwin #else
166783c41143SJohn Baldwin 	if (pcib_is_io_open(sc))
166883c41143SJohn Baldwin 	    device_printf(dev, "  I/O decode        0x%x-0x%x\n",
166983c41143SJohn Baldwin 	      sc->iobase, sc->iolimit);
1670b0a2d4b8SWarner Losh 	if (pcib_is_nonprefetch_open(sc))
1671b0a2d4b8SWarner Losh 	    device_printf(dev, "  memory decode     0x%jx-0x%jx\n",
1672b0a2d4b8SWarner Losh 	      (uintmax_t)sc->membase, (uintmax_t)sc->memlimit);
1673b0a2d4b8SWarner Losh 	if (pcib_is_prefetch_open(sc))
1674b0a2d4b8SWarner Losh 	    device_printf(dev, "  prefetched decode 0x%jx-0x%jx\n",
1675b0a2d4b8SWarner Losh 	      (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
167683c41143SJohn Baldwin #endif
1677c825d4dcSJohn Baldwin 	if (sc->bridgectl & (PCIB_BCR_ISA_ENABLE | PCIB_BCR_VGA_ENABLE) ||
1678c825d4dcSJohn Baldwin 	    sc->flags & PCIB_SUBTRACTIVE) {
1679c825d4dcSJohn Baldwin 		device_printf(dev, "  special decode    ");
1680c825d4dcSJohn Baldwin 		comma = 0;
1681c825d4dcSJohn Baldwin 		if (sc->bridgectl & PCIB_BCR_ISA_ENABLE) {
1682c825d4dcSJohn Baldwin 			printf("ISA");
1683c825d4dcSJohn Baldwin 			comma = 1;
1684c825d4dcSJohn Baldwin 		}
1685c825d4dcSJohn Baldwin 		if (sc->bridgectl & PCIB_BCR_VGA_ENABLE) {
1686c825d4dcSJohn Baldwin 			printf("%sVGA", comma ? ", " : "");
1687c825d4dcSJohn Baldwin 			comma = 1;
1688c825d4dcSJohn Baldwin 		}
1689e4b59fc5SWarner Losh 		if (sc->flags & PCIB_SUBTRACTIVE)
1690c825d4dcSJohn Baldwin 			printf("%ssubtractive", comma ? ", " : "");
1691c825d4dcSJohn Baldwin 		printf("\n");
1692c825d4dcSJohn Baldwin 	}
1693bb0d0a8eSMike Smith     }
1694bb0d0a8eSMike Smith 
1695bb0d0a8eSMike Smith     /*
1696ef888152SJohn Baldwin      * Always enable busmastering on bridges so that transactions
1697ef888152SJohn Baldwin      * initiated on the secondary bus are passed through to the
1698ef888152SJohn Baldwin      * primary bus.
1699ef888152SJohn Baldwin      */
1700ef888152SJohn Baldwin     pci_enable_busmaster(dev);
17016f0d5884SJohn Baldwin }
1702bb0d0a8eSMike Smith 
170382cb5c3bSJohn Baldwin #ifdef PCI_HP
170482cb5c3bSJohn Baldwin static int
170582cb5c3bSJohn Baldwin pcib_present(struct pcib_softc *sc)
170682cb5c3bSJohn Baldwin {
170782cb5c3bSJohn Baldwin 
170882cb5c3bSJohn Baldwin 	if (sc->flags & PCIB_HOTPLUG)
170982cb5c3bSJohn Baldwin 		return (pcib_hotplug_present(sc) != 0);
171082cb5c3bSJohn Baldwin 	return (1);
171182cb5c3bSJohn Baldwin }
171282cb5c3bSJohn Baldwin #endif
171382cb5c3bSJohn Baldwin 
171438906aedSJohn Baldwin int
171567e7d085SJohn Baldwin pcib_attach_child(device_t dev)
17166f0d5884SJohn Baldwin {
17176f0d5884SJohn Baldwin 	struct pcib_softc *sc;
17186f0d5884SJohn Baldwin 
17196f0d5884SJohn Baldwin 	sc = device_get_softc(dev);
172067e7d085SJohn Baldwin 	if (sc->bus.sec == 0) {
172167e7d085SJohn Baldwin 		/* no secondary bus; we should have fixed this */
172267e7d085SJohn Baldwin 		return(0);
172367e7d085SJohn Baldwin 	}
172467e7d085SJohn Baldwin 
172582cb5c3bSJohn Baldwin #ifdef PCI_HP
172682cb5c3bSJohn Baldwin 	if (!pcib_present(sc)) {
172782cb5c3bSJohn Baldwin 		/* An empty HotPlug slot, so don't add a PCI bus yet. */
172882cb5c3bSJohn Baldwin 		return (0);
172982cb5c3bSJohn Baldwin 	}
173082cb5c3bSJohn Baldwin #endif
173182cb5c3bSJohn Baldwin 
173267e7d085SJohn Baldwin 	sc->child = device_add_child(dev, "pci", -1);
1733bb0d0a8eSMike Smith 	return (bus_generic_attach(dev));
1734bb0d0a8eSMike Smith }
1735bb0d0a8eSMike Smith 
173667e7d085SJohn Baldwin int
173767e7d085SJohn Baldwin pcib_attach(device_t dev)
173867e7d085SJohn Baldwin {
173967e7d085SJohn Baldwin 
174067e7d085SJohn Baldwin     pcib_attach_common(dev);
174167e7d085SJohn Baldwin     return (pcib_attach_child(dev));
1742bb0d0a8eSMike Smith }
1743bb0d0a8eSMike Smith 
17446f0d5884SJohn Baldwin int
17456f33eaa5SJohn Baldwin pcib_detach(device_t dev)
17466f33eaa5SJohn Baldwin {
17476f33eaa5SJohn Baldwin #if defined(PCI_HP) || defined(NEW_PCIB)
17486f33eaa5SJohn Baldwin 	struct pcib_softc *sc;
17496f33eaa5SJohn Baldwin #endif
17506f33eaa5SJohn Baldwin 	int error;
17516f33eaa5SJohn Baldwin 
17526f33eaa5SJohn Baldwin #if defined(PCI_HP) || defined(NEW_PCIB)
17536f33eaa5SJohn Baldwin 	sc = device_get_softc(dev);
17546f33eaa5SJohn Baldwin #endif
17556f33eaa5SJohn Baldwin 	error = bus_generic_detach(dev);
17566f33eaa5SJohn Baldwin 	if (error)
17576f33eaa5SJohn Baldwin 		return (error);
17586f33eaa5SJohn Baldwin #ifdef PCI_HP
17596f33eaa5SJohn Baldwin 	if (sc->flags & PCIB_HOTPLUG) {
17606f33eaa5SJohn Baldwin 		error = pcib_detach_hotplug(sc);
17616f33eaa5SJohn Baldwin 		if (error)
17626f33eaa5SJohn Baldwin 			return (error);
17636f33eaa5SJohn Baldwin 	}
17646f33eaa5SJohn Baldwin #endif
17656f33eaa5SJohn Baldwin 	error = device_delete_children(dev);
17666f33eaa5SJohn Baldwin 	if (error)
17676f33eaa5SJohn Baldwin 		return (error);
17686f33eaa5SJohn Baldwin #ifdef NEW_PCIB
17696f33eaa5SJohn Baldwin 	pcib_free_windows(sc);
17706f33eaa5SJohn Baldwin #ifdef PCI_RES_BUS
17716f33eaa5SJohn Baldwin 	pcib_free_secbus(dev, &sc->bus);
17726f33eaa5SJohn Baldwin #endif
17736f33eaa5SJohn Baldwin #endif
17746f33eaa5SJohn Baldwin 	return (0);
17756f33eaa5SJohn Baldwin }
17766f33eaa5SJohn Baldwin 
17776f33eaa5SJohn Baldwin int
1778e36af292SJung-uk Kim pcib_suspend(device_t dev)
1779e36af292SJung-uk Kim {
1780e36af292SJung-uk Kim 
1781e36af292SJung-uk Kim 	pcib_cfg_save(device_get_softc(dev));
17827212fc6aSJohn Baldwin 	return (bus_generic_suspend(dev));
1783e36af292SJung-uk Kim }
1784e36af292SJung-uk Kim 
1785e36af292SJung-uk Kim int
1786e36af292SJung-uk Kim pcib_resume(device_t dev)
1787e36af292SJung-uk Kim {
1788e36af292SJung-uk Kim 
1789e36af292SJung-uk Kim 	pcib_cfg_restore(device_get_softc(dev));
1790e36af292SJung-uk Kim 	return (bus_generic_resume(dev));
1791e36af292SJung-uk Kim }
1792e36af292SJung-uk Kim 
1793809923caSJustin Hibbits void
1794809923caSJustin Hibbits pcib_bridge_init(device_t dev)
1795809923caSJustin Hibbits {
1796809923caSJustin Hibbits 	pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
1797809923caSJustin Hibbits 	pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2);
1798809923caSJustin Hibbits 	pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1);
1799809923caSJustin Hibbits 	pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2);
1800809923caSJustin Hibbits 	pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2);
1801809923caSJustin Hibbits 	pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2);
1802809923caSJustin Hibbits 	pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
1803809923caSJustin Hibbits 	pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4);
1804809923caSJustin Hibbits 	pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2);
1805809923caSJustin Hibbits 	pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4);
1806809923caSJustin Hibbits }
1807809923caSJustin Hibbits 
1808e36af292SJung-uk Kim int
180982cb5c3bSJohn Baldwin pcib_child_present(device_t dev, device_t child)
181082cb5c3bSJohn Baldwin {
181182cb5c3bSJohn Baldwin #ifdef PCI_HP
181282cb5c3bSJohn Baldwin 	struct pcib_softc *sc = device_get_softc(dev);
181382cb5c3bSJohn Baldwin 	int retval;
181482cb5c3bSJohn Baldwin 
181582cb5c3bSJohn Baldwin 	retval = bus_child_present(dev);
181682cb5c3bSJohn Baldwin 	if (retval != 0 && sc->flags & PCIB_HOTPLUG)
181782cb5c3bSJohn Baldwin 		retval = pcib_hotplug_present(sc);
181882cb5c3bSJohn Baldwin 	return (retval);
181982cb5c3bSJohn Baldwin #else
182082cb5c3bSJohn Baldwin 	return (bus_child_present(dev));
182182cb5c3bSJohn Baldwin #endif
182282cb5c3bSJohn Baldwin }
182382cb5c3bSJohn Baldwin 
182482cb5c3bSJohn Baldwin int
1825bb0d0a8eSMike Smith pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
1826bb0d0a8eSMike Smith {
1827bb0d0a8eSMike Smith     struct pcib_softc	*sc = device_get_softc(dev);
1828bb0d0a8eSMike Smith 
1829bb0d0a8eSMike Smith     switch (which) {
183055aaf894SMarius Strobl     case PCIB_IVAR_DOMAIN:
183155aaf894SMarius Strobl 	*result = sc->domain;
183255aaf894SMarius Strobl 	return(0);
1833bb0d0a8eSMike Smith     case PCIB_IVAR_BUS:
18344edef187SJohn Baldwin 	*result = sc->bus.sec;
1835bb0d0a8eSMike Smith 	return(0);
1836bb0d0a8eSMike Smith     }
1837bb0d0a8eSMike Smith     return(ENOENT);
1838bb0d0a8eSMike Smith }
1839bb0d0a8eSMike Smith 
18406f0d5884SJohn Baldwin int
1841bb0d0a8eSMike Smith pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
1842bb0d0a8eSMike Smith {
1843bb0d0a8eSMike Smith 
1844bb0d0a8eSMike Smith     switch (which) {
184555aaf894SMarius Strobl     case PCIB_IVAR_DOMAIN:
184655aaf894SMarius Strobl 	return(EINVAL);
1847bb0d0a8eSMike Smith     case PCIB_IVAR_BUS:
18484edef187SJohn Baldwin 	return(EINVAL);
1849bb0d0a8eSMike Smith     }
1850bb0d0a8eSMike Smith     return(ENOENT);
1851bb0d0a8eSMike Smith }
1852bb0d0a8eSMike Smith 
185383c41143SJohn Baldwin #ifdef NEW_PCIB
185483c41143SJohn Baldwin /*
185583c41143SJohn Baldwin  * Attempt to allocate a resource from the existing resources assigned
185683c41143SJohn Baldwin  * to a window.
185783c41143SJohn Baldwin  */
185883c41143SJohn Baldwin static struct resource *
185983c41143SJohn Baldwin pcib_suballoc_resource(struct pcib_softc *sc, struct pcib_window *w,
18602dd1bdf1SJustin Hibbits     device_t child, int type, int *rid, rman_res_t start, rman_res_t end,
18612dd1bdf1SJustin Hibbits     rman_res_t count, u_int flags)
186283c41143SJohn Baldwin {
186383c41143SJohn Baldwin 	struct resource *res;
186483c41143SJohn Baldwin 
186583c41143SJohn Baldwin 	if (!pcib_is_window_open(w))
186683c41143SJohn Baldwin 		return (NULL);
186783c41143SJohn Baldwin 
186883c41143SJohn Baldwin 	res = rman_reserve_resource(&w->rman, start, end, count,
186983c41143SJohn Baldwin 	    flags & ~RF_ACTIVE, child);
187083c41143SJohn Baldwin 	if (res == NULL)
187183c41143SJohn Baldwin 		return (NULL);
187283c41143SJohn Baldwin 
187383c41143SJohn Baldwin 	if (bootverbose)
187483c41143SJohn Baldwin 		device_printf(sc->dev,
1875da1b038aSJustin Hibbits 		    "allocated %s range (%#jx-%#jx) for rid %x of %s\n",
187683c41143SJohn Baldwin 		    w->name, rman_get_start(res), rman_get_end(res), *rid,
187783c41143SJohn Baldwin 		    pcib_child_name(child));
187883c41143SJohn Baldwin 	rman_set_rid(res, *rid);
187983c41143SJohn Baldwin 
188083c41143SJohn Baldwin 	/*
188183c41143SJohn Baldwin 	 * If the resource should be active, pass that request up the
188283c41143SJohn Baldwin 	 * tree.  This assumes the parent drivers can handle
188383c41143SJohn Baldwin 	 * activating sub-allocated resources.
188483c41143SJohn Baldwin 	 */
188583c41143SJohn Baldwin 	if (flags & RF_ACTIVE) {
188683c41143SJohn Baldwin 		if (bus_activate_resource(child, type, *rid, res) != 0) {
188783c41143SJohn Baldwin 			rman_release_resource(res);
188883c41143SJohn Baldwin 			return (NULL);
188983c41143SJohn Baldwin 		}
189083c41143SJohn Baldwin 	}
189183c41143SJohn Baldwin 
189283c41143SJohn Baldwin 	return (res);
189383c41143SJohn Baldwin }
189483c41143SJohn Baldwin 
1895c825d4dcSJohn Baldwin /* Allocate a fresh resource range for an unconfigured window. */
1896c825d4dcSJohn Baldwin static int
1897c825d4dcSJohn Baldwin pcib_alloc_new_window(struct pcib_softc *sc, struct pcib_window *w, int type,
18982dd1bdf1SJustin Hibbits     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
1899c825d4dcSJohn Baldwin {
1900c825d4dcSJohn Baldwin 	struct resource *res;
19012dd1bdf1SJustin Hibbits 	rman_res_t base, limit, wmask;
1902c825d4dcSJohn Baldwin 	int rid;
1903c825d4dcSJohn Baldwin 
1904c825d4dcSJohn Baldwin 	/*
1905c825d4dcSJohn Baldwin 	 * If this is an I/O window on a bridge with ISA enable set
1906c825d4dcSJohn Baldwin 	 * and the start address is below 64k, then try to allocate an
1907c825d4dcSJohn Baldwin 	 * initial window of 0x1000 bytes long starting at address
1908c825d4dcSJohn Baldwin 	 * 0xf000 and walking down.  Note that if the original request
1909c825d4dcSJohn Baldwin 	 * was larger than the non-aliased range size of 0x100 our
1910c825d4dcSJohn Baldwin 	 * caller would have raised the start address up to 64k
1911c825d4dcSJohn Baldwin 	 * already.
1912c825d4dcSJohn Baldwin 	 */
1913c825d4dcSJohn Baldwin 	if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1914c825d4dcSJohn Baldwin 	    start < 65536) {
1915c825d4dcSJohn Baldwin 		for (base = 0xf000; (long)base >= 0; base -= 0x1000) {
1916c825d4dcSJohn Baldwin 			limit = base + 0xfff;
1917c825d4dcSJohn Baldwin 
1918c825d4dcSJohn Baldwin 			/*
1919c825d4dcSJohn Baldwin 			 * Skip ranges that wouldn't work for the
1920c825d4dcSJohn Baldwin 			 * original request.  Note that the actual
1921c825d4dcSJohn Baldwin 			 * window that overlaps are the non-alias
1922c825d4dcSJohn Baldwin 			 * ranges within [base, limit], so this isn't
1923c825d4dcSJohn Baldwin 			 * quite a simple comparison.
1924c825d4dcSJohn Baldwin 			 */
1925c825d4dcSJohn Baldwin 			if (start + count > limit - 0x400)
1926c825d4dcSJohn Baldwin 				continue;
1927c825d4dcSJohn Baldwin 			if (base == 0) {
1928c825d4dcSJohn Baldwin 				/*
1929c825d4dcSJohn Baldwin 				 * The first open region for the window at
1930c825d4dcSJohn Baldwin 				 * 0 is 0x400-0x4ff.
1931c825d4dcSJohn Baldwin 				 */
1932c825d4dcSJohn Baldwin 				if (end - count + 1 < 0x400)
1933c825d4dcSJohn Baldwin 					continue;
1934c825d4dcSJohn Baldwin 			} else {
1935c825d4dcSJohn Baldwin 				if (end - count + 1 < base)
1936c825d4dcSJohn Baldwin 					continue;
1937c825d4dcSJohn Baldwin 			}
1938c825d4dcSJohn Baldwin 
1939c825d4dcSJohn Baldwin 			if (pcib_alloc_nonisa_ranges(sc, base, limit) == 0) {
1940c825d4dcSJohn Baldwin 				w->base = base;
1941c825d4dcSJohn Baldwin 				w->limit = limit;
1942c825d4dcSJohn Baldwin 				return (0);
1943c825d4dcSJohn Baldwin 			}
1944c825d4dcSJohn Baldwin 		}
1945c825d4dcSJohn Baldwin 		return (ENOSPC);
1946c825d4dcSJohn Baldwin 	}
1947c825d4dcSJohn Baldwin 
194889977ce2SJustin Hibbits 	wmask = ((rman_res_t)1 << w->step) - 1;
1949c825d4dcSJohn Baldwin 	if (RF_ALIGNMENT(flags) < w->step) {
1950c825d4dcSJohn Baldwin 		flags &= ~RF_ALIGNMENT_MASK;
1951c825d4dcSJohn Baldwin 		flags |= RF_ALIGNMENT_LOG2(w->step);
1952c825d4dcSJohn Baldwin 	}
1953c825d4dcSJohn Baldwin 	start &= ~wmask;
1954c825d4dcSJohn Baldwin 	end |= wmask;
195589977ce2SJustin Hibbits 	count = roundup2(count, (rman_res_t)1 << w->step);
1956c825d4dcSJohn Baldwin 	rid = w->reg;
1957c825d4dcSJohn Baldwin 	res = bus_alloc_resource(sc->dev, type, &rid, start, end, count,
1958c825d4dcSJohn Baldwin 	    flags & ~RF_ACTIVE);
1959c825d4dcSJohn Baldwin 	if (res == NULL)
1960c825d4dcSJohn Baldwin 		return (ENOSPC);
1961c825d4dcSJohn Baldwin 	pcib_add_window_resources(w, &res, 1);
1962c825d4dcSJohn Baldwin 	pcib_activate_window(sc, type);
1963c825d4dcSJohn Baldwin 	w->base = rman_get_start(res);
1964c825d4dcSJohn Baldwin 	w->limit = rman_get_end(res);
1965c825d4dcSJohn Baldwin 	return (0);
1966c825d4dcSJohn Baldwin }
1967c825d4dcSJohn Baldwin 
1968c825d4dcSJohn Baldwin /* Try to expand an existing window to the requested base and limit. */
1969c825d4dcSJohn Baldwin static int
1970c825d4dcSJohn Baldwin pcib_expand_window(struct pcib_softc *sc, struct pcib_window *w, int type,
19712dd1bdf1SJustin Hibbits     rman_res_t base, rman_res_t limit)
1972c825d4dcSJohn Baldwin {
1973c825d4dcSJohn Baldwin 	struct resource *res;
1974c825d4dcSJohn Baldwin 	int error, i, force_64k_base;
1975c825d4dcSJohn Baldwin 
1976c825d4dcSJohn Baldwin 	KASSERT(base <= w->base && limit >= w->limit,
1977c825d4dcSJohn Baldwin 	    ("attempting to shrink window"));
1978c825d4dcSJohn Baldwin 
1979c825d4dcSJohn Baldwin 	/*
1980c825d4dcSJohn Baldwin 	 * XXX: pcib_grow_window() doesn't try to do this anyway and
1981c825d4dcSJohn Baldwin 	 * the error handling for all the edge cases would be tedious.
1982c825d4dcSJohn Baldwin 	 */
1983c825d4dcSJohn Baldwin 	KASSERT(limit == w->limit || base == w->base,
1984c825d4dcSJohn Baldwin 	    ("attempting to grow both ends of a window"));
1985c825d4dcSJohn Baldwin 
1986c825d4dcSJohn Baldwin 	/*
1987c825d4dcSJohn Baldwin 	 * Yet more special handling for requests to expand an I/O
1988c825d4dcSJohn Baldwin 	 * window behind an ISA-enabled bridge.  Since I/O windows
1989c825d4dcSJohn Baldwin 	 * have to grow in 0x1000 increments and the end of the 0xffff
1990c825d4dcSJohn Baldwin 	 * range is an alias, growing a window below 64k will always
1991c825d4dcSJohn Baldwin 	 * result in allocating new resources and never adjusting an
1992c825d4dcSJohn Baldwin 	 * existing resource.
1993c825d4dcSJohn Baldwin 	 */
1994c825d4dcSJohn Baldwin 	if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1995c825d4dcSJohn Baldwin 	    (limit <= 65535 || (base <= 65535 && base != w->base))) {
1996c825d4dcSJohn Baldwin 		KASSERT(limit == w->limit || limit <= 65535,
1997c825d4dcSJohn Baldwin 		    ("attempting to grow both ends across 64k ISA alias"));
1998c825d4dcSJohn Baldwin 
1999c825d4dcSJohn Baldwin 		if (base != w->base)
2000c825d4dcSJohn Baldwin 			error = pcib_alloc_nonisa_ranges(sc, base, w->base - 1);
2001c825d4dcSJohn Baldwin 		else
2002c825d4dcSJohn Baldwin 			error = pcib_alloc_nonisa_ranges(sc, w->limit + 1,
2003c825d4dcSJohn Baldwin 			    limit);
2004c825d4dcSJohn Baldwin 		if (error == 0) {
2005c825d4dcSJohn Baldwin 			w->base = base;
2006c825d4dcSJohn Baldwin 			w->limit = limit;
2007c825d4dcSJohn Baldwin 		}
2008c825d4dcSJohn Baldwin 		return (error);
2009c825d4dcSJohn Baldwin 	}
2010c825d4dcSJohn Baldwin 
2011c825d4dcSJohn Baldwin 	/*
2012c825d4dcSJohn Baldwin 	 * Find the existing resource to adjust.  Usually there is only one,
2013c825d4dcSJohn Baldwin 	 * but for an ISA-enabled bridge we might be growing the I/O window
2014c825d4dcSJohn Baldwin 	 * above 64k and need to find the existing resource that maps all
2015c825d4dcSJohn Baldwin 	 * of the area above 64k.
2016c825d4dcSJohn Baldwin 	 */
2017c825d4dcSJohn Baldwin 	for (i = 0; i < w->count; i++) {
2018c825d4dcSJohn Baldwin 		if (rman_get_end(w->res[i]) == w->limit)
2019c825d4dcSJohn Baldwin 			break;
2020c825d4dcSJohn Baldwin 	}
2021c825d4dcSJohn Baldwin 	KASSERT(i != w->count, ("did not find existing resource"));
2022c825d4dcSJohn Baldwin 	res = w->res[i];
2023c825d4dcSJohn Baldwin 
2024c825d4dcSJohn Baldwin 	/*
2025c825d4dcSJohn Baldwin 	 * Usually the resource we found should match the window's
2026c825d4dcSJohn Baldwin 	 * existing range.  The one exception is the ISA-enabled case
2027c825d4dcSJohn Baldwin 	 * mentioned above in which case the resource should start at
2028c825d4dcSJohn Baldwin 	 * 64k.
2029c825d4dcSJohn Baldwin 	 */
2030c825d4dcSJohn Baldwin 	if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
2031c825d4dcSJohn Baldwin 	    w->base <= 65535) {
2032c825d4dcSJohn Baldwin 		KASSERT(rman_get_start(res) == 65536,
2033c825d4dcSJohn Baldwin 		    ("existing resource mismatch"));
2034c825d4dcSJohn Baldwin 		force_64k_base = 1;
2035c825d4dcSJohn Baldwin 	} else {
2036c825d4dcSJohn Baldwin 		KASSERT(w->base == rman_get_start(res),
2037c825d4dcSJohn Baldwin 		    ("existing resource mismatch"));
2038c825d4dcSJohn Baldwin 		force_64k_base = 0;
2039c825d4dcSJohn Baldwin 	}
2040c825d4dcSJohn Baldwin 
2041c825d4dcSJohn Baldwin 	error = bus_adjust_resource(sc->dev, type, res, force_64k_base ?
2042c825d4dcSJohn Baldwin 	    rman_get_start(res) : base, limit);
2043c825d4dcSJohn Baldwin 	if (error)
2044c825d4dcSJohn Baldwin 		return (error);
2045c825d4dcSJohn Baldwin 
2046c825d4dcSJohn Baldwin 	/* Add the newly allocated region to the resource manager. */
2047c825d4dcSJohn Baldwin 	if (w->base != base) {
2048c825d4dcSJohn Baldwin 		error = rman_manage_region(&w->rman, base, w->base - 1);
2049c825d4dcSJohn Baldwin 		w->base = base;
2050c825d4dcSJohn Baldwin 	} else {
2051c825d4dcSJohn Baldwin 		error = rman_manage_region(&w->rman, w->limit + 1, limit);
2052c825d4dcSJohn Baldwin 		w->limit = limit;
2053c825d4dcSJohn Baldwin 	}
2054c825d4dcSJohn Baldwin 	if (error) {
2055c825d4dcSJohn Baldwin 		if (bootverbose)
2056c825d4dcSJohn Baldwin 			device_printf(sc->dev,
2057c825d4dcSJohn Baldwin 			    "failed to expand %s resource manager\n", w->name);
2058c825d4dcSJohn Baldwin 		(void)bus_adjust_resource(sc->dev, type, res, force_64k_base ?
2059c825d4dcSJohn Baldwin 		    rman_get_start(res) : w->base, w->limit);
2060c825d4dcSJohn Baldwin 	}
2061c825d4dcSJohn Baldwin 	return (error);
2062c825d4dcSJohn Baldwin }
2063c825d4dcSJohn Baldwin 
206483c41143SJohn Baldwin /*
206583c41143SJohn Baldwin  * Attempt to grow a window to make room for a given resource request.
206683c41143SJohn Baldwin  */
206783c41143SJohn Baldwin static int
206883c41143SJohn Baldwin pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type,
20692dd1bdf1SJustin Hibbits     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
207083c41143SJohn Baldwin {
20712dd1bdf1SJustin Hibbits 	rman_res_t align, start_free, end_free, front, back, wmask;
2072c825d4dcSJohn Baldwin 	int error;
207383c41143SJohn Baldwin 
207483c41143SJohn Baldwin 	/*
207583c41143SJohn Baldwin 	 * Clamp the desired resource range to the maximum address
207683c41143SJohn Baldwin 	 * this window supports.  Reject impossible requests.
2077c825d4dcSJohn Baldwin 	 *
2078c825d4dcSJohn Baldwin 	 * For I/O port requests behind a bridge with the ISA enable
2079c825d4dcSJohn Baldwin 	 * bit set, force large allocations to start above 64k.
208083c41143SJohn Baldwin 	 */
208183c41143SJohn Baldwin 	if (!w->valid)
208283c41143SJohn Baldwin 		return (EINVAL);
2083c825d4dcSJohn Baldwin 	if (sc->bridgectl & PCIB_BCR_ISA_ENABLE && count > 0x100 &&
2084c825d4dcSJohn Baldwin 	    start < 65536)
2085c825d4dcSJohn Baldwin 		start = 65536;
208683c41143SJohn Baldwin 	if (end > w->rman.rm_end)
208783c41143SJohn Baldwin 		end = w->rman.rm_end;
208883c41143SJohn Baldwin 	if (start + count - 1 > end || start + count < start)
208983c41143SJohn Baldwin 		return (EINVAL);
209089977ce2SJustin Hibbits 	wmask = ((rman_res_t)1 << w->step) - 1;
209183c41143SJohn Baldwin 
209283c41143SJohn Baldwin 	/*
209383c41143SJohn Baldwin 	 * If there is no resource at all, just try to allocate enough
209483c41143SJohn Baldwin 	 * aligned space for this resource.
209583c41143SJohn Baldwin 	 */
209683c41143SJohn Baldwin 	if (w->res == NULL) {
2097c825d4dcSJohn Baldwin 		error = pcib_alloc_new_window(sc, w, type, start, end, count,
2098c825d4dcSJohn Baldwin 		    flags);
2099c825d4dcSJohn Baldwin 		if (error) {
210083c41143SJohn Baldwin 			if (bootverbose)
210183c41143SJohn Baldwin 				device_printf(sc->dev,
2102da1b038aSJustin Hibbits 		    "failed to allocate initial %s window (%#jx-%#jx,%#jx)\n",
210383c41143SJohn Baldwin 				    w->name, start, end, count);
210483c41143SJohn Baldwin 			return (error);
210583c41143SJohn Baldwin 		}
2106c825d4dcSJohn Baldwin 		if (bootverbose)
2107c825d4dcSJohn Baldwin 			device_printf(sc->dev,
2108c825d4dcSJohn Baldwin 			    "allocated initial %s window of %#jx-%#jx\n",
2109c825d4dcSJohn Baldwin 			    w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
211083c41143SJohn Baldwin 		goto updatewin;
211183c41143SJohn Baldwin 	}
211283c41143SJohn Baldwin 
211383c41143SJohn Baldwin 	/*
211483c41143SJohn Baldwin 	 * See if growing the window would help.  Compute the minimum
211583c41143SJohn Baldwin 	 * amount of address space needed on both the front and back
211683c41143SJohn Baldwin 	 * ends of the existing window to satisfy the allocation.
211783c41143SJohn Baldwin 	 *
211883c41143SJohn Baldwin 	 * For each end, build a candidate region adjusting for the
211983c41143SJohn Baldwin 	 * required alignment, etc.  If there is a free region at the
212083c41143SJohn Baldwin 	 * edge of the window, grow from the inner edge of the free
212183c41143SJohn Baldwin 	 * region.  Otherwise grow from the window boundary.
212283c41143SJohn Baldwin 	 *
2123c825d4dcSJohn Baldwin 	 * Growing an I/O window below 64k for a bridge with the ISA
2124c825d4dcSJohn Baldwin 	 * enable bit doesn't require any special magic as the step
2125c825d4dcSJohn Baldwin 	 * size of an I/O window (1k) always includes multiple
2126c825d4dcSJohn Baldwin 	 * non-alias ranges when it is grown in either direction.
2127c825d4dcSJohn Baldwin 	 *
212883c41143SJohn Baldwin 	 * XXX: Special case: if w->res is completely empty and the
212983c41143SJohn Baldwin 	 * request size is larger than w->res, we should find the
213083c41143SJohn Baldwin 	 * optimal aligned buffer containing w->res and allocate that.
213183c41143SJohn Baldwin 	 */
213283c41143SJohn Baldwin 	if (bootverbose)
213383c41143SJohn Baldwin 		device_printf(sc->dev,
2134da1b038aSJustin Hibbits 		    "attempting to grow %s window for (%#jx-%#jx,%#jx)\n",
213583c41143SJohn Baldwin 		    w->name, start, end, count);
213689977ce2SJustin Hibbits 	align = (rman_res_t)1 << RF_ALIGNMENT(flags);
2137c825d4dcSJohn Baldwin 	if (start < w->base) {
213883c41143SJohn Baldwin 		if (rman_first_free_region(&w->rman, &start_free, &end_free) !=
2139c825d4dcSJohn Baldwin 		    0 || start_free != w->base)
2140c825d4dcSJohn Baldwin 			end_free = w->base;
214183c41143SJohn Baldwin 		if (end_free > end)
2142ddac8cc9SJohn Baldwin 			end_free = end + 1;
214383c41143SJohn Baldwin 
214483c41143SJohn Baldwin 		/* Move end_free down until it is properly aligned. */
214583c41143SJohn Baldwin 		end_free &= ~(align - 1);
2146a49dcb46SJohn Baldwin 		end_free--;
2147a49dcb46SJohn Baldwin 		front = end_free - (count - 1);
214883c41143SJohn Baldwin 
214983c41143SJohn Baldwin 		/*
215083c41143SJohn Baldwin 		 * The resource would now be allocated at (front,
215183c41143SJohn Baldwin 		 * end_free).  Ensure that fits in the (start, end)
215283c41143SJohn Baldwin 		 * bounds.  end_free is checked above.  If 'front' is
215383c41143SJohn Baldwin 		 * ok, ensure it is properly aligned for this window.
215483c41143SJohn Baldwin 		 * Also check for underflow.
215583c41143SJohn Baldwin 		 */
215683c41143SJohn Baldwin 		if (front >= start && front <= end_free) {
215783c41143SJohn Baldwin 			if (bootverbose)
2158da1b038aSJustin Hibbits 				printf("\tfront candidate range: %#jx-%#jx\n",
215983c41143SJohn Baldwin 				    front, end_free);
2160a7b5acacSJohn Baldwin 			front &= ~wmask;
2161c825d4dcSJohn Baldwin 			front = w->base - front;
216283c41143SJohn Baldwin 		} else
216383c41143SJohn Baldwin 			front = 0;
216483c41143SJohn Baldwin 	} else
216583c41143SJohn Baldwin 		front = 0;
2166c825d4dcSJohn Baldwin 	if (end > w->limit) {
216783c41143SJohn Baldwin 		if (rman_last_free_region(&w->rman, &start_free, &end_free) !=
2168c825d4dcSJohn Baldwin 		    0 || end_free != w->limit)
2169c825d4dcSJohn Baldwin 			start_free = w->limit + 1;
217083c41143SJohn Baldwin 		if (start_free < start)
217183c41143SJohn Baldwin 			start_free = start;
217283c41143SJohn Baldwin 
217383c41143SJohn Baldwin 		/* Move start_free up until it is properly aligned. */
217483c41143SJohn Baldwin 		start_free = roundup2(start_free, align);
2175a49dcb46SJohn Baldwin 		back = start_free + count - 1;
217683c41143SJohn Baldwin 
217783c41143SJohn Baldwin 		/*
217883c41143SJohn Baldwin 		 * The resource would now be allocated at (start_free,
217983c41143SJohn Baldwin 		 * back).  Ensure that fits in the (start, end)
218083c41143SJohn Baldwin 		 * bounds.  start_free is checked above.  If 'back' is
218183c41143SJohn Baldwin 		 * ok, ensure it is properly aligned for this window.
218283c41143SJohn Baldwin 		 * Also check for overflow.
218383c41143SJohn Baldwin 		 */
218483c41143SJohn Baldwin 		if (back <= end && start_free <= back) {
218583c41143SJohn Baldwin 			if (bootverbose)
2186da1b038aSJustin Hibbits 				printf("\tback candidate range: %#jx-%#jx\n",
218783c41143SJohn Baldwin 				    start_free, back);
2188a7b5acacSJohn Baldwin 			back |= wmask;
2189c825d4dcSJohn Baldwin 			back -= w->limit;
219083c41143SJohn Baldwin 		} else
219183c41143SJohn Baldwin 			back = 0;
219283c41143SJohn Baldwin 	} else
219383c41143SJohn Baldwin 		back = 0;
219483c41143SJohn Baldwin 
219583c41143SJohn Baldwin 	/*
219683c41143SJohn Baldwin 	 * Try to allocate the smallest needed region first.
219783c41143SJohn Baldwin 	 * If that fails, fall back to the other region.
219883c41143SJohn Baldwin 	 */
219983c41143SJohn Baldwin 	error = ENOSPC;
220083c41143SJohn Baldwin 	while (front != 0 || back != 0) {
220183c41143SJohn Baldwin 		if (front != 0 && (front <= back || back == 0)) {
2202c825d4dcSJohn Baldwin 			error = pcib_expand_window(sc, w, type, w->base - front,
2203c825d4dcSJohn Baldwin 			    w->limit);
220483c41143SJohn Baldwin 			if (error == 0)
220583c41143SJohn Baldwin 				break;
220683c41143SJohn Baldwin 			front = 0;
220783c41143SJohn Baldwin 		} else {
2208c825d4dcSJohn Baldwin 			error = pcib_expand_window(sc, w, type, w->base,
2209c825d4dcSJohn Baldwin 			    w->limit + back);
221083c41143SJohn Baldwin 			if (error == 0)
221183c41143SJohn Baldwin 				break;
221283c41143SJohn Baldwin 			back = 0;
221383c41143SJohn Baldwin 		}
221483c41143SJohn Baldwin 	}
221583c41143SJohn Baldwin 
221683c41143SJohn Baldwin 	if (error)
221783c41143SJohn Baldwin 		return (error);
221883c41143SJohn Baldwin 	if (bootverbose)
2219c825d4dcSJohn Baldwin 		device_printf(sc->dev, "grew %s window to %#jx-%#jx\n",
2220c825d4dcSJohn Baldwin 		    w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
222183c41143SJohn Baldwin 
222283c41143SJohn Baldwin updatewin:
2223c825d4dcSJohn Baldwin 	/* Write the new window. */
2224a7b5acacSJohn Baldwin 	KASSERT((w->base & wmask) == 0, ("start address is not aligned"));
2225a7b5acacSJohn Baldwin 	KASSERT((w->limit & wmask) == wmask, ("end address is not aligned"));
222683c41143SJohn Baldwin 	pcib_write_windows(sc, w->mask);
222783c41143SJohn Baldwin 	return (0);
222883c41143SJohn Baldwin }
222983c41143SJohn Baldwin 
223083c41143SJohn Baldwin /*
223183c41143SJohn Baldwin  * We have to trap resource allocation requests and ensure that the bridge
223283c41143SJohn Baldwin  * is set up to, or capable of handling them.
223383c41143SJohn Baldwin  */
223483c41143SJohn Baldwin struct resource *
223583c41143SJohn Baldwin pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
22362dd1bdf1SJustin Hibbits     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
223783c41143SJohn Baldwin {
223883c41143SJohn Baldwin 	struct pcib_softc *sc;
223983c41143SJohn Baldwin 	struct resource *r;
224083c41143SJohn Baldwin 
224183c41143SJohn Baldwin 	sc = device_get_softc(dev);
224283c41143SJohn Baldwin 
224383c41143SJohn Baldwin 	/*
224483c41143SJohn Baldwin 	 * VGA resources are decoded iff the VGA enable bit is set in
224583c41143SJohn Baldwin 	 * the bridge control register.  VGA resources do not fall into
224683c41143SJohn Baldwin 	 * the resource windows and are passed up to the parent.
224783c41143SJohn Baldwin 	 */
224883c41143SJohn Baldwin 	if ((type == SYS_RES_IOPORT && pci_is_vga_ioport_range(start, end)) ||
224983c41143SJohn Baldwin 	    (type == SYS_RES_MEMORY && pci_is_vga_memory_range(start, end))) {
225083c41143SJohn Baldwin 		if (sc->bridgectl & PCIB_BCR_VGA_ENABLE)
225183c41143SJohn Baldwin 			return (bus_generic_alloc_resource(dev, child, type,
225283c41143SJohn Baldwin 			    rid, start, end, count, flags));
225383c41143SJohn Baldwin 		else
225483c41143SJohn Baldwin 			return (NULL);
225583c41143SJohn Baldwin 	}
225683c41143SJohn Baldwin 
225783c41143SJohn Baldwin 	switch (type) {
22584edef187SJohn Baldwin #ifdef PCI_RES_BUS
22594edef187SJohn Baldwin 	case PCI_RES_BUS:
22604edef187SJohn Baldwin 		return (pcib_alloc_subbus(&sc->bus, child, rid, start, end,
22614edef187SJohn Baldwin 		    count, flags));
22624edef187SJohn Baldwin #endif
226383c41143SJohn Baldwin 	case SYS_RES_IOPORT:
2264c825d4dcSJohn Baldwin 		if (pcib_is_isa_range(sc, start, end, count))
2265c825d4dcSJohn Baldwin 			return (NULL);
226683c41143SJohn Baldwin 		r = pcib_suballoc_resource(sc, &sc->io, child, type, rid, start,
226783c41143SJohn Baldwin 		    end, count, flags);
2268a6c82265SMarius Strobl 		if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
226983c41143SJohn Baldwin 			break;
227083c41143SJohn Baldwin 		if (pcib_grow_window(sc, &sc->io, type, start, end, count,
227183c41143SJohn Baldwin 		    flags) == 0)
227283c41143SJohn Baldwin 			r = pcib_suballoc_resource(sc, &sc->io, child, type,
227383c41143SJohn Baldwin 			    rid, start, end, count, flags);
227483c41143SJohn Baldwin 		break;
227583c41143SJohn Baldwin 	case SYS_RES_MEMORY:
227683c41143SJohn Baldwin 		/*
227783c41143SJohn Baldwin 		 * For prefetchable resources, prefer the prefetchable
227883c41143SJohn Baldwin 		 * memory window, but fall back to the regular memory
227983c41143SJohn Baldwin 		 * window if that fails.  Try both windows before
228083c41143SJohn Baldwin 		 * attempting to grow a window in case the firmware
228183c41143SJohn Baldwin 		 * has used a range in the regular memory window to
228283c41143SJohn Baldwin 		 * map a prefetchable BAR.
228383c41143SJohn Baldwin 		 */
228483c41143SJohn Baldwin 		if (flags & RF_PREFETCHABLE) {
228583c41143SJohn Baldwin 			r = pcib_suballoc_resource(sc, &sc->pmem, child, type,
228683c41143SJohn Baldwin 			    rid, start, end, count, flags);
228783c41143SJohn Baldwin 			if (r != NULL)
228883c41143SJohn Baldwin 				break;
228983c41143SJohn Baldwin 		}
229083c41143SJohn Baldwin 		r = pcib_suballoc_resource(sc, &sc->mem, child, type, rid,
229183c41143SJohn Baldwin 		    start, end, count, flags);
2292a6c82265SMarius Strobl 		if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
229383c41143SJohn Baldwin 			break;
229483c41143SJohn Baldwin 		if (flags & RF_PREFETCHABLE) {
229583c41143SJohn Baldwin 			if (pcib_grow_window(sc, &sc->pmem, type, start, end,
229683c41143SJohn Baldwin 			    count, flags) == 0) {
229783c41143SJohn Baldwin 				r = pcib_suballoc_resource(sc, &sc->pmem, child,
229883c41143SJohn Baldwin 				    type, rid, start, end, count, flags);
229983c41143SJohn Baldwin 				if (r != NULL)
230083c41143SJohn Baldwin 					break;
230183c41143SJohn Baldwin 			}
230283c41143SJohn Baldwin 		}
230383c41143SJohn Baldwin 		if (pcib_grow_window(sc, &sc->mem, type, start, end, count,
230483c41143SJohn Baldwin 		    flags & ~RF_PREFETCHABLE) == 0)
230583c41143SJohn Baldwin 			r = pcib_suballoc_resource(sc, &sc->mem, child, type,
230683c41143SJohn Baldwin 			    rid, start, end, count, flags);
230783c41143SJohn Baldwin 		break;
230883c41143SJohn Baldwin 	default:
230983c41143SJohn Baldwin 		return (bus_generic_alloc_resource(dev, child, type, rid,
231083c41143SJohn Baldwin 		    start, end, count, flags));
231183c41143SJohn Baldwin 	}
231283c41143SJohn Baldwin 
231383c41143SJohn Baldwin 	/*
231483c41143SJohn Baldwin 	 * If attempts to suballocate from the window fail but this is a
231583c41143SJohn Baldwin 	 * subtractive bridge, pass the request up the tree.
231683c41143SJohn Baldwin 	 */
231783c41143SJohn Baldwin 	if (sc->flags & PCIB_SUBTRACTIVE && r == NULL)
231883c41143SJohn Baldwin 		return (bus_generic_alloc_resource(dev, child, type, rid,
231983c41143SJohn Baldwin 		    start, end, count, flags));
232083c41143SJohn Baldwin 	return (r);
232183c41143SJohn Baldwin }
232283c41143SJohn Baldwin 
232383c41143SJohn Baldwin int
232483c41143SJohn Baldwin pcib_adjust_resource(device_t bus, device_t child, int type, struct resource *r,
23252dd1bdf1SJustin Hibbits     rman_res_t start, rman_res_t end)
232683c41143SJohn Baldwin {
232783c41143SJohn Baldwin 	struct pcib_softc *sc;
232883c41143SJohn Baldwin 
232983c41143SJohn Baldwin 	sc = device_get_softc(bus);
233083c41143SJohn Baldwin 	if (pcib_is_resource_managed(sc, type, r))
233183c41143SJohn Baldwin 		return (rman_adjust_resource(r, start, end));
233283c41143SJohn Baldwin 	return (bus_generic_adjust_resource(bus, child, type, r, start, end));
233383c41143SJohn Baldwin }
233483c41143SJohn Baldwin 
233583c41143SJohn Baldwin int
233683c41143SJohn Baldwin pcib_release_resource(device_t dev, device_t child, int type, int rid,
233783c41143SJohn Baldwin     struct resource *r)
233883c41143SJohn Baldwin {
233983c41143SJohn Baldwin 	struct pcib_softc *sc;
234083c41143SJohn Baldwin 	int error;
234183c41143SJohn Baldwin 
234283c41143SJohn Baldwin 	sc = device_get_softc(dev);
234383c41143SJohn Baldwin 	if (pcib_is_resource_managed(sc, type, r)) {
234483c41143SJohn Baldwin 		if (rman_get_flags(r) & RF_ACTIVE) {
234583c41143SJohn Baldwin 			error = bus_deactivate_resource(child, type, rid, r);
234683c41143SJohn Baldwin 			if (error)
234783c41143SJohn Baldwin 				return (error);
234883c41143SJohn Baldwin 		}
234983c41143SJohn Baldwin 		return (rman_release_resource(r));
235083c41143SJohn Baldwin 	}
235183c41143SJohn Baldwin 	return (bus_generic_release_resource(dev, child, type, rid, r));
235283c41143SJohn Baldwin }
235383c41143SJohn Baldwin #else
2354bb0d0a8eSMike Smith /*
2355bb0d0a8eSMike Smith  * We have to trap resource allocation requests and ensure that the bridge
2356bb0d0a8eSMike Smith  * is set up to, or capable of handling them.
2357bb0d0a8eSMike Smith  */
23586f0d5884SJohn Baldwin struct resource *
2359bb0d0a8eSMike Smith pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
23602dd1bdf1SJustin Hibbits     rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
2361bb0d0a8eSMike Smith {
2362bb0d0a8eSMike Smith 	struct pcib_softc	*sc = device_get_softc(dev);
236326043836SJohn Baldwin 	const char *name, *suffix;
2364a8b354a8SWarner Losh 	int ok;
2365bb0d0a8eSMike Smith 
2366bb0d0a8eSMike Smith 	/*
2367bb0d0a8eSMike Smith 	 * Fail the allocation for this range if it's not supported.
2368bb0d0a8eSMike Smith 	 */
236926043836SJohn Baldwin 	name = device_get_nameunit(child);
237026043836SJohn Baldwin 	if (name == NULL) {
237126043836SJohn Baldwin 		name = "";
237226043836SJohn Baldwin 		suffix = "";
237326043836SJohn Baldwin 	} else
237426043836SJohn Baldwin 		suffix = " ";
2375bb0d0a8eSMike Smith 	switch (type) {
2376bb0d0a8eSMike Smith 	case SYS_RES_IOPORT:
2377a8b354a8SWarner Losh 		ok = 0;
2378e4b59fc5SWarner Losh 		if (!pcib_is_io_open(sc))
2379e4b59fc5SWarner Losh 			break;
2380a8b354a8SWarner Losh 		ok = (start >= sc->iobase && end <= sc->iolimit);
2381d98d9b12SMarcel Moolenaar 
2382d98d9b12SMarcel Moolenaar 		/*
2383d98d9b12SMarcel Moolenaar 		 * Make sure we allow access to VGA I/O addresses when the
2384d98d9b12SMarcel Moolenaar 		 * bridge has the "VGA Enable" bit set.
2385d98d9b12SMarcel Moolenaar 		 */
2386d98d9b12SMarcel Moolenaar 		if (!ok && pci_is_vga_ioport_range(start, end))
2387d98d9b12SMarcel Moolenaar 			ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
2388d98d9b12SMarcel Moolenaar 
2389e4b59fc5SWarner Losh 		if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
2390a8b354a8SWarner Losh 			if (!ok) {
239112b8c86eSWarner Losh 				if (start < sc->iobase)
239212b8c86eSWarner Losh 					start = sc->iobase;
239312b8c86eSWarner Losh 				if (end > sc->iolimit)
239412b8c86eSWarner Losh 					end = sc->iolimit;
23952daa7a07SWarner Losh 				if (start < end)
23962daa7a07SWarner Losh 					ok = 1;
2397a8b354a8SWarner Losh 			}
23981c54ff33SMatthew N. Dodd 		} else {
2399e4b59fc5SWarner Losh 			ok = 1;
24009dffe835SWarner Losh #if 0
2401795dceffSWarner Losh 			/*
2402795dceffSWarner Losh 			 * If we overlap with the subtractive range, then
2403795dceffSWarner Losh 			 * pick the upper range to use.
2404795dceffSWarner Losh 			 */
2405795dceffSWarner Losh 			if (start < sc->iolimit && end > sc->iobase)
2406795dceffSWarner Losh 				start = sc->iolimit + 1;
24079dffe835SWarner Losh #endif
240812b8c86eSWarner Losh 		}
2409a8b354a8SWarner Losh 		if (end < start) {
2410da1b038aSJustin Hibbits 			device_printf(dev, "ioport: end (%jx) < start (%jx)\n",
24112daa7a07SWarner Losh 			    end, start);
2412a8b354a8SWarner Losh 			start = 0;
2413a8b354a8SWarner Losh 			end = 0;
2414a8b354a8SWarner Losh 			ok = 0;
2415a8b354a8SWarner Losh 		}
2416a8b354a8SWarner Losh 		if (!ok) {
241726043836SJohn Baldwin 			device_printf(dev, "%s%srequested unsupported I/O "
2418da1b038aSJustin Hibbits 			    "range 0x%jx-0x%jx (decoding 0x%x-0x%x)\n",
241926043836SJohn Baldwin 			    name, suffix, start, end, sc->iobase, sc->iolimit);
2420bb0d0a8eSMike Smith 			return (NULL);
2421bb0d0a8eSMike Smith 		}
24224fa59183SMike Smith 		if (bootverbose)
24232daa7a07SWarner Losh 			device_printf(dev,
2424da1b038aSJustin Hibbits 			    "%s%srequested I/O range 0x%jx-0x%jx: in range\n",
242526043836SJohn Baldwin 			    name, suffix, start, end);
2426bb0d0a8eSMike Smith 		break;
2427bb0d0a8eSMike Smith 
2428bb0d0a8eSMike Smith 	case SYS_RES_MEMORY:
2429a8b354a8SWarner Losh 		ok = 0;
2430a8b354a8SWarner Losh 		if (pcib_is_nonprefetch_open(sc))
2431a8b354a8SWarner Losh 			ok = ok || (start >= sc->membase && end <= sc->memlimit);
2432a8b354a8SWarner Losh 		if (pcib_is_prefetch_open(sc))
2433a8b354a8SWarner Losh 			ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
2434d98d9b12SMarcel Moolenaar 
2435d98d9b12SMarcel Moolenaar 		/*
2436d98d9b12SMarcel Moolenaar 		 * Make sure we allow access to VGA memory addresses when the
2437d98d9b12SMarcel Moolenaar 		 * bridge has the "VGA Enable" bit set.
2438d98d9b12SMarcel Moolenaar 		 */
2439d98d9b12SMarcel Moolenaar 		if (!ok && pci_is_vga_memory_range(start, end))
2440d98d9b12SMarcel Moolenaar 			ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
2441d98d9b12SMarcel Moolenaar 
2442e4b59fc5SWarner Losh 		if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
2443a8b354a8SWarner Losh 			if (!ok) {
2444a8b354a8SWarner Losh 				ok = 1;
2445a8b354a8SWarner Losh 				if (flags & RF_PREFETCHABLE) {
2446a8b354a8SWarner Losh 					if (pcib_is_prefetch_open(sc)) {
2447a8b354a8SWarner Losh 						if (start < sc->pmembase)
2448a8b354a8SWarner Losh 							start = sc->pmembase;
2449a8b354a8SWarner Losh 						if (end > sc->pmemlimit)
2450a8b354a8SWarner Losh 							end = sc->pmemlimit;
2451a8b354a8SWarner Losh 					} else {
2452a8b354a8SWarner Losh 						ok = 0;
2453a8b354a8SWarner Losh 					}
2454a8b354a8SWarner Losh 				} else {	/* non-prefetchable */
2455a8b354a8SWarner Losh 					if (pcib_is_nonprefetch_open(sc)) {
2456a8b354a8SWarner Losh 						if (start < sc->membase)
245712b8c86eSWarner Losh 							start = sc->membase;
245812b8c86eSWarner Losh 						if (end > sc->memlimit)
245912b8c86eSWarner Losh 							end = sc->memlimit;
24601c54ff33SMatthew N. Dodd 					} else {
2461a8b354a8SWarner Losh 						ok = 0;
2462a8b354a8SWarner Losh 					}
2463a8b354a8SWarner Losh 				}
2464a8b354a8SWarner Losh 			}
2465a8b354a8SWarner Losh 		} else if (!ok) {
2466e4b59fc5SWarner Losh 			ok = 1;	/* subtractive bridge: always ok */
24679dffe835SWarner Losh #if 0
2468a8b354a8SWarner Losh 			if (pcib_is_nonprefetch_open(sc)) {
2469795dceffSWarner Losh 				if (start < sc->memlimit && end > sc->membase)
2470795dceffSWarner Losh 					start = sc->memlimit + 1;
2471a8b354a8SWarner Losh 			}
2472a8b354a8SWarner Losh 			if (pcib_is_prefetch_open(sc)) {
2473795dceffSWarner Losh 				if (start < sc->pmemlimit && end > sc->pmembase)
2474795dceffSWarner Losh 					start = sc->pmemlimit + 1;
24751c54ff33SMatthew N. Dodd 			}
24769dffe835SWarner Losh #endif
247712b8c86eSWarner Losh 		}
2478a8b354a8SWarner Losh 		if (end < start) {
2479da1b038aSJustin Hibbits 			device_printf(dev, "memory: end (%jx) < start (%jx)\n",
24802daa7a07SWarner Losh 			    end, start);
2481a8b354a8SWarner Losh 			start = 0;
2482a8b354a8SWarner Losh 			end = 0;
2483a8b354a8SWarner Losh 			ok = 0;
2484a8b354a8SWarner Losh 		}
2485a8b354a8SWarner Losh 		if (!ok && bootverbose)
248634428485SWarner Losh 			device_printf(dev,
2487da1b038aSJustin Hibbits 			    "%s%srequested unsupported memory range %#jx-%#jx "
2488b0a2d4b8SWarner Losh 			    "(decoding %#jx-%#jx, %#jx-%#jx)\n",
248926043836SJohn Baldwin 			    name, suffix, start, end,
2490b0a2d4b8SWarner Losh 			    (uintmax_t)sc->membase, (uintmax_t)sc->memlimit,
2491b0a2d4b8SWarner Losh 			    (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
2492a8b354a8SWarner Losh 		if (!ok)
2493bb0d0a8eSMike Smith 			return (NULL);
24944fa59183SMike Smith 		if (bootverbose)
249526043836SJohn Baldwin 			device_printf(dev,"%s%srequested memory range "
2496da1b038aSJustin Hibbits 			    "0x%jx-0x%jx: good\n",
249726043836SJohn Baldwin 			    name, suffix, start, end);
24984fa59183SMike Smith 		break;
24994fa59183SMike Smith 
2500bb0d0a8eSMike Smith 	default:
25014fa59183SMike Smith 		break;
2502bb0d0a8eSMike Smith 	}
2503bb0d0a8eSMike Smith 	/*
2504bb0d0a8eSMike Smith 	 * Bridge is OK decoding this resource, so pass it up.
2505bb0d0a8eSMike Smith 	 */
25062daa7a07SWarner Losh 	return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
25072daa7a07SWarner Losh 	    count, flags));
2508bb0d0a8eSMike Smith }
250983c41143SJohn Baldwin #endif
2510bb0d0a8eSMike Smith 
2511bb0d0a8eSMike Smith /*
251255d3ea17SRyan Stone  * If ARI is enabled on this downstream port, translate the function number
251355d3ea17SRyan Stone  * to the non-ARI slot/function.  The downstream port will convert it back in
251455d3ea17SRyan Stone  * hardware.  If ARI is not enabled slot and func are not modified.
251555d3ea17SRyan Stone  */
251655d3ea17SRyan Stone static __inline void
251755d3ea17SRyan Stone pcib_xlate_ari(device_t pcib, int bus, int *slot, int *func)
251855d3ea17SRyan Stone {
251955d3ea17SRyan Stone 	struct pcib_softc *sc;
252055d3ea17SRyan Stone 	int ari_func;
252155d3ea17SRyan Stone 
252255d3ea17SRyan Stone 	sc = device_get_softc(pcib);
252355d3ea17SRyan Stone 	ari_func = *func;
252455d3ea17SRyan Stone 
252555d3ea17SRyan Stone 	if (sc->flags & PCIB_ENABLE_ARI) {
252655d3ea17SRyan Stone 		KASSERT(*slot == 0,
252755d3ea17SRyan Stone 		    ("Non-zero slot number with ARI enabled!"));
252855d3ea17SRyan Stone 		*slot = PCIE_ARI_SLOT(ari_func);
252955d3ea17SRyan Stone 		*func = PCIE_ARI_FUNC(ari_func);
253055d3ea17SRyan Stone 	}
253155d3ea17SRyan Stone }
253255d3ea17SRyan Stone 
253355d3ea17SRyan Stone 
253455d3ea17SRyan Stone static void
253555d3ea17SRyan Stone pcib_enable_ari(struct pcib_softc *sc, uint32_t pcie_pos)
253655d3ea17SRyan Stone {
253755d3ea17SRyan Stone 	uint32_t ctl2;
253855d3ea17SRyan Stone 
253955d3ea17SRyan Stone 	ctl2 = pci_read_config(sc->dev, pcie_pos + PCIER_DEVICE_CTL2, 4);
254055d3ea17SRyan Stone 	ctl2 |= PCIEM_CTL2_ARI;
254155d3ea17SRyan Stone 	pci_write_config(sc->dev, pcie_pos + PCIER_DEVICE_CTL2, ctl2, 4);
254255d3ea17SRyan Stone 
254355d3ea17SRyan Stone 	sc->flags |= PCIB_ENABLE_ARI;
254455d3ea17SRyan Stone }
254555d3ea17SRyan Stone 
254655d3ea17SRyan Stone /*
2547bb0d0a8eSMike Smith  * PCIB interface.
2548bb0d0a8eSMike Smith  */
25496f0d5884SJohn Baldwin int
2550bb0d0a8eSMike Smith pcib_maxslots(device_t dev)
2551bb0d0a8eSMike Smith {
25525502348dSJustin Hibbits #if !defined(__amd64__) && !defined(__i386__)
25538b92ad43SJustin Hibbits 	uint32_t pcie_pos;
25548b92ad43SJustin Hibbits 	uint16_t val;
25558b92ad43SJustin Hibbits 
25568b92ad43SJustin Hibbits 	/*
25578b92ad43SJustin Hibbits 	 * If this is a PCIe rootport or downstream switch port, there's only
25588b92ad43SJustin Hibbits 	 * one slot permitted.
25598b92ad43SJustin Hibbits 	 */
25608b92ad43SJustin Hibbits 	if (pci_find_cap(dev, PCIY_EXPRESS, &pcie_pos) == 0) {
25618b92ad43SJustin Hibbits 		val = pci_read_config(dev, pcie_pos + PCIER_FLAGS, 2);
25628b92ad43SJustin Hibbits 		val &= PCIEM_FLAGS_TYPE;
25638b92ad43SJustin Hibbits 		if (val == PCIEM_TYPE_ROOT_PORT ||
25648b92ad43SJustin Hibbits 		    val == PCIEM_TYPE_DOWNSTREAM_PORT)
25658b92ad43SJustin Hibbits 			return (0);
25668b92ad43SJustin Hibbits 	}
25675502348dSJustin Hibbits #endif
25684fa59183SMike Smith 	return (PCI_SLOTMAX);
2569bb0d0a8eSMike Smith }
2570bb0d0a8eSMike Smith 
257155d3ea17SRyan Stone static int
257255d3ea17SRyan Stone pcib_ari_maxslots(device_t dev)
257355d3ea17SRyan Stone {
257455d3ea17SRyan Stone 	struct pcib_softc *sc;
257555d3ea17SRyan Stone 
257655d3ea17SRyan Stone 	sc = device_get_softc(dev);
257755d3ea17SRyan Stone 
257855d3ea17SRyan Stone 	if (sc->flags & PCIB_ENABLE_ARI)
257955d3ea17SRyan Stone 		return (PCIE_ARI_SLOTMAX);
258055d3ea17SRyan Stone 	else
25818b92ad43SJustin Hibbits 		return (pcib_maxslots(dev));
258255d3ea17SRyan Stone }
258355d3ea17SRyan Stone 
258455d3ea17SRyan Stone static int
258555d3ea17SRyan Stone pcib_ari_maxfuncs(device_t dev)
258655d3ea17SRyan Stone {
258755d3ea17SRyan Stone 	struct pcib_softc *sc;
258855d3ea17SRyan Stone 
258955d3ea17SRyan Stone 	sc = device_get_softc(dev);
259055d3ea17SRyan Stone 
259155d3ea17SRyan Stone 	if (sc->flags & PCIB_ENABLE_ARI)
259255d3ea17SRyan Stone 		return (PCIE_ARI_FUNCMAX);
259355d3ea17SRyan Stone 	else
259455d3ea17SRyan Stone 		return (PCI_FUNCMAX);
259555d3ea17SRyan Stone }
259655d3ea17SRyan Stone 
25972397d2d8SRyan Stone static void
25982397d2d8SRyan Stone pcib_ari_decode_rid(device_t pcib, uint16_t rid, int *bus, int *slot,
25992397d2d8SRyan Stone     int *func)
26002397d2d8SRyan Stone {
26012397d2d8SRyan Stone 	struct pcib_softc *sc;
26022397d2d8SRyan Stone 
26032397d2d8SRyan Stone 	sc = device_get_softc(pcib);
26042397d2d8SRyan Stone 
26052397d2d8SRyan Stone 	*bus = PCI_RID2BUS(rid);
26062397d2d8SRyan Stone 	if (sc->flags & PCIB_ENABLE_ARI) {
26072397d2d8SRyan Stone 		*slot = PCIE_ARI_RID2SLOT(rid);
26082397d2d8SRyan Stone 		*func = PCIE_ARI_RID2FUNC(rid);
26092397d2d8SRyan Stone 	} else {
26102397d2d8SRyan Stone 		*slot = PCI_RID2SLOT(rid);
26112397d2d8SRyan Stone 		*func = PCI_RID2FUNC(rid);
26122397d2d8SRyan Stone 	}
26132397d2d8SRyan Stone }
26142397d2d8SRyan Stone 
2615bb0d0a8eSMike Smith /*
2616bb0d0a8eSMike Smith  * Since we are a child of a PCI bus, its parent must support the pcib interface.
2617bb0d0a8eSMike Smith  */
261855d3ea17SRyan Stone static uint32_t
2619795dceffSWarner Losh pcib_read_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, int width)
2620bb0d0a8eSMike Smith {
262182cb5c3bSJohn Baldwin #ifdef PCI_HP
262282cb5c3bSJohn Baldwin 	struct pcib_softc *sc;
262355d3ea17SRyan Stone 
262482cb5c3bSJohn Baldwin 	sc = device_get_softc(dev);
262582cb5c3bSJohn Baldwin 	if (!pcib_present(sc)) {
262682cb5c3bSJohn Baldwin 		switch (width) {
262782cb5c3bSJohn Baldwin 		case 2:
262882cb5c3bSJohn Baldwin 			return (0xffff);
262982cb5c3bSJohn Baldwin 		case 1:
263082cb5c3bSJohn Baldwin 			return (0xff);
263182cb5c3bSJohn Baldwin 		default:
263282cb5c3bSJohn Baldwin 			return (0xffffffff);
263382cb5c3bSJohn Baldwin 		}
263482cb5c3bSJohn Baldwin 	}
263582cb5c3bSJohn Baldwin #endif
263655d3ea17SRyan Stone 	pcib_xlate_ari(dev, b, &s, &f);
263755d3ea17SRyan Stone 	return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s,
263855d3ea17SRyan Stone 	    f, reg, width));
2639bb0d0a8eSMike Smith }
2640bb0d0a8eSMike Smith 
264155d3ea17SRyan Stone static void
2642795dceffSWarner Losh pcib_write_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, uint32_t val, int width)
2643bb0d0a8eSMike Smith {
264482cb5c3bSJohn Baldwin #ifdef PCI_HP
264582cb5c3bSJohn Baldwin 	struct pcib_softc *sc;
264655d3ea17SRyan Stone 
264782cb5c3bSJohn Baldwin 	sc = device_get_softc(dev);
264882cb5c3bSJohn Baldwin 	if (!pcib_present(sc))
264982cb5c3bSJohn Baldwin 		return;
265082cb5c3bSJohn Baldwin #endif
265155d3ea17SRyan Stone 	pcib_xlate_ari(dev, b, &s, &f);
265255d3ea17SRyan Stone 	PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f,
265355d3ea17SRyan Stone 	    reg, val, width);
2654bb0d0a8eSMike Smith }
2655bb0d0a8eSMike Smith 
2656bb0d0a8eSMike Smith /*
2657bb0d0a8eSMike Smith  * Route an interrupt across a PCI bridge.
2658bb0d0a8eSMike Smith  */
26592c2d1d07SBenno Rice int
2660bb0d0a8eSMike Smith pcib_route_interrupt(device_t pcib, device_t dev, int pin)
2661bb0d0a8eSMike Smith {
2662bb0d0a8eSMike Smith     device_t	bus;
2663bb0d0a8eSMike Smith     int		parent_intpin;
2664bb0d0a8eSMike Smith     int		intnum;
2665bb0d0a8eSMike Smith 
2666bb0d0a8eSMike Smith     /*
2667bb0d0a8eSMike Smith      *
2668bb0d0a8eSMike Smith      * The PCI standard defines a swizzle of the child-side device/intpin to
2669bb0d0a8eSMike Smith      * the parent-side intpin as follows.
2670bb0d0a8eSMike Smith      *
2671bb0d0a8eSMike Smith      * device = device on child bus
2672bb0d0a8eSMike Smith      * child_intpin = intpin on child bus slot (0-3)
2673bb0d0a8eSMike Smith      * parent_intpin = intpin on parent bus slot (0-3)
2674bb0d0a8eSMike Smith      *
2675bb0d0a8eSMike Smith      * parent_intpin = (device + child_intpin) % 4
2676bb0d0a8eSMike Smith      */
2677cdc95e1bSBernd Walter     parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4;
2678bb0d0a8eSMike Smith 
2679bb0d0a8eSMike Smith     /*
2680bb0d0a8eSMike Smith      * Our parent is a PCI bus.  Its parent must export the pcib interface
2681bb0d0a8eSMike Smith      * which includes the ability to route interrupts.
2682bb0d0a8eSMike Smith      */
2683bb0d0a8eSMike Smith     bus = device_get_parent(pcib);
2684bb0d0a8eSMike Smith     intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1);
268539981fedSJohn Baldwin     if (PCI_INTERRUPT_VALID(intnum) && bootverbose) {
2686c6a121abSJohn Baldwin 	device_printf(pcib, "slot %d INT%c is routed to irq %d\n",
2687c6a121abSJohn Baldwin 	    pci_get_slot(dev), 'A' + pin - 1, intnum);
26888046c4b9SMike Smith     }
2689bb0d0a8eSMike Smith     return(intnum);
2690bb0d0a8eSMike Smith }
2691b173edafSJohn Baldwin 
2692e706f7f0SJohn Baldwin /* Pass request to alloc MSI/MSI-X messages up to the parent bridge. */
26939bf4c9c1SJohn Baldwin int
26949bf4c9c1SJohn Baldwin pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs)
26959bf4c9c1SJohn Baldwin {
2696bd82bbb1SAndrew Gallatin 	struct pcib_softc *sc = device_get_softc(pcib);
26979bf4c9c1SJohn Baldwin 	device_t bus;
26989bf4c9c1SJohn Baldwin 
269922bf1c7fSJohn Baldwin 	if (sc->flags & PCIB_DISABLE_MSI)
270022bf1c7fSJohn Baldwin 		return (ENXIO);
27019bf4c9c1SJohn Baldwin 	bus = device_get_parent(pcib);
27029bf4c9c1SJohn Baldwin 	return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
27039bf4c9c1SJohn Baldwin 	    irqs));
27049bf4c9c1SJohn Baldwin }
27059bf4c9c1SJohn Baldwin 
2706e706f7f0SJohn Baldwin /* Pass request to release MSI/MSI-X messages up to the parent bridge. */
27079bf4c9c1SJohn Baldwin int
27089bf4c9c1SJohn Baldwin pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs)
27099bf4c9c1SJohn Baldwin {
27109bf4c9c1SJohn Baldwin 	device_t bus;
27119bf4c9c1SJohn Baldwin 
27129bf4c9c1SJohn Baldwin 	bus = device_get_parent(pcib);
27139bf4c9c1SJohn Baldwin 	return (PCIB_RELEASE_MSI(device_get_parent(bus), dev, count, irqs));
27149bf4c9c1SJohn Baldwin }
27159bf4c9c1SJohn Baldwin 
27169bf4c9c1SJohn Baldwin /* Pass request to alloc an MSI-X message up to the parent bridge. */
27179bf4c9c1SJohn Baldwin int
2718e706f7f0SJohn Baldwin pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
27199bf4c9c1SJohn Baldwin {
2720bd82bbb1SAndrew Gallatin 	struct pcib_softc *sc = device_get_softc(pcib);
27219bf4c9c1SJohn Baldwin 	device_t bus;
27229bf4c9c1SJohn Baldwin 
272368e9cbd3SMarius Strobl 	if (sc->flags & PCIB_DISABLE_MSIX)
272422bf1c7fSJohn Baldwin 		return (ENXIO);
27259bf4c9c1SJohn Baldwin 	bus = device_get_parent(pcib);
2726e706f7f0SJohn Baldwin 	return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
27275fe82bcaSJohn Baldwin }
27285fe82bcaSJohn Baldwin 
27299bf4c9c1SJohn Baldwin /* Pass request to release an MSI-X message up to the parent bridge. */
27309bf4c9c1SJohn Baldwin int
27319bf4c9c1SJohn Baldwin pcib_release_msix(device_t pcib, device_t dev, int irq)
27329bf4c9c1SJohn Baldwin {
27339bf4c9c1SJohn Baldwin 	device_t bus;
27349bf4c9c1SJohn Baldwin 
27359bf4c9c1SJohn Baldwin 	bus = device_get_parent(pcib);
27369bf4c9c1SJohn Baldwin 	return (PCIB_RELEASE_MSIX(device_get_parent(bus), dev, irq));
27379bf4c9c1SJohn Baldwin }
27389bf4c9c1SJohn Baldwin 
2739e706f7f0SJohn Baldwin /* Pass request to map MSI/MSI-X message up to parent bridge. */
2740e706f7f0SJohn Baldwin int
2741e706f7f0SJohn Baldwin pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
2742e706f7f0SJohn Baldwin     uint32_t *data)
2743e706f7f0SJohn Baldwin {
2744e706f7f0SJohn Baldwin 	device_t bus;
27454522ac77SLuoqi Chen 	int error;
2746e706f7f0SJohn Baldwin 
2747e706f7f0SJohn Baldwin 	bus = device_get_parent(pcib);
27484522ac77SLuoqi Chen 	error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
27494522ac77SLuoqi Chen 	if (error)
27504522ac77SLuoqi Chen 		return (error);
27514522ac77SLuoqi Chen 
27524522ac77SLuoqi Chen 	pci_ht_map_msi(pcib, *addr);
27534522ac77SLuoqi Chen 	return (0);
2754e706f7f0SJohn Baldwin }
2755e706f7f0SJohn Baldwin 
275662508c53SJohn Baldwin /* Pass request for device power state up to parent bridge. */
275762508c53SJohn Baldwin int
275862508c53SJohn Baldwin pcib_power_for_sleep(device_t pcib, device_t dev, int *pstate)
275962508c53SJohn Baldwin {
276062508c53SJohn Baldwin 	device_t bus;
276162508c53SJohn Baldwin 
276262508c53SJohn Baldwin 	bus = device_get_parent(pcib);
276362508c53SJohn Baldwin 	return (PCIB_POWER_FOR_SLEEP(bus, dev, pstate));
276462508c53SJohn Baldwin }
27655605a99eSRyan Stone 
27662397d2d8SRyan Stone static int
27672397d2d8SRyan Stone pcib_ari_enabled(device_t pcib)
27682397d2d8SRyan Stone {
27692397d2d8SRyan Stone 	struct pcib_softc *sc;
27702397d2d8SRyan Stone 
27712397d2d8SRyan Stone 	sc = device_get_softc(pcib);
27722397d2d8SRyan Stone 
27732397d2d8SRyan Stone 	return ((sc->flags & PCIB_ENABLE_ARI) != 0);
27742397d2d8SRyan Stone }
27752397d2d8SRyan Stone 
2776d7be980dSAndrew Turner static int
2777d7be980dSAndrew Turner pcib_ari_get_id(device_t pcib, device_t dev, enum pci_id_type type,
2778d7be980dSAndrew Turner     uintptr_t *id)
277955d3ea17SRyan Stone {
278055d3ea17SRyan Stone 	struct pcib_softc *sc;
27811e43b18cSAndrew Turner 	device_t bus_dev;
278255d3ea17SRyan Stone 	uint8_t bus, slot, func;
278355d3ea17SRyan Stone 
27841e43b18cSAndrew Turner 	if (type != PCI_ID_RID) {
27851e43b18cSAndrew Turner 		bus_dev = device_get_parent(pcib);
27861e43b18cSAndrew Turner 		return (PCIB_GET_ID(device_get_parent(bus_dev), dev, type, id));
27871e43b18cSAndrew Turner 	}
2788d7be980dSAndrew Turner 
278955d3ea17SRyan Stone 	sc = device_get_softc(pcib);
279055d3ea17SRyan Stone 
279155d3ea17SRyan Stone 	if (sc->flags & PCIB_ENABLE_ARI) {
279255d3ea17SRyan Stone 		bus = pci_get_bus(dev);
279355d3ea17SRyan Stone 		func = pci_get_function(dev);
279455d3ea17SRyan Stone 
2795d7be980dSAndrew Turner 		*id = (PCI_ARI_RID(bus, func));
279655d3ea17SRyan Stone 	} else {
279755d3ea17SRyan Stone 		bus = pci_get_bus(dev);
279855d3ea17SRyan Stone 		slot = pci_get_slot(dev);
279955d3ea17SRyan Stone 		func = pci_get_function(dev);
280055d3ea17SRyan Stone 
2801d7be980dSAndrew Turner 		*id = (PCI_RID(bus, slot, func));
280255d3ea17SRyan Stone 	}
2803d7be980dSAndrew Turner 
2804d7be980dSAndrew Turner 	return (0);
280555d3ea17SRyan Stone }
280655d3ea17SRyan Stone 
280755d3ea17SRyan Stone /*
280855d3ea17SRyan Stone  * Check that the downstream port (pcib) and the endpoint device (dev) both
280955d3ea17SRyan Stone  * support ARI.  If so, enable it and return 0, otherwise return an error.
281055d3ea17SRyan Stone  */
281155d3ea17SRyan Stone static int
281255d3ea17SRyan Stone pcib_try_enable_ari(device_t pcib, device_t dev)
281355d3ea17SRyan Stone {
281455d3ea17SRyan Stone 	struct pcib_softc *sc;
281555d3ea17SRyan Stone 	int error;
281655d3ea17SRyan Stone 	uint32_t cap2;
281755d3ea17SRyan Stone 	int ari_cap_off;
281855d3ea17SRyan Stone 	uint32_t ari_ver;
281955d3ea17SRyan Stone 	uint32_t pcie_pos;
282055d3ea17SRyan Stone 
282155d3ea17SRyan Stone 	sc = device_get_softc(pcib);
282255d3ea17SRyan Stone 
282355d3ea17SRyan Stone 	/*
282455d3ea17SRyan Stone 	 * ARI is controlled in a register in the PCIe capability structure.
282555d3ea17SRyan Stone 	 * If the downstream port does not have the PCIe capability structure
282655d3ea17SRyan Stone 	 * then it does not support ARI.
282755d3ea17SRyan Stone 	 */
282855d3ea17SRyan Stone 	error = pci_find_cap(pcib, PCIY_EXPRESS, &pcie_pos);
282955d3ea17SRyan Stone 	if (error != 0)
283055d3ea17SRyan Stone 		return (ENODEV);
283155d3ea17SRyan Stone 
283255d3ea17SRyan Stone 	/* Check that the PCIe port advertises ARI support. */
283355d3ea17SRyan Stone 	cap2 = pci_read_config(pcib, pcie_pos + PCIER_DEVICE_CAP2, 4);
283455d3ea17SRyan Stone 	if (!(cap2 & PCIEM_CAP2_ARI))
283555d3ea17SRyan Stone 		return (ENODEV);
283655d3ea17SRyan Stone 
283755d3ea17SRyan Stone 	/*
283855d3ea17SRyan Stone 	 * Check that the endpoint device advertises ARI support via the ARI
283955d3ea17SRyan Stone 	 * extended capability structure.
284055d3ea17SRyan Stone 	 */
284155d3ea17SRyan Stone 	error = pci_find_extcap(dev, PCIZ_ARI, &ari_cap_off);
284255d3ea17SRyan Stone 	if (error != 0)
284355d3ea17SRyan Stone 		return (ENODEV);
284455d3ea17SRyan Stone 
284555d3ea17SRyan Stone 	/*
284655d3ea17SRyan Stone 	 * Finally, check that the endpoint device supports the same version
284755d3ea17SRyan Stone 	 * of ARI that we do.
284855d3ea17SRyan Stone 	 */
284955d3ea17SRyan Stone 	ari_ver = pci_read_config(dev, ari_cap_off, 4);
285055d3ea17SRyan Stone 	if (PCI_EXTCAP_VER(ari_ver) != PCIB_SUPPORTED_ARI_VER) {
285155d3ea17SRyan Stone 		if (bootverbose)
285255d3ea17SRyan Stone 			device_printf(pcib,
285355d3ea17SRyan Stone 			    "Unsupported version of ARI (%d) detected\n",
285455d3ea17SRyan Stone 			    PCI_EXTCAP_VER(ari_ver));
285555d3ea17SRyan Stone 
285655d3ea17SRyan Stone 		return (ENXIO);
285755d3ea17SRyan Stone 	}
285855d3ea17SRyan Stone 
285955d3ea17SRyan Stone 	pcib_enable_ari(sc, pcie_pos);
286055d3ea17SRyan Stone 
286155d3ea17SRyan Stone 	return (0);
286255d3ea17SRyan Stone }
28634cb67729SWarner Losh 
286428586889SWarner Losh int
286528586889SWarner Losh pcib_request_feature_allow(device_t pcib, device_t dev,
286628586889SWarner Losh     enum pci_feature feature)
286728586889SWarner Losh {
286828586889SWarner Losh 	/*
28695914c62eSGavin Atkinson 	 * No host firmware we have to negotiate with, so we allow
287028586889SWarner Losh 	 * every valid feature requested.
287128586889SWarner Losh 	 */
287228586889SWarner Losh 	switch (feature) {
287328586889SWarner Losh 	case PCI_FEATURE_AER:
287428586889SWarner Losh 	case PCI_FEATURE_HP:
287528586889SWarner Losh 		break;
287628586889SWarner Losh 	default:
287728586889SWarner Losh 		return (EINVAL);
287828586889SWarner Losh 	}
287928586889SWarner Losh 
288028586889SWarner Losh 	return (0);
288128586889SWarner Losh }
288228586889SWarner Losh 
28831ffd07bdSJohn Baldwin int
28841ffd07bdSJohn Baldwin pcib_request_feature(device_t dev, enum pci_feature feature)
28851ffd07bdSJohn Baldwin {
28861ffd07bdSJohn Baldwin 
28871ffd07bdSJohn Baldwin 	/*
28881ffd07bdSJohn Baldwin 	 * Invoke PCIB_REQUEST_FEATURE of this bridge first in case
28891ffd07bdSJohn Baldwin 	 * the firmware overrides the method of PCI-PCI bridges.
28901ffd07bdSJohn Baldwin 	 */
28911ffd07bdSJohn Baldwin 	return (PCIB_REQUEST_FEATURE(dev, dev, feature));
28921ffd07bdSJohn Baldwin }
28931ffd07bdSJohn Baldwin 
28944cb67729SWarner Losh /*
28954cb67729SWarner Losh  * Pass the request to use this PCI feature up the tree. Either there's a
28964cb67729SWarner Losh  * firmware like ACPI that's using this feature that will approve (or deny) the
28974cb67729SWarner Losh  * request to take it over, or the platform has no such firmware, in which case
28984cb67729SWarner Losh  * the request will be approved. If the request is approved, the OS is expected
28994cb67729SWarner Losh  * to make use of the feature or render it harmless.
29004cb67729SWarner Losh  */
29014cb67729SWarner Losh static int
29021ffd07bdSJohn Baldwin pcib_request_feature_default(device_t pcib, device_t dev,
29031ffd07bdSJohn Baldwin     enum pci_feature feature)
29044cb67729SWarner Losh {
29054cb67729SWarner Losh 	device_t bus;
29064cb67729SWarner Losh 
29074cb67729SWarner Losh 	/*
29084cb67729SWarner Losh 	 * Our parent is necessarily a pci bus. Its parent will either be
29094cb67729SWarner Losh 	 * another pci bridge (which passes it up) or a host bridge that can
29104cb67729SWarner Losh 	 * approve or reject the request.
29114cb67729SWarner Losh 	 */
29124cb67729SWarner Losh 	bus = device_get_parent(pcib);
29134cb67729SWarner Losh 	return (PCIB_REQUEST_FEATURE(device_get_parent(bus), dev, feature));
29144cb67729SWarner Losh }
2915*5db2a4a8SKonstantin Belousov 
2916*5db2a4a8SKonstantin Belousov static int
2917*5db2a4a8SKonstantin Belousov pcib_reset_child(device_t dev, device_t child, int flags)
2918*5db2a4a8SKonstantin Belousov {
2919*5db2a4a8SKonstantin Belousov 	struct pci_devinfo *pdinfo;
2920*5db2a4a8SKonstantin Belousov 	int error;
2921*5db2a4a8SKonstantin Belousov 
2922*5db2a4a8SKonstantin Belousov 	error = 0;
2923*5db2a4a8SKonstantin Belousov 	if (dev == NULL || device_get_parent(child) != dev)
2924*5db2a4a8SKonstantin Belousov 		goto out;
2925*5db2a4a8SKonstantin Belousov 	error = ENXIO;
2926*5db2a4a8SKonstantin Belousov 	if (device_get_devclass(child) != devclass_find("pci"))
2927*5db2a4a8SKonstantin Belousov 		goto out;
2928*5db2a4a8SKonstantin Belousov 	pdinfo = device_get_ivars(dev);
2929*5db2a4a8SKonstantin Belousov 	if (pdinfo->cfg.pcie.pcie_location != 0 &&
2930*5db2a4a8SKonstantin Belousov 	    (pdinfo->cfg.pcie.pcie_type == PCIEM_TYPE_DOWNSTREAM_PORT ||
2931*5db2a4a8SKonstantin Belousov 	    pdinfo->cfg.pcie.pcie_type == PCIEM_TYPE_ROOT_PORT)) {
2932*5db2a4a8SKonstantin Belousov 		error = bus_helper_reset_prepare(child, flags);
2933*5db2a4a8SKonstantin Belousov 		if (error == 0) {
2934*5db2a4a8SKonstantin Belousov 			error = pcie_link_reset(dev,
2935*5db2a4a8SKonstantin Belousov 			    pdinfo->cfg.pcie.pcie_location);
2936*5db2a4a8SKonstantin Belousov 			/* XXXKIB call _post even if error != 0 ? */
2937*5db2a4a8SKonstantin Belousov 			bus_helper_reset_post(child, flags);
2938*5db2a4a8SKonstantin Belousov 		}
2939*5db2a4a8SKonstantin Belousov 	}
2940*5db2a4a8SKonstantin Belousov out:
2941*5db2a4a8SKonstantin Belousov 	return (error);
2942*5db2a4a8SKonstantin Belousov }
2943