1 /*- 2 * Copyright (c) 2013-2015 Sandvine Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 #include "opt_bus.h" 29 30 #include <sys/param.h> 31 #include <sys/conf.h> 32 #include <sys/kernel.h> 33 #include <sys/systm.h> 34 #include <sys/bus.h> 35 #include <sys/fcntl.h> 36 #include <sys/ioccom.h> 37 #include <sys/iov.h> 38 #include <sys/linker.h> 39 #include <sys/lock.h> 40 #include <sys/malloc.h> 41 #include <sys/module.h> 42 #include <sys/mutex.h> 43 #include <sys/pciio.h> 44 #include <sys/queue.h> 45 #include <sys/rman.h> 46 #include <sys/sysctl.h> 47 48 #include <machine/bus.h> 49 #include <machine/stdarg.h> 50 51 #include <sys/nv.h> 52 #include <sys/iov_schema.h> 53 54 #include <dev/pci/pcireg.h> 55 #include <dev/pci/pcivar.h> 56 #include <dev/pci/pci_iov.h> 57 #include <dev/pci/pci_private.h> 58 #include <dev/pci/pci_iov_private.h> 59 #include <dev/pci/schema_private.h> 60 61 #include "pcib_if.h" 62 63 static MALLOC_DEFINE(M_SRIOV, "sr_iov", "PCI SR-IOV allocations"); 64 65 static d_ioctl_t pci_iov_ioctl; 66 67 static struct cdevsw iov_cdevsw = { 68 .d_version = D_VERSION, 69 .d_name = "iov", 70 .d_ioctl = pci_iov_ioctl 71 }; 72 73 SYSCTL_DECL(_hw_pci); 74 75 /* 76 * The maximum amount of memory we will allocate for user configuration of an 77 * SR-IOV device. 1MB ought to be enough for anyone, but leave this 78 * configurable just in case. 79 */ 80 static u_long pci_iov_max_config = 1024 * 1024; 81 SYSCTL_ULONG(_hw_pci, OID_AUTO, iov_max_config, CTLFLAG_RWTUN, 82 &pci_iov_max_config, 0, "Maximum allowed size of SR-IOV configuration."); 83 84 #define IOV_READ(d, r, w) \ 85 pci_read_config((d)->cfg.dev, (d)->cfg.iov->iov_pos + r, w) 86 87 #define IOV_WRITE(d, r, v, w) \ 88 pci_write_config((d)->cfg.dev, (d)->cfg.iov->iov_pos + r, v, w) 89 90 static nvlist_t *pci_iov_build_schema(nvlist_t **pf_schema, 91 nvlist_t **vf_schema); 92 static void pci_iov_build_pf_schema(nvlist_t *schema, 93 nvlist_t **driver_schema); 94 static void pci_iov_build_vf_schema(nvlist_t *schema, 95 nvlist_t **driver_schema); 96 static int pci_iov_delete_iov_children(struct pci_devinfo *dinfo); 97 static nvlist_t *pci_iov_get_pf_subsystem_schema(void); 98 static nvlist_t *pci_iov_get_vf_subsystem_schema(void); 99 100 int 101 pci_iov_attach_name(device_t dev, struct nvlist *pf_schema, 102 struct nvlist *vf_schema, const char *fmt, ...) 103 { 104 char buf[NAME_MAX + 1]; 105 va_list ap; 106 107 va_start(ap, fmt); 108 vsnprintf(buf, sizeof(buf), fmt, ap); 109 va_end(ap); 110 return (PCI_IOV_ATTACH(device_get_parent(dev), dev, pf_schema, 111 vf_schema, buf)); 112 } 113 114 int 115 pci_iov_attach_method(device_t bus, device_t dev, nvlist_t *pf_schema, 116 nvlist_t *vf_schema, const char *name) 117 { 118 struct pci_devinfo *dinfo; 119 struct pcicfg_iov *iov; 120 nvlist_t *schema; 121 uint32_t version; 122 int error; 123 int iov_pos; 124 125 dinfo = device_get_ivars(dev); 126 schema = NULL; 127 128 error = pci_find_extcap(dev, PCIZ_SRIOV, &iov_pos); 129 130 if (error != 0) 131 return (error); 132 133 version = pci_read_config(dev, iov_pos, 4); 134 if (PCI_EXTCAP_VER(version) != 1) { 135 if (bootverbose) 136 device_printf(dev, 137 "Unsupported version of SR-IOV (%d) detected\n", 138 PCI_EXTCAP_VER(version)); 139 140 return (ENXIO); 141 } 142 143 iov = malloc(sizeof(*dinfo->cfg.iov), M_SRIOV, M_WAITOK | M_ZERO); 144 145 mtx_lock(&Giant); 146 if (dinfo->cfg.iov != NULL) { 147 error = EBUSY; 148 goto cleanup; 149 } 150 iov->iov_pf = dev; 151 iov->iov_pos = iov_pos; 152 153 schema = pci_iov_build_schema(&pf_schema, &vf_schema); 154 if (schema == NULL) { 155 error = ENOMEM; 156 goto cleanup; 157 } 158 159 error = pci_iov_validate_schema(schema); 160 if (error != 0) 161 goto cleanup; 162 iov->iov_schema = schema; 163 164 iov->iov_cdev = make_dev(&iov_cdevsw, device_get_unit(dev), 165 UID_ROOT, GID_WHEEL, 0600, "iov/%s", name); 166 167 if (iov->iov_cdev == NULL) { 168 error = ENOMEM; 169 goto cleanup; 170 } 171 172 dinfo->cfg.iov = iov; 173 iov->iov_cdev->si_drv1 = dinfo; 174 mtx_unlock(&Giant); 175 176 return (0); 177 178 cleanup: 179 nvlist_destroy(schema); 180 nvlist_destroy(pf_schema); 181 nvlist_destroy(vf_schema); 182 free(iov, M_SRIOV); 183 mtx_unlock(&Giant); 184 return (error); 185 } 186 187 int 188 pci_iov_detach_method(device_t bus, device_t dev) 189 { 190 struct pci_devinfo *dinfo; 191 struct pcicfg_iov *iov; 192 int error; 193 194 mtx_lock(&Giant); 195 dinfo = device_get_ivars(dev); 196 iov = dinfo->cfg.iov; 197 198 if (iov == NULL) { 199 mtx_unlock(&Giant); 200 return (0); 201 } 202 203 if ((iov->iov_flags & IOV_BUSY) != 0) { 204 mtx_unlock(&Giant); 205 return (EBUSY); 206 } 207 208 error = pci_iov_delete_iov_children(dinfo); 209 if (error != 0) { 210 mtx_unlock(&Giant); 211 return (error); 212 } 213 214 dinfo->cfg.iov = NULL; 215 216 if (iov->iov_cdev) { 217 destroy_dev(iov->iov_cdev); 218 iov->iov_cdev = NULL; 219 } 220 nvlist_destroy(iov->iov_schema); 221 222 free(iov, M_SRIOV); 223 mtx_unlock(&Giant); 224 225 return (0); 226 } 227 228 static nvlist_t * 229 pci_iov_build_schema(nvlist_t **pf, nvlist_t **vf) 230 { 231 nvlist_t *schema, *pf_driver, *vf_driver; 232 233 /* We always take ownership of the schemas. */ 234 pf_driver = *pf; 235 *pf = NULL; 236 vf_driver = *vf; 237 *vf = NULL; 238 239 schema = pci_iov_schema_alloc_node(); 240 if (schema == NULL) 241 goto cleanup; 242 243 pci_iov_build_pf_schema(schema, &pf_driver); 244 pci_iov_build_vf_schema(schema, &vf_driver); 245 246 if (nvlist_error(schema) != 0) 247 goto cleanup; 248 249 return (schema); 250 251 cleanup: 252 nvlist_destroy(schema); 253 nvlist_destroy(pf_driver); 254 nvlist_destroy(vf_driver); 255 return (NULL); 256 } 257 258 static void 259 pci_iov_build_pf_schema(nvlist_t *schema, nvlist_t **driver_schema) 260 { 261 nvlist_t *pf_schema, *iov_schema; 262 263 pf_schema = pci_iov_schema_alloc_node(); 264 if (pf_schema == NULL) { 265 nvlist_set_error(schema, ENOMEM); 266 return; 267 } 268 269 iov_schema = pci_iov_get_pf_subsystem_schema(); 270 271 /* 272 * Note that if either *driver_schema or iov_schema is NULL, then 273 * nvlist_move_nvlist will put the schema in the error state and 274 * SR-IOV will fail to initialize later, so we don't have to explicitly 275 * handle that case. 276 */ 277 nvlist_move_nvlist(pf_schema, DRIVER_CONFIG_NAME, *driver_schema); 278 nvlist_move_nvlist(pf_schema, IOV_CONFIG_NAME, iov_schema); 279 nvlist_move_nvlist(schema, PF_CONFIG_NAME, pf_schema); 280 *driver_schema = NULL; 281 } 282 283 static void 284 pci_iov_build_vf_schema(nvlist_t *schema, nvlist_t **driver_schema) 285 { 286 nvlist_t *vf_schema, *iov_schema; 287 288 vf_schema = pci_iov_schema_alloc_node(); 289 if (vf_schema == NULL) { 290 nvlist_set_error(schema, ENOMEM); 291 return; 292 } 293 294 iov_schema = pci_iov_get_vf_subsystem_schema(); 295 296 /* 297 * Note that if either *driver_schema or iov_schema is NULL, then 298 * nvlist_move_nvlist will put the schema in the error state and 299 * SR-IOV will fail to initialize later, so we don't have to explicitly 300 * handle that case. 301 */ 302 nvlist_move_nvlist(vf_schema, DRIVER_CONFIG_NAME, *driver_schema); 303 nvlist_move_nvlist(vf_schema, IOV_CONFIG_NAME, iov_schema); 304 nvlist_move_nvlist(schema, VF_SCHEMA_NAME, vf_schema); 305 *driver_schema = NULL; 306 } 307 308 static nvlist_t * 309 pci_iov_get_pf_subsystem_schema(void) 310 { 311 nvlist_t *pf; 312 313 pf = pci_iov_schema_alloc_node(); 314 if (pf == NULL) 315 return (NULL); 316 317 pci_iov_schema_add_uint16(pf, "num_vfs", IOV_SCHEMA_REQUIRED, -1); 318 pci_iov_schema_add_string(pf, "device", IOV_SCHEMA_REQUIRED, NULL); 319 320 return (pf); 321 } 322 323 static nvlist_t * 324 pci_iov_get_vf_subsystem_schema(void) 325 { 326 nvlist_t *vf; 327 328 vf = pci_iov_schema_alloc_node(); 329 if (vf == NULL) 330 return (NULL); 331 332 pci_iov_schema_add_bool(vf, "passthrough", IOV_SCHEMA_HASDEFAULT, 0); 333 334 return (vf); 335 } 336 337 static int 338 pci_iov_alloc_bar(struct pci_devinfo *dinfo, int bar, pci_addr_t bar_shift) 339 { 340 struct resource *res; 341 struct pcicfg_iov *iov; 342 device_t dev, bus; 343 rman_res_t start, end; 344 pci_addr_t bar_size; 345 int rid; 346 347 iov = dinfo->cfg.iov; 348 dev = dinfo->cfg.dev; 349 bus = device_get_parent(dev); 350 rid = iov->iov_pos + PCIR_SRIOV_BAR(bar); 351 bar_size = 1 << bar_shift; 352 353 res = pci_alloc_multi_resource(bus, dev, SYS_RES_MEMORY, &rid, 0, 354 ~0, 1, iov->iov_num_vfs, RF_ACTIVE); 355 356 if (res == NULL) 357 return (ENXIO); 358 359 iov->iov_bar[bar].res = res; 360 iov->iov_bar[bar].bar_size = bar_size; 361 iov->iov_bar[bar].bar_shift = bar_shift; 362 363 start = rman_get_start(res); 364 end = rman_get_end(res); 365 return (rman_manage_region(&iov->rman, start, end)); 366 } 367 368 static void 369 pci_iov_add_bars(struct pcicfg_iov *iov, struct pci_devinfo *dinfo) 370 { 371 struct pci_iov_bar *bar; 372 uint64_t bar_start; 373 int i; 374 375 for (i = 0; i <= PCIR_MAX_BAR_0; i++) { 376 bar = &iov->iov_bar[i]; 377 if (bar->res != NULL) { 378 bar_start = rman_get_start(bar->res) + 379 dinfo->cfg.vf.index * bar->bar_size; 380 381 pci_add_bar(dinfo->cfg.dev, PCIR_BAR(i), bar_start, 382 bar->bar_shift); 383 } 384 } 385 } 386 387 static int 388 pci_iov_parse_config(struct pcicfg_iov *iov, struct pci_iov_arg *arg, 389 nvlist_t **ret) 390 { 391 void *packed_config; 392 nvlist_t *config; 393 int error; 394 395 config = NULL; 396 packed_config = NULL; 397 398 if (arg->len > pci_iov_max_config) { 399 error = EMSGSIZE; 400 goto out; 401 } 402 403 packed_config = malloc(arg->len, M_SRIOV, M_WAITOK); 404 405 error = copyin(arg->config, packed_config, arg->len); 406 if (error != 0) 407 goto out; 408 409 config = nvlist_unpack(packed_config, arg->len, NV_FLAG_IGNORE_CASE); 410 if (config == NULL) { 411 error = EINVAL; 412 goto out; 413 } 414 415 error = pci_iov_schema_validate_config(iov->iov_schema, config); 416 if (error != 0) 417 goto out; 418 419 error = nvlist_error(config); 420 if (error != 0) 421 goto out; 422 423 *ret = config; 424 config = NULL; 425 426 out: 427 nvlist_destroy(config); 428 free(packed_config, M_SRIOV); 429 return (error); 430 } 431 432 /* 433 * Set the ARI_EN bit in the lowest-numbered PCI function with the SR-IOV 434 * capability. This bit is only writeable on the lowest-numbered PF but 435 * affects all PFs on the device. 436 */ 437 static int 438 pci_iov_set_ari(device_t bus, bool *ari_enabled) 439 { 440 device_t lowest; 441 device_t *devlist; 442 int i, error, devcount, lowest_func, lowest_pos, iov_pos, dev_func; 443 uint16_t iov_ctl; 444 445 /* If ARI is disabled on the downstream port there is nothing to do. */ 446 if (!PCIB_ARI_ENABLED(device_get_parent(bus))) { 447 *ari_enabled = false; 448 return (0); 449 } 450 451 error = device_get_children(bus, &devlist, &devcount); 452 453 if (error != 0) 454 return (error); 455 456 lowest = NULL; 457 for (i = 0; i < devcount; i++) { 458 if (pci_find_extcap(devlist[i], PCIZ_SRIOV, &iov_pos) == 0) { 459 dev_func = pci_get_function(devlist[i]); 460 if (lowest == NULL || dev_func < lowest_func) { 461 lowest = devlist[i]; 462 lowest_func = dev_func; 463 lowest_pos = iov_pos; 464 } 465 } 466 } 467 free(devlist, M_TEMP); 468 469 /* 470 * If we called this function some device must have the SR-IOV 471 * capability. 472 */ 473 KASSERT(lowest != NULL, 474 ("Could not find child of %s with SR-IOV capability", 475 device_get_nameunit(bus))); 476 477 iov_ctl = pci_read_config(lowest, lowest_pos + PCIR_SRIOV_CTL, 2); 478 iov_ctl |= PCIM_SRIOV_ARI_EN; 479 pci_write_config(lowest, lowest_pos + PCIR_SRIOV_CTL, iov_ctl, 2); 480 if ((pci_read_config(lowest, lowest_pos + PCIR_SRIOV_CTL, 2) & 481 PCIM_SRIOV_ARI_EN) == 0) { 482 device_printf(lowest, "failed to enable ARI\n"); 483 return (ENXIO); 484 } 485 *ari_enabled = true; 486 return (0); 487 } 488 489 static int 490 pci_iov_config_page_size(struct pci_devinfo *dinfo) 491 { 492 uint32_t page_cap, page_size; 493 494 page_cap = IOV_READ(dinfo, PCIR_SRIOV_PAGE_CAP, 4); 495 496 /* 497 * If the system page size is less than the smallest SR-IOV page size 498 * then round up to the smallest SR-IOV page size. 499 */ 500 if (PAGE_SHIFT < PCI_SRIOV_BASE_PAGE_SHIFT) 501 page_size = (1 << 0); 502 else 503 page_size = (1 << (PAGE_SHIFT - PCI_SRIOV_BASE_PAGE_SHIFT)); 504 505 /* Check that the device supports the system page size. */ 506 if (!(page_size & page_cap)) 507 return (ENXIO); 508 509 IOV_WRITE(dinfo, PCIR_SRIOV_PAGE_SIZE, page_size, 4); 510 return (0); 511 } 512 513 static int 514 pci_iov_init(device_t dev, uint16_t num_vfs, const nvlist_t *config) 515 { 516 const nvlist_t *device, *driver_config; 517 518 device = nvlist_get_nvlist(config, PF_CONFIG_NAME); 519 driver_config = nvlist_get_nvlist(device, DRIVER_CONFIG_NAME); 520 return (PCI_IOV_INIT(dev, num_vfs, driver_config)); 521 } 522 523 static int 524 pci_iov_init_rman(device_t pf, struct pcicfg_iov *iov) 525 { 526 int error; 527 528 iov->rman.rm_start = 0; 529 iov->rman.rm_end = ~0; 530 iov->rman.rm_type = RMAN_ARRAY; 531 snprintf(iov->rman_name, sizeof(iov->rman_name), "%s VF I/O memory", 532 device_get_nameunit(pf)); 533 iov->rman.rm_descr = iov->rman_name; 534 535 error = rman_init(&iov->rman); 536 if (error != 0) 537 return (error); 538 539 iov->iov_flags |= IOV_RMAN_INITED; 540 return (0); 541 } 542 543 static int 544 pci_iov_alloc_bar_ea(struct pci_devinfo *dinfo, int bar) 545 { 546 struct pcicfg_iov *iov; 547 rman_res_t start, end; 548 struct resource *res; 549 struct resource_list *rl; 550 struct resource_list_entry *rle; 551 552 rl = &dinfo->resources; 553 iov = dinfo->cfg.iov; 554 555 rle = resource_list_find(rl, SYS_RES_MEMORY, 556 iov->iov_pos + PCIR_SRIOV_BAR(bar)); 557 if (rle == NULL) 558 rle = resource_list_find(rl, SYS_RES_IOPORT, 559 iov->iov_pos + PCIR_SRIOV_BAR(bar)); 560 if (rle == NULL) 561 return (ENXIO); 562 res = rle->res; 563 564 iov->iov_bar[bar].res = res; 565 iov->iov_bar[bar].bar_size = rman_get_size(res) / iov->iov_num_vfs; 566 iov->iov_bar[bar].bar_shift = pci_mapsize(iov->iov_bar[bar].bar_size); 567 568 start = rman_get_start(res); 569 end = rman_get_end(res); 570 571 return (rman_manage_region(&iov->rman, start, end)); 572 } 573 574 static int 575 pci_iov_setup_bars(struct pci_devinfo *dinfo) 576 { 577 device_t dev; 578 struct pcicfg_iov *iov; 579 pci_addr_t bar_value, testval; 580 int i, last_64, error; 581 582 iov = dinfo->cfg.iov; 583 dev = dinfo->cfg.dev; 584 last_64 = 0; 585 586 pci_add_resources_ea(device_get_parent(dev), dev, 1); 587 588 for (i = 0; i <= PCIR_MAX_BAR_0; i++) { 589 /* First, try to use BARs allocated with EA */ 590 error = pci_iov_alloc_bar_ea(dinfo, i); 591 if (error == 0) 592 continue; 593 594 /* Allocate legacy-BAR only if EA is not enabled */ 595 if (pci_ea_is_enabled(dev, iov->iov_pos + PCIR_SRIOV_BAR(i))) 596 continue; 597 598 /* 599 * If a PCI BAR is a 64-bit wide BAR, then it spans two 600 * consecutive registers. Therefore if the last BAR that 601 * we looked at was a 64-bit BAR, we need to skip this 602 * register as it's the second half of the last BAR. 603 */ 604 if (!last_64) { 605 pci_read_bar(dev, 606 iov->iov_pos + PCIR_SRIOV_BAR(i), 607 &bar_value, &testval, &last_64); 608 609 if (testval != 0) { 610 error = pci_iov_alloc_bar(dinfo, i, 611 pci_mapsize(testval)); 612 if (error != 0) 613 return (error); 614 } 615 } else 616 last_64 = 0; 617 } 618 619 return (0); 620 } 621 622 static void 623 pci_iov_enumerate_vfs(struct pci_devinfo *dinfo, const nvlist_t *config, 624 uint16_t first_rid, uint16_t rid_stride) 625 { 626 char device_name[VF_MAX_NAME]; 627 const nvlist_t *device, *driver_config, *iov_config; 628 device_t bus, dev, vf; 629 struct pcicfg_iov *iov; 630 struct pci_devinfo *vfinfo; 631 int i, error; 632 uint16_t vid, did, next_rid; 633 634 iov = dinfo->cfg.iov; 635 dev = dinfo->cfg.dev; 636 bus = device_get_parent(dev); 637 next_rid = first_rid; 638 vid = pci_get_vendor(dev); 639 did = IOV_READ(dinfo, PCIR_SRIOV_VF_DID, 2); 640 641 for (i = 0; i < iov->iov_num_vfs; i++, next_rid += rid_stride) { 642 snprintf(device_name, sizeof(device_name), VF_PREFIX"%d", i); 643 device = nvlist_get_nvlist(config, device_name); 644 iov_config = nvlist_get_nvlist(device, IOV_CONFIG_NAME); 645 driver_config = nvlist_get_nvlist(device, DRIVER_CONFIG_NAME); 646 647 vf = PCI_CREATE_IOV_CHILD(bus, dev, next_rid, vid, did); 648 if (vf == NULL) 649 break; 650 651 /* 652 * If we are creating passthrough devices then force the ppt 653 * driver to attach to prevent a VF driver from claiming the 654 * VFs. 655 */ 656 if (nvlist_get_bool(iov_config, "passthrough")) 657 device_set_devclass_fixed(vf, "ppt"); 658 659 vfinfo = device_get_ivars(vf); 660 661 vfinfo->cfg.iov = iov; 662 vfinfo->cfg.vf.index = i; 663 664 pci_iov_add_bars(iov, vfinfo); 665 666 error = PCI_IOV_ADD_VF(dev, i, driver_config); 667 if (error != 0) { 668 device_printf(dev, "Failed to add VF %d\n", i); 669 device_delete_child(bus, vf); 670 } 671 } 672 673 bus_generic_attach(bus); 674 } 675 676 static int 677 pci_iov_config(struct cdev *cdev, struct pci_iov_arg *arg) 678 { 679 device_t bus, dev; 680 struct pci_devinfo *dinfo; 681 struct pcicfg_iov *iov; 682 nvlist_t *config; 683 int i, error; 684 uint16_t rid_off, rid_stride; 685 uint16_t first_rid, last_rid; 686 uint16_t iov_ctl; 687 uint16_t num_vfs, total_vfs; 688 int iov_inited; 689 bool ari_enabled; 690 691 mtx_lock(&Giant); 692 dinfo = cdev->si_drv1; 693 iov = dinfo->cfg.iov; 694 dev = dinfo->cfg.dev; 695 bus = device_get_parent(dev); 696 iov_inited = 0; 697 config = NULL; 698 699 if ((iov->iov_flags & IOV_BUSY) || iov->iov_num_vfs != 0) { 700 mtx_unlock(&Giant); 701 return (EBUSY); 702 } 703 iov->iov_flags |= IOV_BUSY; 704 705 error = pci_iov_parse_config(iov, arg, &config); 706 if (error != 0) 707 goto out; 708 709 num_vfs = pci_iov_config_get_num_vfs(config); 710 total_vfs = IOV_READ(dinfo, PCIR_SRIOV_TOTAL_VFS, 2); 711 if (num_vfs > total_vfs) { 712 error = EINVAL; 713 goto out; 714 } 715 716 error = pci_iov_config_page_size(dinfo); 717 if (error != 0) 718 goto out; 719 720 error = pci_iov_set_ari(bus, &ari_enabled); 721 if (error != 0) 722 goto out; 723 724 error = pci_iov_init(dev, num_vfs, config); 725 if (error != 0) 726 goto out; 727 iov_inited = 1; 728 729 IOV_WRITE(dinfo, PCIR_SRIOV_NUM_VFS, num_vfs, 2); 730 731 rid_off = IOV_READ(dinfo, PCIR_SRIOV_VF_OFF, 2); 732 rid_stride = IOV_READ(dinfo, PCIR_SRIOV_VF_STRIDE, 2); 733 734 first_rid = pci_get_rid(dev) + rid_off; 735 last_rid = first_rid + (num_vfs - 1) * rid_stride; 736 737 /* We don't yet support allocating extra bus numbers for VFs. */ 738 if (pci_get_bus(dev) != PCI_RID2BUS(last_rid)) { 739 device_printf(dev, "not enough PCIe bus numbers for VFs\n"); 740 error = ENOSPC; 741 goto out; 742 } 743 744 if (!ari_enabled && PCI_RID2SLOT(last_rid) != 0) { 745 error = ENOSPC; 746 goto out; 747 } 748 749 iov_ctl = IOV_READ(dinfo, PCIR_SRIOV_CTL, 2); 750 iov_ctl &= ~(PCIM_SRIOV_VF_EN | PCIM_SRIOV_VF_MSE); 751 IOV_WRITE(dinfo, PCIR_SRIOV_CTL, iov_ctl, 2); 752 753 error = pci_iov_init_rman(dev, iov); 754 if (error != 0) 755 goto out; 756 757 iov->iov_num_vfs = num_vfs; 758 759 error = pci_iov_setup_bars(dinfo); 760 if (error != 0) 761 goto out; 762 763 iov_ctl = IOV_READ(dinfo, PCIR_SRIOV_CTL, 2); 764 iov_ctl |= PCIM_SRIOV_VF_EN | PCIM_SRIOV_VF_MSE; 765 IOV_WRITE(dinfo, PCIR_SRIOV_CTL, iov_ctl, 2); 766 767 /* Per specification, we must wait 100ms before accessing VFs. */ 768 pause("iov", roundup(hz, 10)); 769 pci_iov_enumerate_vfs(dinfo, config, first_rid, rid_stride); 770 771 nvlist_destroy(config); 772 iov->iov_flags &= ~IOV_BUSY; 773 mtx_unlock(&Giant); 774 775 return (0); 776 out: 777 if (iov_inited) 778 PCI_IOV_UNINIT(dev); 779 780 for (i = 0; i <= PCIR_MAX_BAR_0; i++) { 781 if (iov->iov_bar[i].res != NULL) { 782 pci_release_resource(bus, dev, iov->iov_bar[i].res); 783 pci_delete_resource(bus, dev, SYS_RES_MEMORY, 784 iov->iov_pos + PCIR_SRIOV_BAR(i)); 785 iov->iov_bar[i].res = NULL; 786 } 787 } 788 789 if (iov->iov_flags & IOV_RMAN_INITED) { 790 rman_fini(&iov->rman); 791 iov->iov_flags &= ~IOV_RMAN_INITED; 792 } 793 794 nvlist_destroy(config); 795 iov->iov_num_vfs = 0; 796 iov->iov_flags &= ~IOV_BUSY; 797 mtx_unlock(&Giant); 798 return (error); 799 } 800 801 void 802 pci_iov_cfg_restore(device_t dev, struct pci_devinfo *dinfo) 803 { 804 struct pcicfg_iov *iov; 805 806 iov = dinfo->cfg.iov; 807 808 IOV_WRITE(dinfo, PCIR_SRIOV_PAGE_SIZE, iov->iov_page_size, 4); 809 IOV_WRITE(dinfo, PCIR_SRIOV_NUM_VFS, iov->iov_num_vfs, 2); 810 IOV_WRITE(dinfo, PCIR_SRIOV_CTL, iov->iov_ctl, 2); 811 } 812 813 void 814 pci_iov_cfg_save(device_t dev, struct pci_devinfo *dinfo) 815 { 816 struct pcicfg_iov *iov; 817 818 iov = dinfo->cfg.iov; 819 820 iov->iov_page_size = IOV_READ(dinfo, PCIR_SRIOV_PAGE_SIZE, 4); 821 iov->iov_ctl = IOV_READ(dinfo, PCIR_SRIOV_CTL, 2); 822 } 823 824 /* Return true if child is a VF of the given PF. */ 825 static int 826 pci_iov_is_child_vf(struct pcicfg_iov *pf, device_t child) 827 { 828 struct pci_devinfo *vfinfo; 829 830 vfinfo = device_get_ivars(child); 831 832 if (!(vfinfo->cfg.flags & PCICFG_VF)) 833 return (0); 834 835 return (pf == vfinfo->cfg.iov); 836 } 837 838 static int 839 pci_iov_delete_iov_children(struct pci_devinfo *dinfo) 840 { 841 device_t bus, dev, vf, *devlist; 842 struct pcicfg_iov *iov; 843 int i, error, devcount; 844 uint32_t iov_ctl; 845 846 mtx_assert(&Giant, MA_OWNED); 847 848 iov = dinfo->cfg.iov; 849 dev = dinfo->cfg.dev; 850 bus = device_get_parent(dev); 851 devlist = NULL; 852 853 iov->iov_flags |= IOV_BUSY; 854 855 error = device_get_children(bus, &devlist, &devcount); 856 857 if (error != 0) 858 goto out; 859 860 for (i = 0; i < devcount; i++) { 861 vf = devlist[i]; 862 863 if (!pci_iov_is_child_vf(iov, vf)) 864 continue; 865 866 error = device_detach(vf); 867 if (error != 0) { 868 device_printf(dev, 869 "Could not disable SR-IOV: failed to detach VF %s\n", 870 device_get_nameunit(vf)); 871 goto out; 872 } 873 } 874 875 for (i = 0; i < devcount; i++) { 876 vf = devlist[i]; 877 878 if (pci_iov_is_child_vf(iov, vf)) 879 device_delete_child(bus, vf); 880 } 881 PCI_IOV_UNINIT(dev); 882 883 iov_ctl = IOV_READ(dinfo, PCIR_SRIOV_CTL, 2); 884 iov_ctl &= ~(PCIM_SRIOV_VF_EN | PCIM_SRIOV_VF_MSE); 885 IOV_WRITE(dinfo, PCIR_SRIOV_CTL, iov_ctl, 2); 886 IOV_WRITE(dinfo, PCIR_SRIOV_NUM_VFS, 0, 2); 887 888 iov->iov_num_vfs = 0; 889 890 for (i = 0; i <= PCIR_MAX_BAR_0; i++) { 891 if (iov->iov_bar[i].res != NULL) { 892 pci_release_resource(bus, dev, iov->iov_bar[i].res); 893 pci_delete_resource(bus, dev, SYS_RES_MEMORY, 894 iov->iov_pos + PCIR_SRIOV_BAR(i)); 895 iov->iov_bar[i].res = NULL; 896 } 897 } 898 899 if (iov->iov_flags & IOV_RMAN_INITED) { 900 rman_fini(&iov->rman); 901 iov->iov_flags &= ~IOV_RMAN_INITED; 902 } 903 904 error = 0; 905 out: 906 free(devlist, M_TEMP); 907 iov->iov_flags &= ~IOV_BUSY; 908 return (error); 909 } 910 911 static int 912 pci_iov_delete(struct cdev *cdev) 913 { 914 struct pci_devinfo *dinfo; 915 struct pcicfg_iov *iov; 916 int error; 917 918 mtx_lock(&Giant); 919 dinfo = cdev->si_drv1; 920 iov = dinfo->cfg.iov; 921 922 if ((iov->iov_flags & IOV_BUSY) != 0) { 923 error = EBUSY; 924 goto out; 925 } 926 if (iov->iov_num_vfs == 0) { 927 error = ECHILD; 928 goto out; 929 } 930 931 error = pci_iov_delete_iov_children(dinfo); 932 933 out: 934 mtx_unlock(&Giant); 935 return (error); 936 } 937 938 static int 939 pci_iov_get_schema_ioctl(struct cdev *cdev, struct pci_iov_schema *output) 940 { 941 struct pci_devinfo *dinfo; 942 void *packed; 943 size_t output_len, size; 944 int error; 945 946 packed = NULL; 947 948 mtx_lock(&Giant); 949 dinfo = cdev->si_drv1; 950 packed = nvlist_pack(dinfo->cfg.iov->iov_schema, &size); 951 mtx_unlock(&Giant); 952 953 if (packed == NULL) { 954 error = ENOMEM; 955 goto fail; 956 } 957 958 output_len = output->len; 959 output->len = size; 960 if (size <= output_len) { 961 error = copyout(packed, output->schema, size); 962 963 if (error != 0) 964 goto fail; 965 966 output->error = 0; 967 } else 968 /* 969 * If we return an error then the ioctl code won't copyout 970 * output back to userland, so we flag the error in the struct 971 * instead. 972 */ 973 output->error = EMSGSIZE; 974 975 error = 0; 976 977 fail: 978 free(packed, M_NVLIST); 979 980 return (error); 981 } 982 983 static int 984 pci_iov_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag, 985 struct thread *td) 986 { 987 988 switch (cmd) { 989 case IOV_CONFIG: 990 return (pci_iov_config(dev, (struct pci_iov_arg *)data)); 991 case IOV_DELETE: 992 return (pci_iov_delete(dev)); 993 case IOV_GET_SCHEMA: 994 return (pci_iov_get_schema_ioctl(dev, 995 (struct pci_iov_schema *)data)); 996 default: 997 return (EINVAL); 998 } 999 } 1000 1001 struct resource * 1002 pci_vf_alloc_mem_resource(device_t dev, device_t child, int *rid, 1003 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags) 1004 { 1005 struct pci_devinfo *dinfo; 1006 struct pcicfg_iov *iov; 1007 struct pci_map *map; 1008 struct resource *res; 1009 struct resource_list_entry *rle; 1010 rman_res_t bar_start, bar_end; 1011 pci_addr_t bar_length; 1012 int error; 1013 1014 dinfo = device_get_ivars(child); 1015 iov = dinfo->cfg.iov; 1016 1017 map = pci_find_bar(child, *rid); 1018 if (map == NULL) 1019 return (NULL); 1020 1021 bar_length = 1 << map->pm_size; 1022 bar_start = map->pm_value; 1023 bar_end = bar_start + bar_length - 1; 1024 1025 /* Make sure that the resource fits the constraints. */ 1026 if (bar_start >= end || bar_end <= bar_start || count != 1) 1027 return (NULL); 1028 1029 /* Clamp the resource to the constraints if necessary. */ 1030 if (bar_start < start) 1031 bar_start = start; 1032 if (bar_end > end) 1033 bar_end = end; 1034 bar_length = bar_end - bar_start + 1; 1035 1036 res = rman_reserve_resource(&iov->rman, bar_start, bar_end, 1037 bar_length, flags, child); 1038 if (res == NULL) 1039 return (NULL); 1040 1041 rle = resource_list_add(&dinfo->resources, SYS_RES_MEMORY, *rid, 1042 bar_start, bar_end, 1); 1043 if (rle == NULL) { 1044 rman_release_resource(res); 1045 return (NULL); 1046 } 1047 1048 rman_set_rid(res, *rid); 1049 rman_set_type(res, SYS_RES_MEMORY); 1050 1051 if (flags & RF_ACTIVE) { 1052 error = bus_activate_resource(child, SYS_RES_MEMORY, *rid, res); 1053 if (error != 0) { 1054 resource_list_delete(&dinfo->resources, SYS_RES_MEMORY, 1055 *rid); 1056 rman_release_resource(res); 1057 return (NULL); 1058 } 1059 } 1060 rle->res = res; 1061 1062 return (res); 1063 } 1064 1065 int 1066 pci_vf_release_mem_resource(device_t dev, device_t child, struct resource *r) 1067 { 1068 struct pci_devinfo *dinfo; 1069 struct resource_list_entry *rle; 1070 int error, rid; 1071 1072 dinfo = device_get_ivars(child); 1073 1074 KASSERT(rman_get_type(r) == SYS_RES_MEMORY, 1075 ("%s: invalid resource %p", __func__, r)); 1076 KASSERT(rman_is_region_manager(r, &dinfo->cfg.iov->rman), 1077 ("%s: rman %p doesn't match for resource %p", __func__, 1078 &dinfo->cfg.iov->rman, r)); 1079 1080 if (rman_get_flags(r) & RF_ACTIVE) { 1081 error = bus_deactivate_resource(child, r); 1082 if (error != 0) 1083 return (error); 1084 } 1085 1086 rid = rman_get_rid(r); 1087 rle = resource_list_find(&dinfo->resources, SYS_RES_MEMORY, rid); 1088 if (rle != NULL) { 1089 rle->res = NULL; 1090 resource_list_delete(&dinfo->resources, SYS_RES_MEMORY, 1091 rid); 1092 } 1093 1094 return (rman_release_resource(r)); 1095 } 1096 1097 int 1098 pci_vf_activate_mem_resource(device_t dev, device_t child, struct resource *r) 1099 { 1100 #ifdef INVARIANTS 1101 struct pci_devinfo *dinfo = device_get_ivars(child); 1102 #endif 1103 struct resource_map map; 1104 int error; 1105 1106 KASSERT(rman_get_type(r) == SYS_RES_MEMORY, 1107 ("%s: invalid resource %p", __func__, r)); 1108 KASSERT(rman_is_region_manager(r, &dinfo->cfg.iov->rman), 1109 ("%s: rman %p doesn't match for resource %p", __func__, 1110 &dinfo->cfg.iov->rman, r)); 1111 1112 error = rman_activate_resource(r); 1113 if (error != 0) 1114 return (error); 1115 1116 if ((rman_get_flags(r) & RF_UNMAPPED) == 0) { 1117 error = BUS_MAP_RESOURCE(dev, child, r, NULL, &map); 1118 if (error != 0) { 1119 rman_deactivate_resource(r); 1120 return (error); 1121 } 1122 1123 rman_set_mapping(r, &map); 1124 } 1125 return (0); 1126 } 1127 1128 int 1129 pci_vf_deactivate_mem_resource(device_t dev, device_t child, struct resource *r) 1130 { 1131 #ifdef INVARIANTS 1132 struct pci_devinfo *dinfo = device_get_ivars(child); 1133 #endif 1134 struct resource_map map; 1135 int error; 1136 1137 KASSERT(rman_get_type(r) == SYS_RES_MEMORY, 1138 ("%s: invalid resource %p", __func__, r)); 1139 KASSERT(rman_is_region_manager(r, &dinfo->cfg.iov->rman), 1140 ("%s: rman %p doesn't match for resource %p", __func__, 1141 &dinfo->cfg.iov->rman, r)); 1142 1143 error = rman_deactivate_resource(r); 1144 if (error != 0) 1145 return (error); 1146 1147 if ((rman_get_flags(r) & RF_UNMAPPED) == 0) { 1148 rman_get_mapping(r, &map); 1149 BUS_UNMAP_RESOURCE(dev, child, r, &map); 1150 } 1151 return (0); 1152 } 1153 1154 int 1155 pci_vf_adjust_mem_resource(device_t dev, device_t child, struct resource *r, 1156 rman_res_t start, rman_res_t end) 1157 { 1158 #ifdef INVARIANTS 1159 struct pci_devinfo *dinfo = device_get_ivars(child); 1160 #endif 1161 1162 KASSERT(rman_get_type(r) == SYS_RES_MEMORY, 1163 ("%s: invalid resource %p", __func__, r)); 1164 KASSERT(rman_is_region_manager(r, &dinfo->cfg.iov->rman), 1165 ("%s: rman %p doesn't match for resource %p", __func__, 1166 &dinfo->cfg.iov->rman, r)); 1167 1168 return (rman_adjust_resource(r, start, end)); 1169 } 1170 1171 static struct resource * 1172 pci_vf_find_parent_resource(struct pcicfg_iov *iov, struct resource *r) 1173 { 1174 struct resource *pres; 1175 1176 for (u_int i = 0; i <= PCIR_MAX_BAR_0; i++) { 1177 pres = iov->iov_bar[i].res; 1178 if (pres != NULL) { 1179 if (rman_get_start(pres) <= rman_get_start(r) && 1180 rman_get_end(pres) >= rman_get_end(r)) 1181 return (pres); 1182 } 1183 } 1184 return (NULL); 1185 } 1186 1187 int 1188 pci_vf_map_mem_resource(device_t dev, device_t child, struct resource *r, 1189 struct resource_map_request *argsp, struct resource_map *map) 1190 { 1191 struct pci_devinfo *dinfo = device_get_ivars(child); 1192 struct pcicfg_iov *iov = dinfo->cfg.iov; 1193 struct resource_map_request args; 1194 struct resource *pres; 1195 rman_res_t length, start; 1196 int error; 1197 1198 KASSERT(rman_get_type(r) == SYS_RES_MEMORY, 1199 ("%s: invalid resource %p", __func__, r)); 1200 KASSERT(rman_is_region_manager(r, &iov->rman), 1201 ("%s: rman %p doesn't match for resource %p", __func__, 1202 &dinfo->cfg.iov->rman, r)); 1203 1204 /* Resources must be active to be mapped. */ 1205 if (!(rman_get_flags(r) & RF_ACTIVE)) 1206 return (ENXIO); 1207 1208 resource_init_map_request(&args); 1209 error = resource_validate_map_request(r, argsp, &args, &start, &length); 1210 if (error) 1211 return (error); 1212 1213 pres = pci_vf_find_parent_resource(dinfo->cfg.iov, r); 1214 if (pres == NULL) 1215 return (ENOENT); 1216 1217 args.offset = start - rman_get_start(pres); 1218 args.length = length; 1219 return (bus_map_resource(iov->iov_pf, pres, &args, map)); 1220 } 1221 1222 int 1223 pci_vf_unmap_mem_resource(device_t dev, device_t child, struct resource *r, 1224 struct resource_map *map) 1225 { 1226 struct pci_devinfo *dinfo = device_get_ivars(child); 1227 struct pcicfg_iov *iov = dinfo->cfg.iov; 1228 struct resource *pres; 1229 1230 KASSERT(rman_get_type(r) == SYS_RES_MEMORY, 1231 ("%s: invalid resource %p", __func__, r)); 1232 KASSERT(rman_is_region_manager(r, &iov->rman), 1233 ("%s: rman %p doesn't match for resource %p", __func__, 1234 &dinfo->cfg.iov->rman, r)); 1235 1236 pres = pci_vf_find_parent_resource(iov, r); 1237 if (pres == NULL) 1238 return (ENOENT); 1239 return (bus_unmap_resource(iov->iov_pf, pres, map)); 1240 } 1241